4 compatible = "mediatek,mt7628an-soc";
11 compatible = "mips,mips24KEc";
17 bootargs = "console=ttyS0,57600";
26 #interrupt-cells = <1>;
28 compatible = "mti,cpu-interrupt-controller";
31 palmbus: palmbus@10000000 {
32 compatible = "palmbus";
33 reg = <0x10000000 0x200000>;
34 ranges = <0x0 0x10000000 0x1FFFFF>;
40 compatible = "ralink,mt7620a-sysc", "syscon";
44 watchdog: watchdog@100 {
45 compatible = "ralink,mt7628an-wdt", "mediatek,mt7621-wdt";
48 resets = <&rstctrl 8>;
51 interrupt-parent = <&intc>;
56 compatible = "ralink,mt7628an-intc", "ralink,rt2880-intc";
59 resets = <&rstctrl 9>;
63 #interrupt-cells = <1>;
65 interrupt-parent = <&cpuintc>;
68 ralink,intc-registers = <0x9c 0xa0
74 compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
77 resets = <&rstctrl 20>;
80 interrupt-parent = <&intc>;
85 compatible = "mediatek,mt7621-gpio";
88 interrupt-parent = <&intc>;
91 #interrupt-cells = <2>;
99 compatible = "mediatek,mt7621-i2c";
102 resets = <&rstctrl 16>;
105 #address-cells = <1>;
110 pinctrl-names = "default";
111 pinctrl-0 = <&i2c_pins>;
115 compatible = "mediatek,mt7628-i2s";
118 resets = <&rstctrl 17>;
121 interrupt-parent = <&intc>;
129 dma-names = "tx", "rx";
135 compatible = "ralink,mt7621-spi";
138 resets = <&rstctrl 18>;
141 #address-cells = <1>;
144 pinctrl-names = "default";
145 pinctrl-0 = <&spi_pins>;
150 uartlite: uartlite@c00 {
151 compatible = "ns16550a";
158 clock-frequency = <40000000>;
160 resets = <&rstctrl 12>;
161 reset-names = "uartl";
163 interrupt-parent = <&intc>;
166 pinctrl-names = "default";
167 pinctrl-0 = <&uart0_pins>;
171 compatible = "ns16550a";
178 clock-frequency = <40000000>;
180 resets = <&rstctrl 19>;
181 reset-names = "uart1";
183 interrupt-parent = <&intc>;
186 pinctrl-names = "default";
187 pinctrl-0 = <&uart1_pins>;
193 compatible = "ns16550a";
200 clock-frequency = <40000000>;
202 resets = <&rstctrl 20>;
203 reset-names = "uart2";
205 interrupt-parent = <&intc>;
208 pinctrl-names = "default";
209 pinctrl-0 = <&uart2_pins>;
215 compatible = "mediatek,mt7628-pwm";
216 reg = <0x5000 0x1000>;
219 resets = <&rstctrl 31>;
222 pinctrl-names = "default";
223 pinctrl-0 = <&pwm0_pins>, <&pwm1_pins>;
229 compatible = "ralink,mt7620a-pcm";
230 reg = <0x2000 0x800>;
232 resets = <&rstctrl 11>;
235 interrupt-parent = <&intc>;
242 compatible = "ralink,rt3883-gdma";
243 reg = <0x2800 0x800>;
245 resets = <&rstctrl 14>;
248 interrupt-parent = <&intc>;
252 #dma-channels = <16>;
253 #dma-requests = <16>;
260 compatible = "ralink,rt2880-pinmux";
261 pinctrl-names = "default";
262 pinctrl-0 = <&state_default>;
264 state_default: pinctrl0 {
269 ralink,group = "spi";
270 ralink,function = "spi";
274 spi_cs1_pins: spi_cs1 {
276 ralink,group = "spi cs1";
277 ralink,function = "spi cs1";
283 ralink,group = "i2c";
284 ralink,function = "i2c";
290 ralink,group = "i2s";
291 ralink,function = "i2s";
295 uart0_pins: uartlite {
297 ralink,group = "uart0";
298 ralink,function = "uart0";
304 ralink,group = "uart1";
305 ralink,function = "uart1";
311 ralink,group = "uart2";
312 ralink,function = "uart2";
318 ralink,group = "sdmode";
319 ralink,function = "sdxc";
325 ralink,group = "pwm0";
326 ralink,function = "pwm0";
332 ralink,group = "pwm1";
333 ralink,function = "pwm1";
337 pcm_i2s_pins: pcm_i2s {
339 ralink,group = "i2s";
340 ralink,function = "pcm";
344 refclk_pins: refclk {
346 ralink,group = "refclk";
347 ralink,function = "refclk";
353 compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
358 compatible = "ralink,rt2880-clock";
362 usbphy: usbphy@10120000 {
363 compatible = "mediatek,mt7628-usbphy", "mediatek,mt7620-usbphy";
364 reg = <0x10120000 0x1000>;
367 ralink,sysctl = <&sysc>;
368 resets = <&rstctrl 22 &rstctrl 25>;
369 reset-names = "host", "device";
370 clocks = <&clkctrl 22 &clkctrl 25>;
371 clock-names = "host", "device";
374 sdhci: sdhci@10130000 {
375 compatible = "ralink,mt7620-sdhci";
376 reg = <0x10130000 0x4000>;
378 interrupt-parent = <&intc>;
381 pinctrl-names = "default";
382 pinctrl-0 = <&sdxc_pins>;
387 ehci: ehci@101c0000 {
388 #address-cells = <1>;
390 compatible = "generic-ehci";
391 reg = <0x101c0000 0x1000>;
396 interrupt-parent = <&intc>;
401 #trigger-source-cells = <0>;
405 ohci: ohci@101c1000 {
406 #address-cells = <1>;
408 compatible = "generic-ohci";
409 reg = <0x101c1000 0x1000>;
414 interrupt-parent = <&intc>;
419 #trigger-source-cells = <0>;
423 ethernet: ethernet@10100000 {
424 compatible = "ralink,rt5350-eth";
425 reg = <0x10100000 0x10000>;
427 interrupt-parent = <&cpuintc>;
430 resets = <&rstctrl 21 &rstctrl 23>;
431 reset-names = "fe", "esw";
433 mediatek,switch = <&esw>;
437 compatible = "mediatek,mt7628-esw", "ralink,rt3050-esw";
438 reg = <0x10110000 0x8000>;
440 resets = <&rstctrl 23>;
443 interrupt-parent = <&intc>;
447 pcie: pcie@10140000 {
448 compatible = "mediatek,mt7620-pci";
449 reg = <0x10140000 0x100
452 #address-cells = <3>;
455 interrupt-parent = <&cpuintc>;
458 resets = <&rstctrl 26 &rstctrl 27>;
459 reset-names = "pcie0", "pcie1";
460 clocks = <&clkctrl 26 &clkctrl 27>;
461 clock-names = "pcie0", "pcie1";
469 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
470 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
474 reg = <0x0000 0 0 0 0>;
476 #address-cells = <3>;
485 wmac: wmac@10300000 {
486 compatible = "mediatek,mt7628-wmac";
487 reg = <0x10300000 0x100000>;
489 interrupt-parent = <&cpuintc>;
494 mediatek,mtd-eeprom = <&factory 0x0000>;