ramips: add gpio base properties to dtsi files
[openwrt/staging/wigyori.git] / target / linux / ramips / dts / rt3352.dtsi
1 / {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "ralink,rt3352-soc";
5
6 cpus {
7 cpu@0 {
8 compatible = "mips,mips24KEc";
9 };
10 };
11
12 chosen {
13 bootargs = "console=ttyS0,57600";
14 };
15
16 memorydetect {
17 ralink,memory = <0x0 0x200000 0x10000000>;
18 };
19
20 cpuintc: cpuintc@0 {
21 #address-cells = <0>;
22 #interrupt-cells = <1>;
23 interrupt-controller;
24 compatible = "mti,cpu-interrupt-controller";
25 };
26
27 palmbus@10000000 {
28 compatible = "palmbus";
29 reg = <0x10000000 0x200000>;
30 ranges = <0x0 0x10000000 0x1FFFFF>;
31
32 #address-cells = <1>;
33 #size-cells = <1>;
34
35 sysc@0 {
36 compatible = "ralink,rt3352-sysc", "ralink,rt3050-sysc";
37 reg = <0x0 0x100>;
38 };
39
40 timer@100 {
41 compatible = "ralink,rt3352-timer", "ralink,rt2880-timer";
42 reg = <0x100 0x20>;
43
44 interrupt-parent = <&intc>;
45 interrupts = <1>;
46 };
47
48 watchdog@120 {
49 compatible = "ralink,rt3352-wdt", "ralink,rt2880-wdt";
50 reg = <0x120 0x10>;
51 };
52
53 intc: intc@200 {
54 compatible = "ralink,rt3352-intc", "ralink,rt2880-intc";
55 reg = <0x200 0x100>;
56
57 interrupt-controller;
58 #interrupt-cells = <1>;
59
60 interrupt-parent = <&cpuintc>;
61 interrupts = <2>;
62 };
63
64 memc@300 {
65 compatible = "ralink,rt3352-memc", "ralink,rt3050-memc";
66 reg = <0x300 0x100>;
67 };
68
69 gpio0: gpio@600 {
70 compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
71 reg = <0x600 0x34>;
72
73 gpio-controller;
74 #gpio-cells = <2>;
75
76 ralink,gpio-base = <0>;
77 ralink,num-gpios = <24>;
78 ralink,register-map = [ 00 04 08 0c
79 20 24 28 2c
80 30 34 ];
81
82 status = "disabled";
83 };
84
85 gpio1: gpio@638 {
86 compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
87 reg = <0x638 0x24>;
88
89 gpio-controller;
90 #gpio-cells = <2>;
91
92 ralink,gpio-base = <24>;
93 ralink,num-gpios = <16>;
94 ralink,register-map = [ 00 04 08 0c
95 10 14 18 1c
96 20 24 ];
97
98 status = "disabled";
99 };
100
101 gpio2: gpio@660 {
102 compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
103 reg = <0x660 0x24>;
104
105 gpio-controller;
106 #gpio-cells = <2>;
107
108 ralink,gpio-base = <40>;
109 ralink,num-gpios = <12>;
110 ralink,register-map = [ 00 04 08 0c
111 10 14 18 1c
112 20 24 ];
113
114 status = "disabled";
115 };
116
117 spi@b00 {
118 compatible = "ralink,rt3352-spi", "ralink,rt2880-spi";
119 reg = <0xb00 0x100>;
120 #address-cells = <1>;
121 #size-cells = <1>;
122
123 status = "disabled";
124 };
125
126 uartlite@c00 {
127 compatible = "ralink,rt3352-uart", "ralink,rt2880-uart", "ns16550a";
128 reg = <0xc00 0x100>;
129
130 interrupt-parent = <&intc>;
131 interrupts = <12>;
132
133 reg-shift = <2>;
134 };
135 };
136
137 ethernet@10100000 {
138 compatible = "ralink,rt3352-eth", "ralink,rt3050-eth";
139 reg = <0x10100000 10000>;
140
141 interrupt-parent = <&cpuintc>;
142 interrupts = <5>;
143
144 status = "disabled";
145 };
146
147 esw@10110000 {
148 compatible = "ralink,rt3352-esw", "ralink,rt3050-esw";
149 reg = <0x10110000 8000>;
150
151 interrupt-parent = <&intc>;
152 interrupts = <17>;
153
154 status = "disabled";
155 };
156
157 wmac@10180000 {
158 compatible = "ralink,rt3352-wmac", "ralink,rt2880-wmac";
159 reg = <0x10180000 40000>;
160
161 interrupt-parent = <&cpuintc>;
162 interrupts = <6>;
163
164 ralink,eeprom = "soc_wmac.eeprom";
165
166 status = "disabled";
167 };
168
169 ehci@101c0000 {
170 compatible = "ralink,rt3352-ehci", "ehci-platform";
171 reg = <0x101c0000 0x1000>;
172
173 interrupt-parent = <&intc>;
174 interrupts = <18>;
175
176 status = "disabled";
177 };
178
179 ohci@101c1000 {
180 compatible = "ralink,rt3352-ohci", "ohci-platform";
181 reg = <0x101c1000 0x1000>;
182
183 interrupt-parent = <&intc>;
184 interrupts = <18>;
185
186 status = "disabled";
187 };
188 };