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ramips: raeth: enable MDIO code for RT3883
[openwrt/openwrt.git] / target / linux / ramips / files / drivers / net / ramips.c
1 /*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; version 2 of the License
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
14 *
15 * Copyright (C) 2009 John Crispin <blogic@openwrt.org>
16 */
17
18 #include <linux/module.h>
19 #include <linux/kernel.h>
20 #include <linux/types.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/init.h>
23 #include <linux/skbuff.h>
24 #include <linux/etherdevice.h>
25 #include <linux/ethtool.h>
26 #include <linux/platform_device.h>
27 #include <linux/phy.h>
28
29 #include <ramips_eth_platform.h>
30 #include "ramips_eth.h"
31
32 #define TX_TIMEOUT (20 * HZ / 100)
33 #define MAX_RX_LENGTH 1600
34
35 #ifdef CONFIG_RALINK_RT305X
36 #include "ramips_esw.c"
37 #else
38 static inline int rt305x_esw_init(void) { return 0; }
39 static inline void rt305x_esw_exit(void) { }
40 #endif
41
42 #define phys_to_bus(a) (a & 0x1FFFFFFF)
43
44 #ifdef CONFIG_RAMIPS_ETH_DEBUG
45 #define RADEBUG(fmt, args...) printk(KERN_DEBUG fmt, ## args)
46 #else
47 #define RADEBUG(fmt, args...) do {} while (0)
48 #endif
49
50 static struct net_device * ramips_dev;
51 static void __iomem *ramips_fe_base = 0;
52
53 static inline void
54 ramips_fe_wr(u32 val, unsigned reg)
55 {
56 __raw_writel(val, ramips_fe_base + reg);
57 }
58
59 static inline u32
60 ramips_fe_rr(unsigned reg)
61 {
62 return __raw_readl(ramips_fe_base + reg);
63 }
64
65 static inline void
66 ramips_fe_int_disable(u32 mask)
67 {
68 ramips_fe_wr(ramips_fe_rr(RAMIPS_FE_INT_ENABLE) & ~mask,
69 RAMIPS_FE_INT_ENABLE);
70 /* flush write */
71 ramips_fe_rr(RAMIPS_FE_INT_ENABLE);
72 }
73
74 static inline void
75 ramips_fe_int_enable(u32 mask)
76 {
77 ramips_fe_wr(ramips_fe_rr(RAMIPS_FE_INT_ENABLE) | mask,
78 RAMIPS_FE_INT_ENABLE);
79 /* flush write */
80 ramips_fe_rr(RAMIPS_FE_INT_ENABLE);
81 }
82
83 static inline void
84 ramips_hw_set_macaddr(unsigned char *mac)
85 {
86 ramips_fe_wr((mac[0] << 8) | mac[1], RAMIPS_GDMA1_MAC_ADRH);
87 ramips_fe_wr((mac[2] << 24) | (mac[3] << 16) | (mac[4] << 8) | mac[5],
88 RAMIPS_GDMA1_MAC_ADRL);
89 }
90
91 #if defined(CONFIG_RALINK_RT288X) || defined(CONFIG_RALINK_RT3883)
92
93 #define RAMIPS_MDIO_RETRY 1000
94
95 static void
96 ramips_setup_mdio_cfg(struct raeth_priv *re)
97 {
98 unsigned int mdio_cfg;
99
100 mdio_cfg = RAMIPS_MDIO_CFG_TX_CLK_SKEW_200 |
101 RAMIPS_MDIO_CFG_TX_CLK_SKEW_200 |
102 RAMIPS_MDIO_CFG_GP1_FRC_EN;
103
104 if (re->duplex == DUPLEX_FULL)
105 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_DUPLEX;
106
107 if (re->tx_fc)
108 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_FC_TX;
109
110 if (re->rx_fc)
111 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_FC_RX;
112
113 switch (re->speed) {
114 case SPEED_10:
115 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_SPEED_10;
116 break;
117 case SPEED_100:
118 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_SPEED_100;
119 break;
120 case SPEED_1000:
121 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_SPEED_1000;
122 break;
123 default:
124 BUG();
125 }
126
127 ramips_fe_wr(mdio_cfg, RAMIPS_MDIO_CFG);
128 }
129 static int
130 ramips_mdio_wait_ready(struct raeth_priv *re)
131 {
132 int retries;
133
134 retries = RAMIPS_MDIO_RETRY;
135 while (1) {
136 u32 t;
137
138 t = ramips_fe_rr(RAMIPS_MDIO_ACCESS);
139 if ((t & (0x1 << 31)) == 0)
140 return 0;
141
142 if (retries-- == 0)
143 break;
144
145 udelay(1);
146 }
147
148 dev_err(re->parent, "MDIO operation timed out\n");
149 return -ETIMEDOUT;
150 }
151
152 static int
153 ramips_mdio_read(struct mii_bus *bus, int phy_addr, int phy_reg)
154 {
155 struct raeth_priv *re = bus->priv;
156 int err;
157 u32 t;
158
159 err = ramips_mdio_wait_ready(re);
160 if (err)
161 return 0xffff;
162
163 t = (phy_addr << 24) | (phy_reg << 16);
164 ramips_fe_wr(t, RAMIPS_MDIO_ACCESS);
165 t |= (1 << 31);
166 ramips_fe_wr(t, RAMIPS_MDIO_ACCESS);
167
168 err = ramips_mdio_wait_ready(re);
169 if (err)
170 return 0xffff;
171
172 RADEBUG("%s: addr=%04x, reg=%04x, value=%04x\n", __func__,
173 phy_addr, phy_reg, ramips_fe_rr(RAMIPS_MDIO_ACCESS) & 0xffff);
174
175 return ramips_fe_rr(RAMIPS_MDIO_ACCESS) & 0xffff;
176 }
177
178 static int
179 ramips_mdio_write(struct mii_bus *bus, int phy_addr, int phy_reg, u16 val)
180 {
181 struct raeth_priv *re = bus->priv;
182 int err;
183 u32 t;
184
185 RADEBUG("%s: addr=%04x, reg=%04x, value=%04x\n", __func__,
186 phy_addr, phy_reg, ramips_fe_rr(RAMIPS_MDIO_ACCESS) & 0xffff);
187
188 err = ramips_mdio_wait_ready(re);
189 if (err)
190 return err;
191
192 t = (1 << 30) | (phy_addr << 24) | (phy_reg << 16) | val;
193 ramips_fe_wr(t, RAMIPS_MDIO_ACCESS);
194 t |= (1 << 31);
195 ramips_fe_wr(t, RAMIPS_MDIO_ACCESS);
196
197 return ramips_mdio_wait_ready(re);
198 }
199
200 static int
201 ramips_mdio_reset(struct mii_bus *bus)
202 {
203 /* TODO */
204 return 0;
205 }
206
207 static int
208 ramips_mdio_init(struct raeth_priv *re)
209 {
210 int err;
211 int i;
212
213 re->mii_bus = mdiobus_alloc();
214 if (re->mii_bus == NULL)
215 return -ENOMEM;
216
217 re->mii_bus->name = "ramips_mdio";
218 re->mii_bus->read = ramips_mdio_read;
219 re->mii_bus->write = ramips_mdio_write;
220 re->mii_bus->reset = ramips_mdio_reset;
221 re->mii_bus->irq = re->mii_irq;
222 re->mii_bus->priv = re;
223 re->mii_bus->parent = re->parent;
224
225 snprintf(re->mii_bus->id, MII_BUS_ID_SIZE, "%s", "ramips_mdio");
226 re->mii_bus->phy_mask = 0;
227
228 for (i = 0; i < PHY_MAX_ADDR; i++)
229 re->mii_irq[i] = PHY_POLL;
230
231 err = mdiobus_register(re->mii_bus);
232 if (err)
233 goto err_free_bus;
234
235 return 0;
236
237 err_free_bus:
238 kfree(re->mii_bus);
239 return err;
240 }
241
242 static void
243 ramips_mdio_cleanup(struct raeth_priv *re)
244 {
245 mdiobus_unregister(re->mii_bus);
246 kfree(re->mii_bus);
247 }
248
249 #else
250 static inline void
251 ramips_setup_mdio_cfg(struct raeth_priv *re)
252 {
253 }
254
255 static inline int
256 ramips_mdio_init(struct raeth_priv *re)
257 {
258 return 0;
259 }
260
261 static inline void
262 ramips_mdio_cleanup(struct raeth_priv *re)
263 {
264 }
265 #endif /* CONFIG_RALINK_RT288X || CONFIG_RALINK_RT3883 */
266
267 static void
268 ramips_cleanup_dma(struct raeth_priv *re)
269 {
270 int i;
271
272 for (i = 0; i < NUM_RX_DESC; i++)
273 if (re->rx_skb[i]) {
274 dma_unmap_single(&re->netdev->dev, re->rx_dma[i],
275 MAX_RX_LENGTH, DMA_FROM_DEVICE);
276 dev_kfree_skb_any(re->rx_skb[i]);
277 }
278
279 if (re->rx)
280 dma_free_coherent(&re->netdev->dev,
281 NUM_RX_DESC * sizeof(struct ramips_rx_dma),
282 re->rx, re->rx_desc_dma);
283
284 if (re->tx)
285 dma_free_coherent(&re->netdev->dev,
286 NUM_TX_DESC * sizeof(struct ramips_tx_dma),
287 re->tx, re->tx_desc_dma);
288 }
289
290 static int
291 ramips_alloc_dma(struct raeth_priv *re)
292 {
293 int err = -ENOMEM;
294 int i;
295
296 re->skb_free_idx = 0;
297
298 /* setup tx ring */
299 re->tx = dma_alloc_coherent(&re->netdev->dev,
300 NUM_TX_DESC * sizeof(struct ramips_tx_dma),
301 &re->tx_desc_dma, GFP_ATOMIC);
302 if (!re->tx)
303 goto err_cleanup;
304
305 memset(re->tx, 0, NUM_TX_DESC * sizeof(struct ramips_tx_dma));
306 for (i = 0; i < NUM_TX_DESC; i++) {
307 re->tx[i].txd2 = TX_DMA_LSO | TX_DMA_DONE;
308 re->tx[i].txd4 = TX_DMA_QN(3) | TX_DMA_PN(1);
309 }
310
311 /* setup rx ring */
312 re->rx = dma_alloc_coherent(&re->netdev->dev,
313 NUM_RX_DESC * sizeof(struct ramips_rx_dma),
314 &re->rx_desc_dma, GFP_ATOMIC);
315 if (!re->rx)
316 goto err_cleanup;
317
318 memset(re->rx, 0, sizeof(struct ramips_rx_dma) * NUM_RX_DESC);
319 for (i = 0; i < NUM_RX_DESC; i++) {
320 dma_addr_t dma_addr;
321 struct sk_buff *new_skb = dev_alloc_skb(MAX_RX_LENGTH +
322 NET_IP_ALIGN);
323
324 if (!new_skb)
325 goto err_cleanup;
326
327 skb_reserve(new_skb, NET_IP_ALIGN);
328
329 dma_addr = dma_map_single(&re->netdev->dev, new_skb->data,
330 MAX_RX_LENGTH, DMA_FROM_DEVICE);
331 re->rx_dma[i] = dma_addr;
332 re->rx[i].rxd1 = (unsigned int) re->rx_dma[i];
333 re->rx[i].rxd2 |= RX_DMA_LSO;
334 re->rx_skb[i] = new_skb;
335 }
336
337 return 0;
338
339 err_cleanup:
340 ramips_cleanup_dma(re);
341 return err;
342 }
343
344 static void
345 ramips_setup_dma(struct raeth_priv *re)
346 {
347 ramips_fe_wr(re->tx_desc_dma, RAMIPS_TX_BASE_PTR0);
348 ramips_fe_wr(NUM_TX_DESC, RAMIPS_TX_MAX_CNT0);
349 ramips_fe_wr(0, RAMIPS_TX_CTX_IDX0);
350 ramips_fe_wr(RAMIPS_PST_DTX_IDX0, RAMIPS_PDMA_RST_CFG);
351
352 ramips_fe_wr(re->rx_desc_dma, RAMIPS_RX_BASE_PTR0);
353 ramips_fe_wr(NUM_RX_DESC, RAMIPS_RX_MAX_CNT0);
354 ramips_fe_wr((NUM_RX_DESC - 1), RAMIPS_RX_CALC_IDX0);
355 ramips_fe_wr(RAMIPS_PST_DRX_IDX0, RAMIPS_PDMA_RST_CFG);
356 }
357
358 static int
359 ramips_eth_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
360 {
361 struct raeth_priv *priv = netdev_priv(dev);
362 unsigned long tx;
363 unsigned int tx_next;
364 dma_addr_t mapped_addr;
365
366 if (priv->plat->min_pkt_len) {
367 if (skb->len < priv->plat->min_pkt_len) {
368 if (skb_padto(skb, priv->plat->min_pkt_len)) {
369 printk(KERN_ERR
370 "ramips_eth: skb_padto failed\n");
371 kfree_skb(skb);
372 return 0;
373 }
374 skb_put(skb, priv->plat->min_pkt_len - skb->len);
375 }
376 }
377
378 dev->trans_start = jiffies;
379 mapped_addr = dma_map_single(&priv->netdev->dev, skb->data, skb->len,
380 DMA_TO_DEVICE);
381
382 spin_lock(&priv->page_lock);
383 tx = ramips_fe_rr(RAMIPS_TX_CTX_IDX0);
384 tx_next = (tx + 1) % NUM_TX_DESC;
385
386 if ((priv->tx_skb[tx]) || (priv->tx_skb[tx_next]) ||
387 !(priv->tx[tx].txd2 & TX_DMA_DONE) ||
388 !(priv->tx[tx_next].txd2 & TX_DMA_DONE))
389 goto out;
390
391 priv->tx[tx].txd1 = (unsigned int) mapped_addr;
392 priv->tx[tx].txd2 &= ~(TX_DMA_PLEN0_MASK | TX_DMA_DONE);
393 priv->tx[tx].txd2 |= TX_DMA_PLEN0(skb->len);
394 dev->stats.tx_packets++;
395 dev->stats.tx_bytes += skb->len;
396 priv->tx_skb[tx] = skb;
397 wmb();
398 ramips_fe_wr(tx_next, RAMIPS_TX_CTX_IDX0);
399 spin_unlock(&priv->page_lock);
400 return NETDEV_TX_OK;
401
402 out:
403 spin_unlock(&priv->page_lock);
404 dev->stats.tx_dropped++;
405 kfree_skb(skb);
406 return NETDEV_TX_OK;
407 }
408
409 static void
410 ramips_eth_rx_hw(unsigned long ptr)
411 {
412 struct net_device *dev = (struct net_device *) ptr;
413 struct raeth_priv *priv = netdev_priv(dev);
414 int rx;
415 int max_rx = 16;
416
417 while (max_rx) {
418 struct sk_buff *rx_skb, *new_skb;
419 int pktlen;
420
421 rx = (ramips_fe_rr(RAMIPS_RX_CALC_IDX0) + 1) % NUM_RX_DESC;
422 if (!(priv->rx[rx].rxd2 & RX_DMA_DONE))
423 break;
424 max_rx--;
425
426 rx_skb = priv->rx_skb[rx];
427 pktlen = RX_DMA_PLEN0(priv->rx[rx].rxd2);
428
429 new_skb = netdev_alloc_skb(dev, MAX_RX_LENGTH + NET_IP_ALIGN);
430 /* Reuse the buffer on allocation failures */
431 if (new_skb) {
432 dma_addr_t dma_addr;
433
434 dma_unmap_single(&priv->netdev->dev, priv->rx_dma[rx],
435 MAX_RX_LENGTH, DMA_FROM_DEVICE);
436
437 skb_put(rx_skb, pktlen);
438 rx_skb->dev = dev;
439 rx_skb->protocol = eth_type_trans(rx_skb, dev);
440 rx_skb->ip_summed = CHECKSUM_NONE;
441 dev->stats.rx_packets++;
442 dev->stats.rx_bytes += pktlen;
443 netif_rx(rx_skb);
444
445 priv->rx_skb[rx] = new_skb;
446 skb_reserve(new_skb, NET_IP_ALIGN);
447
448 dma_addr = dma_map_single(&priv->netdev->dev,
449 new_skb->data,
450 MAX_RX_LENGTH,
451 DMA_FROM_DEVICE);
452 priv->rx_dma[rx] = dma_addr;
453 priv->rx[rx].rxd1 = (unsigned int) dma_addr;
454 } else {
455 dev->stats.rx_dropped++;
456 }
457
458 priv->rx[rx].rxd2 &= ~RX_DMA_DONE;
459 wmb();
460 ramips_fe_wr(rx, RAMIPS_RX_CALC_IDX0);
461 }
462
463 if (max_rx == 0)
464 tasklet_schedule(&priv->rx_tasklet);
465 else
466 ramips_fe_int_enable(RAMIPS_RX_DLY_INT);
467 }
468
469 static void
470 ramips_eth_tx_housekeeping(unsigned long ptr)
471 {
472 struct net_device *dev = (struct net_device*)ptr;
473 struct raeth_priv *priv = netdev_priv(dev);
474
475 spin_lock(&priv->page_lock);
476 while ((priv->tx[priv->skb_free_idx].txd2 & TX_DMA_DONE) &&
477 (priv->tx_skb[priv->skb_free_idx])) {
478 dev_kfree_skb_irq(priv->tx_skb[priv->skb_free_idx]);
479 priv->tx_skb[priv->skb_free_idx] = 0;
480 priv->skb_free_idx++;
481 if (priv->skb_free_idx >= NUM_TX_DESC)
482 priv->skb_free_idx = 0;
483 }
484 spin_unlock(&priv->page_lock);
485
486 ramips_fe_int_enable(RAMIPS_TX_DLY_INT);
487 }
488
489 static void
490 ramips_eth_timeout(struct net_device *dev)
491 {
492 struct raeth_priv *priv = netdev_priv(dev);
493
494 tasklet_schedule(&priv->tx_housekeeping_tasklet);
495 }
496
497 static irqreturn_t
498 ramips_eth_irq(int irq, void *dev)
499 {
500 struct raeth_priv *priv = netdev_priv(dev);
501 unsigned long fe_int = ramips_fe_rr(RAMIPS_FE_INT_STATUS);
502
503 ramips_fe_wr(0xFFFFFFFF, RAMIPS_FE_INT_STATUS);
504
505 if (fe_int & RAMIPS_RX_DLY_INT) {
506 ramips_fe_int_disable(RAMIPS_RX_DLY_INT);
507 tasklet_schedule(&priv->rx_tasklet);
508 }
509
510 if (fe_int & RAMIPS_TX_DLY_INT) {
511 ramips_fe_int_disable(RAMIPS_TX_DLY_INT);
512 tasklet_schedule(&priv->tx_housekeeping_tasklet);
513 }
514
515 return IRQ_HANDLED;
516 }
517
518 static int
519 ramips_eth_open(struct net_device *dev)
520 {
521 struct raeth_priv *priv = netdev_priv(dev);
522 int err;
523
524 err = request_irq(dev->irq, ramips_eth_irq, IRQF_DISABLED,
525 dev->name, dev);
526 if (err)
527 return err;
528
529 err = ramips_alloc_dma(priv);
530 if (err)
531 goto err_free_irq;
532
533 ramips_hw_set_macaddr(dev->dev_addr);
534
535 ramips_setup_dma(priv);
536 ramips_fe_wr((ramips_fe_rr(RAMIPS_PDMA_GLO_CFG) & 0xff) |
537 (RAMIPS_TX_WB_DDONE | RAMIPS_RX_DMA_EN |
538 RAMIPS_TX_DMA_EN | RAMIPS_PDMA_SIZE_4DWORDS),
539 RAMIPS_PDMA_GLO_CFG);
540 ramips_fe_wr((ramips_fe_rr(RAMIPS_FE_GLO_CFG) &
541 ~(RAMIPS_US_CYC_CNT_MASK << RAMIPS_US_CYC_CNT_SHIFT)) |
542 ((priv->plat->sys_freq / RAMIPS_US_CYC_CNT_DIVISOR) << RAMIPS_US_CYC_CNT_SHIFT),
543 RAMIPS_FE_GLO_CFG);
544
545 tasklet_init(&priv->tx_housekeeping_tasklet, ramips_eth_tx_housekeeping,
546 (unsigned long)dev);
547 tasklet_init(&priv->rx_tasklet, ramips_eth_rx_hw, (unsigned long)dev);
548
549 ramips_setup_mdio_cfg(priv);
550
551 ramips_fe_wr(RAMIPS_DELAY_INIT, RAMIPS_DLY_INT_CFG);
552 ramips_fe_wr(RAMIPS_TX_DLY_INT | RAMIPS_RX_DLY_INT, RAMIPS_FE_INT_ENABLE);
553 ramips_fe_wr(ramips_fe_rr(RAMIPS_GDMA1_FWD_CFG) &
554 ~(RAMIPS_GDM1_ICS_EN | RAMIPS_GDM1_TCS_EN | RAMIPS_GDM1_UCS_EN | 0xffff),
555 RAMIPS_GDMA1_FWD_CFG);
556 ramips_fe_wr(ramips_fe_rr(RAMIPS_CDMA_CSG_CFG) &
557 ~(RAMIPS_ICS_GEN_EN | RAMIPS_TCS_GEN_EN | RAMIPS_UCS_GEN_EN),
558 RAMIPS_CDMA_CSG_CFG);
559 ramips_fe_wr(RAMIPS_PSE_FQFC_CFG_INIT, RAMIPS_PSE_FQ_CFG);
560 ramips_fe_wr(1, RAMIPS_FE_RST_GL);
561 ramips_fe_wr(0, RAMIPS_FE_RST_GL);
562
563 netif_start_queue(dev);
564 return 0;
565
566 err_free_irq:
567 free_irq(dev->irq, dev);
568 return err;
569 }
570
571 static int
572 ramips_eth_stop(struct net_device *dev)
573 {
574 struct raeth_priv *priv = netdev_priv(dev);
575
576 ramips_fe_wr(ramips_fe_rr(RAMIPS_PDMA_GLO_CFG) &
577 ~(RAMIPS_TX_WB_DDONE | RAMIPS_RX_DMA_EN | RAMIPS_TX_DMA_EN),
578 RAMIPS_PDMA_GLO_CFG);
579
580 /* disable all interrupts in the hw */
581 ramips_fe_wr(0, RAMIPS_FE_INT_ENABLE);
582
583 free_irq(dev->irq, dev);
584 netif_stop_queue(dev);
585 tasklet_kill(&priv->tx_housekeeping_tasklet);
586 tasklet_kill(&priv->rx_tasklet);
587 ramips_cleanup_dma(priv);
588 RADEBUG("ramips_eth: stopped\n");
589 return 0;
590 }
591
592 static int __init
593 ramips_eth_probe(struct net_device *dev)
594 {
595 struct raeth_priv *priv = netdev_priv(dev);
596 int err;
597
598 BUG_ON(!priv->plat->reset_fe);
599 priv->plat->reset_fe();
600 net_srandom(jiffies);
601 memcpy(dev->dev_addr, priv->plat->mac, ETH_ALEN);
602
603 ether_setup(dev);
604 dev->mtu = 1500;
605 dev->watchdog_timeo = TX_TIMEOUT;
606 spin_lock_init(&priv->page_lock);
607
608 err = ramips_mdio_init(priv);
609 return err;
610 }
611
612 static void
613 ramips_eth_uninit(struct net_device *dev)
614 {
615 struct raeth_priv *re = netdev_priv(dev);
616
617 ramips_mdio_cleanup(re);
618 }
619
620 static const struct net_device_ops ramips_eth_netdev_ops = {
621 .ndo_init = ramips_eth_probe,
622 .ndo_uninit = ramips_eth_uninit,
623 .ndo_open = ramips_eth_open,
624 .ndo_stop = ramips_eth_stop,
625 .ndo_start_xmit = ramips_eth_hard_start_xmit,
626 .ndo_tx_timeout = ramips_eth_timeout,
627 .ndo_change_mtu = eth_change_mtu,
628 .ndo_set_mac_address = eth_mac_addr,
629 .ndo_validate_addr = eth_validate_addr,
630 };
631
632 static int
633 ramips_eth_plat_probe(struct platform_device *plat)
634 {
635 struct raeth_priv *priv;
636 struct ramips_eth_platform_data *data = plat->dev.platform_data;
637 struct resource *res;
638 int err;
639
640 if (!data) {
641 dev_err(&plat->dev, "no platform data specified\n");
642 return -EINVAL;
643 }
644
645 res = platform_get_resource(plat, IORESOURCE_MEM, 0);
646 if (!res) {
647 dev_err(&plat->dev, "no memory resource found\n");
648 return -ENXIO;
649 }
650
651 ramips_fe_base = ioremap_nocache(res->start, res->end - res->start + 1);
652 if (!ramips_fe_base)
653 return -ENOMEM;
654
655 ramips_dev = alloc_etherdev(sizeof(struct raeth_priv));
656 if (!ramips_dev) {
657 dev_err(&plat->dev, "alloc_etherdev failed\n");
658 err = -ENOMEM;
659 goto err_unmap;
660 }
661
662 strcpy(ramips_dev->name, "eth%d");
663 ramips_dev->irq = platform_get_irq(plat, 0);
664 if (ramips_dev->irq < 0) {
665 dev_err(&plat->dev, "no IRQ resource found\n");
666 err = -ENXIO;
667 goto err_free_dev;
668 }
669 ramips_dev->addr_len = ETH_ALEN;
670 ramips_dev->base_addr = (unsigned long)ramips_fe_base;
671 ramips_dev->netdev_ops = &ramips_eth_netdev_ops;
672
673 priv = netdev_priv(ramips_dev);
674
675 priv->netdev = ramips_dev;
676 priv->parent = &plat->dev;
677 priv->speed = data->speed;
678 priv->duplex = data->duplex;
679 priv->rx_fc = data->rx_fc;
680 priv->tx_fc = data->tx_fc;
681 priv->plat = data;
682
683 err = register_netdev(ramips_dev);
684 if (err) {
685 dev_err(&plat->dev, "error bringing up device\n");
686 goto err_free_dev;
687 }
688
689 RADEBUG("ramips_eth: loaded\n");
690 return 0;
691
692 err_free_dev:
693 kfree(ramips_dev);
694 err_unmap:
695 iounmap(ramips_fe_base);
696 return err;
697 }
698
699 static int
700 ramips_eth_plat_remove(struct platform_device *plat)
701 {
702 unregister_netdev(ramips_dev);
703 free_netdev(ramips_dev);
704 RADEBUG("ramips_eth: unloaded\n");
705 return 0;
706 }
707
708 static struct platform_driver ramips_eth_driver = {
709 .probe = ramips_eth_plat_probe,
710 .remove = ramips_eth_plat_remove,
711 .driver = {
712 .name = "ramips_eth",
713 .owner = THIS_MODULE,
714 },
715 };
716
717 static int __init
718 ramips_eth_init(void)
719 {
720 int ret;
721
722 ret = rt305x_esw_init();
723 if (ret)
724 return ret;
725
726 ret = platform_driver_register(&ramips_eth_driver);
727 if (ret) {
728 printk(KERN_ERR
729 "ramips_eth: Error registering platfom driver!\n");
730 goto esw_cleanup;
731 }
732
733 return 0;
734
735 esw_cleanup:
736 rt305x_esw_exit();
737 return ret;
738 }
739
740 static void __exit
741 ramips_eth_cleanup(void)
742 {
743 platform_driver_unregister(&ramips_eth_driver);
744 rt305x_esw_exit();
745 }
746
747 module_init(ramips_eth_init);
748 module_exit(ramips_eth_cleanup);
749
750 MODULE_LICENSE("GPL");
751 MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
752 MODULE_DESCRIPTION("ethernet driver for ramips boards");
OpenWrt Source Repository