2 * This program is free software; you can redistribute it and/or
3 * modify it under the terms of the GNU General Public License
4 * as published by the Free Software Foundation; either version 2
5 * of the License, or (at your option) any later version.
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
12 * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
13 * Copyright (C) 2016 Vitaly Chekryzhev <13hakta@gmail.com>
17 #include <linux/module.h>
18 #include <linux/init.h>
19 #include <linux/list.h>
20 #include <linux/if_ether.h>
21 #include <linux/skbuff.h>
22 #include <linux/netdevice.h>
23 #include <linux/netlink.h>
24 #include <linux/bitops.h>
25 #include <net/genetlink.h>
26 #include <linux/switch.h>
27 #include <linux/delay.h>
28 #include <linux/phy.h>
29 #include <linux/netdevice.h>
30 #include <linux/etherdevice.h>
31 #include <linux/lockdep.h>
32 #include <linux/workqueue.h>
33 #include <linux/of_device.h>
37 #define MT7530_CPU_PORT 6
38 #define MT7530_NUM_PORTS 8
39 #ifdef CONFIG_SOC_MT7621
40 #define MT7530_NUM_VLANS 4095
42 #define MT7530_NUM_VLANS 16
44 #define MT7530_MAX_VID 4095
45 #define MT7530_MIN_VID 0
47 #define MT7530_PORT_MIB_TXB_ID 2 /* TxGOC */
48 #define MT7530_PORT_MIB_RXB_ID 6 /* RxGOC */
50 #define MT7621_PORT_MIB_TXB_ID 18 /* TxByte */
51 #define MT7621_PORT_MIB_RXB_ID 37 /* RxByte */
54 #define REG_ESW_VLAN_VTCR 0x90
55 #define REG_ESW_VLAN_VAWD1 0x94
56 #define REG_ESW_VLAN_VAWD2 0x98
57 #define REG_ESW_VLAN_VTIM(x) (0x100 + 4 * ((x) / 2))
59 #define REG_ESW_VLAN_VAWD1_IVL_MAC BIT(30)
60 #define REG_ESW_VLAN_VAWD1_VTAG_EN BIT(28)
61 #define REG_ESW_VLAN_VAWD1_VALID BIT(0)
63 /* vlan egress mode */
71 #define REG_ESW_PORT_PCR(x) (0x2004 | ((x) << 8))
72 #define REG_ESW_PORT_PVC(x) (0x2010 | ((x) << 8))
73 #define REG_ESW_PORT_PPBV1(x) (0x2014 | ((x) << 8))
75 #define REG_HWTRAP 0x7804
77 #define MIB_DESC(_s , _o, _n) \
84 struct mt7xxx_mib_desc
{
90 static const struct mt7xxx_mib_desc mt7620_mibs
[] = {
91 MIB_DESC(1, MT7620_MIB_STATS_PPE_AC_BCNT0
, "PPE_AC_BCNT0"),
92 MIB_DESC(1, MT7620_MIB_STATS_PPE_AC_PCNT0
, "PPE_AC_PCNT0"),
93 MIB_DESC(1, MT7620_MIB_STATS_PPE_AC_BCNT63
, "PPE_AC_BCNT63"),
94 MIB_DESC(1, MT7620_MIB_STATS_PPE_AC_PCNT63
, "PPE_AC_PCNT63"),
95 MIB_DESC(1, MT7620_MIB_STATS_PPE_MTR_CNT0
, "PPE_MTR_CNT0"),
96 MIB_DESC(1, MT7620_MIB_STATS_PPE_MTR_CNT63
, "PPE_MTR_CNT63"),
97 MIB_DESC(1, MT7620_MIB_STATS_GDM1_TX_GBCNT
, "GDM1_TX_GBCNT"),
98 MIB_DESC(1, MT7620_MIB_STATS_GDM1_TX_GPCNT
, "GDM1_TX_GPCNT"),
99 MIB_DESC(1, MT7620_MIB_STATS_GDM1_TX_SKIPCNT
, "GDM1_TX_SKIPCNT"),
100 MIB_DESC(1, MT7620_MIB_STATS_GDM1_TX_COLCNT
, "GDM1_TX_COLCNT"),
101 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_GBCNT1
, "GDM1_RX_GBCNT1"),
102 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_GPCNT1
, "GDM1_RX_GPCNT1"),
103 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_OERCNT
, "GDM1_RX_OERCNT"),
104 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_FERCNT
, "GDM1_RX_FERCNT"),
105 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_SERCNT
, "GDM1_RX_SERCNT"),
106 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_LERCNT
, "GDM1_RX_LERCNT"),
107 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_CERCNT
, "GDM1_RX_CERCNT"),
108 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_FCCNT
, "GDM1_RX_FCCNT"),
109 MIB_DESC(1, MT7620_MIB_STATS_GDM2_TX_GBCNT
, "GDM2_TX_GBCNT"),
110 MIB_DESC(1, MT7620_MIB_STATS_GDM2_TX_GPCNT
, "GDM2_TX_GPCNT"),
111 MIB_DESC(1, MT7620_MIB_STATS_GDM2_TX_SKIPCNT
, "GDM2_TX_SKIPCNT"),
112 MIB_DESC(1, MT7620_MIB_STATS_GDM2_TX_COLCNT
, "GDM2_TX_COLCNT"),
113 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_GBCNT
, "GDM2_RX_GBCNT"),
114 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_GPCNT
, "GDM2_RX_GPCNT"),
115 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_OERCNT
, "GDM2_RX_OERCNT"),
116 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_FERCNT
, "GDM2_RX_FERCNT"),
117 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_SERCNT
, "GDM2_RX_SERCNT"),
118 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_LERCNT
, "GDM2_RX_LERCNT"),
119 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_CERCNT
, "GDM2_RX_CERCNT"),
120 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_FCCNT
, "GDM2_RX_FCCNT")
123 static const struct mt7xxx_mib_desc mt7620_port_mibs
[] = {
124 MIB_DESC(1, MT7620_MIB_STATS_PORT_TGPCN
, "TxGPC"),
125 MIB_DESC(1, MT7620_MIB_STATS_PORT_TBOCN
, "TxBOC"),
126 MIB_DESC(1, MT7620_MIB_STATS_PORT_TGOCN
, "TxGOC"),
127 MIB_DESC(1, MT7620_MIB_STATS_PORT_TEPCN
, "TxEPC"),
128 MIB_DESC(1, MT7620_MIB_STATS_PORT_RGPCN
, "RxGPC"),
129 MIB_DESC(1, MT7620_MIB_STATS_PORT_RBOCN
, "RxBOC"),
130 MIB_DESC(1, MT7620_MIB_STATS_PORT_RGOCN
, "RxGOC"),
131 MIB_DESC(1, MT7620_MIB_STATS_PORT_REPC1N
, "RxEPC1"),
132 MIB_DESC(1, MT7620_MIB_STATS_PORT_REPC2N
, "RxEPC2")
135 static const struct mt7xxx_mib_desc mt7621_mibs
[] = {
136 MIB_DESC(1, MT7621_STATS_TDPC
, "TxDrop"),
137 MIB_DESC(1, MT7621_STATS_TCRC
, "TxCRC"),
138 MIB_DESC(1, MT7621_STATS_TUPC
, "TxUni"),
139 MIB_DESC(1, MT7621_STATS_TMPC
, "TxMulti"),
140 MIB_DESC(1, MT7621_STATS_TBPC
, "TxBroad"),
141 MIB_DESC(1, MT7621_STATS_TCEC
, "TxCollision"),
142 MIB_DESC(1, MT7621_STATS_TSCEC
, "TxSingleCol"),
143 MIB_DESC(1, MT7621_STATS_TMCEC
, "TxMultiCol"),
144 MIB_DESC(1, MT7621_STATS_TDEC
, "TxDefer"),
145 MIB_DESC(1, MT7621_STATS_TLCEC
, "TxLateCol"),
146 MIB_DESC(1, MT7621_STATS_TXCEC
, "TxExcCol"),
147 MIB_DESC(1, MT7621_STATS_TPPC
, "TxPause"),
148 MIB_DESC(1, MT7621_STATS_TL64PC
, "Tx64Byte"),
149 MIB_DESC(1, MT7621_STATS_TL65PC
, "Tx65Byte"),
150 MIB_DESC(1, MT7621_STATS_TL128PC
, "Tx128Byte"),
151 MIB_DESC(1, MT7621_STATS_TL256PC
, "Tx256Byte"),
152 MIB_DESC(1, MT7621_STATS_TL512PC
, "Tx512Byte"),
153 MIB_DESC(1, MT7621_STATS_TL1024PC
, "Tx1024Byte"),
154 MIB_DESC(2, MT7621_STATS_TOC
, "TxByte"),
155 MIB_DESC(1, MT7621_STATS_RDPC
, "RxDrop"),
156 MIB_DESC(1, MT7621_STATS_RFPC
, "RxFiltered"),
157 MIB_DESC(1, MT7621_STATS_RUPC
, "RxUni"),
158 MIB_DESC(1, MT7621_STATS_RMPC
, "RxMulti"),
159 MIB_DESC(1, MT7621_STATS_RBPC
, "RxBroad"),
160 MIB_DESC(1, MT7621_STATS_RAEPC
, "RxAlignErr"),
161 MIB_DESC(1, MT7621_STATS_RCEPC
, "RxCRC"),
162 MIB_DESC(1, MT7621_STATS_RUSPC
, "RxUnderSize"),
163 MIB_DESC(1, MT7621_STATS_RFEPC
, "RxFragment"),
164 MIB_DESC(1, MT7621_STATS_ROSPC
, "RxOverSize"),
165 MIB_DESC(1, MT7621_STATS_RJEPC
, "RxJabber"),
166 MIB_DESC(1, MT7621_STATS_RPPC
, "RxPause"),
167 MIB_DESC(1, MT7621_STATS_RL64PC
, "Rx64Byte"),
168 MIB_DESC(1, MT7621_STATS_RL65PC
, "Rx65Byte"),
169 MIB_DESC(1, MT7621_STATS_RL128PC
, "Rx128Byte"),
170 MIB_DESC(1, MT7621_STATS_RL256PC
, "Rx256Byte"),
171 MIB_DESC(1, MT7621_STATS_RL512PC
, "Rx512Byte"),
172 MIB_DESC(1, MT7621_STATS_RL1024PC
, "Rx1024Byte"),
173 MIB_DESC(2, MT7621_STATS_ROC
, "RxByte"),
174 MIB_DESC(1, MT7621_STATS_RDPC_CTRL
, "RxCtrlDrop"),
175 MIB_DESC(1, MT7621_STATS_RDPC_ING
, "RxIngDrop"),
176 MIB_DESC(1, MT7621_STATS_RDPC_ARL
, "RxARLDrop")
180 /* Global attributes. */
181 MT7530_ATTR_ENABLE_VLAN
,
184 struct mt7530_port_entry
{
188 struct mt7530_vlan_entry
{
197 struct switch_dev swdev
;
199 bool global_vlan_enable
;
200 struct mt7530_vlan_entry vlan_entries
[MT7530_NUM_VLANS
];
201 struct mt7530_port_entry port_entries
[MT7530_NUM_PORTS
];
204 struct mt7530_mapping
{
206 u16 pvids
[MT7530_NUM_PORTS
];
207 u8 members
[MT7530_NUM_VLANS
];
208 u8 etags
[MT7530_NUM_VLANS
];
209 u16 vids
[MT7530_NUM_VLANS
];
210 } mt7530_defaults
[] = {
213 .pvids
= { 1, 1, 1, 1, 2, 1, 1 },
214 .members
= { 0, 0x6f, 0x50 },
215 .etags
= { 0, 0x40, 0x40 },
219 .pvids
= { 2, 1, 1, 1, 1, 1, 1 },
220 .members
= { 0, 0x7e, 0x41 },
221 .etags
= { 0, 0x40, 0x40 },
225 .pvids
= { 1, 2, 1, 1, 1, 1, 1 },
226 .members
= { 0, 0x7d, 0x42 },
227 .etags
= { 0, 0x40, 0x40 },
232 struct mt7530_mapping
*
233 mt7530_find_mapping(struct device_node
*np
)
238 if (of_property_read_string(np
, "mediatek,portmap", &map
))
241 for (i
= 0; i
< ARRAY_SIZE(mt7530_defaults
); i
++)
242 if (!strcmp(map
, mt7530_defaults
[i
].name
))
243 return &mt7530_defaults
[i
];
249 mt7530_apply_mapping(struct mt7530_priv
*mt7530
, struct mt7530_mapping
*map
)
253 for (i
= 0; i
< MT7530_NUM_PORTS
; i
++)
254 mt7530
->port_entries
[i
].pvid
= map
->pvids
[i
];
256 for (i
= 0; i
< MT7530_NUM_VLANS
; i
++) {
257 mt7530
->vlan_entries
[i
].member
= map
->members
[i
];
258 mt7530
->vlan_entries
[i
].etags
= map
->etags
[i
];
259 mt7530
->vlan_entries
[i
].vid
= map
->vids
[i
];
264 mt7530_reset_switch(struct switch_dev
*dev
)
266 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
269 memset(priv
->port_entries
, 0, sizeof(priv
->port_entries
));
270 memset(priv
->vlan_entries
, 0, sizeof(priv
->vlan_entries
));
272 /* set default vid of each vlan to the same number of vlan, so the vid
273 * won't need be set explicitly.
275 for (i
= 0; i
< MT7530_NUM_VLANS
; i
++) {
276 priv
->vlan_entries
[i
].vid
= i
;
283 mt7530_get_vlan_enable(struct switch_dev
*dev
,
284 const struct switch_attr
*attr
,
285 struct switch_val
*val
)
287 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
289 val
->value
.i
= priv
->global_vlan_enable
;
295 mt7530_set_vlan_enable(struct switch_dev
*dev
,
296 const struct switch_attr
*attr
,
297 struct switch_val
*val
)
299 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
301 priv
->global_vlan_enable
= val
->value
.i
!= 0;
307 mt7530_r32(struct mt7530_priv
*priv
, u32 reg
)
313 mdiobus_write(priv
->bus
, 0x1f, 0x1f, (reg
>> 6) & 0x3ff);
314 low
= mdiobus_read(priv
->bus
, 0x1f, (reg
>> 2) & 0xf);
315 high
= mdiobus_read(priv
->bus
, 0x1f, 0x10);
317 return (high
<< 16) | (low
& 0xffff);
320 val
= ioread32(priv
->base
+ reg
);
321 pr_debug("MT7530 MDIO Read [%04x]=%08x\n", reg
, val
);
327 mt7530_w32(struct mt7530_priv
*priv
, u32 reg
, u32 val
)
330 mdiobus_write(priv
->bus
, 0x1f, 0x1f, (reg
>> 6) & 0x3ff);
331 mdiobus_write(priv
->bus
, 0x1f, (reg
>> 2) & 0xf, val
& 0xffff);
332 mdiobus_write(priv
->bus
, 0x1f, 0x10, val
>> 16);
336 pr_debug("MT7530 MDIO Write[%04x]=%08x\n", reg
, val
);
337 iowrite32(val
, priv
->base
+ reg
);
341 mt7530_vtcr(struct mt7530_priv
*priv
, u32 cmd
, u32 val
)
345 mt7530_w32(priv
, REG_ESW_VLAN_VTCR
, BIT(31) | (cmd
<< 12) | val
);
347 for (i
= 0; i
< 20; i
++) {
348 u32 val
= mt7530_r32(priv
, REG_ESW_VLAN_VTCR
);
350 if ((val
& BIT(31)) == 0)
356 printk("mt7530: vtcr timeout\n");
360 mt7530_get_port_pvid(struct switch_dev
*dev
, int port
, int *val
)
362 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
364 if (port
>= MT7530_NUM_PORTS
)
367 *val
= mt7530_r32(priv
, REG_ESW_PORT_PPBV1(port
));
374 mt7530_set_port_pvid(struct switch_dev
*dev
, int port
, int pvid
)
376 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
378 if (port
>= MT7530_NUM_PORTS
)
381 if (pvid
< MT7530_MIN_VID
|| pvid
> MT7530_MAX_VID
)
384 priv
->port_entries
[port
].pvid
= pvid
;
390 mt7530_get_vlan_ports(struct switch_dev
*dev
, struct switch_val
*val
)
392 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
399 if (val
->port_vlan
< 0 || val
->port_vlan
>= MT7530_NUM_VLANS
)
402 mt7530_vtcr(priv
, 0, val
->port_vlan
);
404 member
= mt7530_r32(priv
, REG_ESW_VLAN_VAWD1
);
408 etags
= mt7530_r32(priv
, REG_ESW_VLAN_VAWD2
);
410 for (i
= 0; i
< MT7530_NUM_PORTS
; i
++) {
411 struct switch_port
*p
;
414 if (!(member
& BIT(i
)))
417 p
= &val
->value
.ports
[val
->len
++];
420 etag
= (etags
>> (i
* 2)) & 0x3;
422 if (etag
== ETAG_CTRL_TAG
)
423 p
->flags
|= BIT(SWITCH_PORT_FLAG_TAGGED
);
424 else if (etag
!= ETAG_CTRL_UNTAG
)
425 printk("vlan egress tag control neither untag nor tag.\n");
432 mt7530_set_vlan_ports(struct switch_dev
*dev
, struct switch_val
*val
)
434 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
439 if (val
->port_vlan
< 0 || val
->port_vlan
>= MT7530_NUM_VLANS
||
440 val
->len
> MT7530_NUM_PORTS
)
443 for (i
= 0; i
< val
->len
; i
++) {
444 struct switch_port
*p
= &val
->value
.ports
[i
];
446 if (p
->id
>= MT7530_NUM_PORTS
)
449 member
|= BIT(p
->id
);
451 if (p
->flags
& BIT(SWITCH_PORT_FLAG_TAGGED
))
454 priv
->vlan_entries
[val
->port_vlan
].member
= member
;
455 priv
->vlan_entries
[val
->port_vlan
].etags
= etags
;
461 mt7530_set_vid(struct switch_dev
*dev
, const struct switch_attr
*attr
,
462 struct switch_val
*val
)
464 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
468 vlan
= val
->port_vlan
;
469 vid
= (u16
)val
->value
.i
;
471 if (vlan
< 0 || vlan
>= MT7530_NUM_VLANS
)
474 if (vid
< MT7530_MIN_VID
|| vid
> MT7530_MAX_VID
)
477 priv
->vlan_entries
[vlan
].vid
= vid
;
482 mt7530_get_vid(struct switch_dev
*dev
, const struct switch_attr
*attr
,
483 struct switch_val
*val
)
485 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
489 vlan
= val
->port_vlan
;
491 vid
= mt7530_r32(priv
, REG_ESW_VLAN_VTIM(vlan
));
501 mt7530_apply_config(struct switch_dev
*dev
)
503 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
508 if (!priv
->global_vlan_enable
) {
509 for (i
= 0; i
< MT7530_NUM_PORTS
; i
++)
510 mt7530_w32(priv
, REG_ESW_PORT_PCR(i
), 0x00400000);
512 mt7530_w32(priv
, REG_ESW_PORT_PCR(MT7530_CPU_PORT
), 0x00ff0000);
514 for (i
= 0; i
< MT7530_NUM_PORTS
; i
++)
515 mt7530_w32(priv
, REG_ESW_PORT_PVC(i
), 0x810000c0);
520 /* set all ports as security mode */
521 for (i
= 0; i
< MT7530_NUM_PORTS
; i
++)
522 mt7530_w32(priv
, REG_ESW_PORT_PCR(i
), 0x00ff0003);
524 /* check if a port is used in tag/untag vlan egress mode */
528 for (i
= 0; i
< MT7530_NUM_VLANS
; i
++) {
529 u8 member
= priv
->vlan_entries
[i
].member
;
530 u8 etags
= priv
->vlan_entries
[i
].etags
;
535 for (j
= 0; j
< MT7530_NUM_PORTS
; j
++) {
536 if (!(member
& BIT(j
)))
540 tag_ports
|= 1u << j
;
542 untag_ports
|= 1u << j
;
546 /* set all untag-only ports as transparent and the rest as user port */
547 for (i
= 0; i
< MT7530_NUM_PORTS
; i
++) {
548 u32 pvc_mode
= 0x81000000;
550 if (untag_ports
& BIT(i
) && !(tag_ports
& BIT(i
)))
551 pvc_mode
= 0x810000c0;
553 mt7530_w32(priv
, REG_ESW_PORT_PVC(i
), pvc_mode
);
556 for (i
= 0; i
< MT7530_NUM_VLANS
; i
++) {
557 u16 vid
= priv
->vlan_entries
[i
].vid
;
558 u8 member
= priv
->vlan_entries
[i
].member
;
559 u8 etags
= priv
->vlan_entries
[i
].etags
;
562 #ifndef CONFIG_SOC_MT7621
564 val
= mt7530_r32(priv
, REG_ESW_VLAN_VTIM(i
));
572 mt7530_w32(priv
, REG_ESW_VLAN_VTIM(i
), val
);
574 /* vlan port membership */
576 mt7530_w32(priv
, REG_ESW_VLAN_VAWD1
, REG_ESW_VLAN_VAWD1_IVL_MAC
|
577 REG_ESW_VLAN_VAWD1_VTAG_EN
| (member
<< 16) |
578 REG_ESW_VLAN_VAWD1_VALID
);
580 mt7530_w32(priv
, REG_ESW_VLAN_VAWD1
, 0);
584 for (j
= 0; j
< MT7530_NUM_PORTS
; j
++) {
586 val
|= ETAG_CTRL_TAG
<< (j
* 2);
588 val
|= ETAG_CTRL_UNTAG
<< (j
* 2);
590 mt7530_w32(priv
, REG_ESW_VLAN_VAWD2
, val
);
592 /* write to vlan table */
593 #ifdef CONFIG_SOC_MT7621
594 mt7530_vtcr(priv
, 1, vid
);
596 mt7530_vtcr(priv
, 1, i
);
600 /* Port Default PVID */
601 for (i
= 0; i
< MT7530_NUM_PORTS
; i
++) {
603 val
= mt7530_r32(priv
, REG_ESW_PORT_PPBV1(i
));
605 val
|= priv
->port_entries
[i
].pvid
;
606 mt7530_w32(priv
, REG_ESW_PORT_PPBV1(i
), val
);
613 mt7530_get_port_link(struct switch_dev
*dev
, int port
,
614 struct switch_port_link
*link
)
616 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
619 if (port
< 0 || port
>= MT7530_NUM_PORTS
)
622 pmsr
= mt7530_r32(priv
, 0x3008 + (0x100 * port
));
624 link
->link
= pmsr
& 1;
625 link
->duplex
= (pmsr
>> 1) & 1;
626 speed
= (pmsr
>> 2) & 3;
630 link
->speed
= SWITCH_PORT_SPEED_10
;
633 link
->speed
= SWITCH_PORT_SPEED_100
;
636 case 3: /* forced gige speed can be 2 or 3 */
637 link
->speed
= SWITCH_PORT_SPEED_1000
;
640 link
->speed
= SWITCH_PORT_SPEED_UNKNOWN
;
647 static u64
get_mib_counter(struct mt7530_priv
*priv
, int i
, int port
)
649 unsigned int port_base
;
652 port_base
= MT7621_MIB_COUNTER_BASE
+
653 MT7621_MIB_COUNTER_PORT_OFFSET
* port
;
655 lo
= mt7530_r32(priv
, port_base
+ mt7621_mibs
[i
].offset
);
656 if (mt7621_mibs
[i
].size
== 2) {
659 hi
= mt7530_r32(priv
, port_base
+ mt7621_mibs
[i
].offset
+ 4);
666 static int mt7621_sw_get_port_mib(struct switch_dev
*dev
,
667 const struct switch_attr
*attr
,
668 struct switch_val
*val
)
670 static char buf
[4096];
671 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
674 if (val
->port_vlan
>= MT7530_NUM_PORTS
)
677 len
+= snprintf(buf
+ len
, sizeof(buf
) - len
,
678 "Port %d MIB counters\n", val
->port_vlan
);
680 for (i
= 0; i
< ARRAY_SIZE(mt7621_mibs
); ++i
) {
682 len
+= snprintf(buf
+ len
, sizeof(buf
) - len
,
683 "%-11s: ", mt7621_mibs
[i
].name
);
684 counter
= get_mib_counter(priv
, i
, val
->port_vlan
);
685 len
+= snprintf(buf
+ len
, sizeof(buf
) - len
, "%llu\n",
694 static u64
get_mib_counter_7620(struct mt7530_priv
*priv
, int i
)
696 return mt7530_r32(priv
, MT7620_MIB_COUNTER_BASE
+ mt7620_mibs
[i
].offset
);
699 static u64
get_mib_counter_port_7620(struct mt7530_priv
*priv
, int i
, int port
)
701 return mt7530_r32(priv
,
702 MT7620_MIB_COUNTER_BASE_PORT
+
703 (MT7620_MIB_COUNTER_PORT_OFFSET
* port
) +
704 mt7620_port_mibs
[i
].offset
);
707 static int mt7530_sw_get_mib(struct switch_dev
*dev
,
708 const struct switch_attr
*attr
,
709 struct switch_val
*val
)
711 static char buf
[4096];
712 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
715 len
+= snprintf(buf
+ len
, sizeof(buf
) - len
, "Switch MIB counters\n");
717 for (i
= 0; i
< ARRAY_SIZE(mt7620_mibs
); ++i
) {
719 len
+= snprintf(buf
+ len
, sizeof(buf
) - len
,
720 "%-11s: ", mt7620_mibs
[i
].name
);
721 counter
= get_mib_counter_7620(priv
, i
);
722 len
+= snprintf(buf
+ len
, sizeof(buf
) - len
, "%llu\n",
731 static int mt7530_sw_get_port_mib(struct switch_dev
*dev
,
732 const struct switch_attr
*attr
,
733 struct switch_val
*val
)
735 static char buf
[4096];
736 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
739 if (val
->port_vlan
>= MT7530_NUM_PORTS
)
742 len
+= snprintf(buf
+ len
, sizeof(buf
) - len
,
743 "Port %d MIB counters\n", val
->port_vlan
);
745 for (i
= 0; i
< ARRAY_SIZE(mt7620_port_mibs
); ++i
) {
747 len
+= snprintf(buf
+ len
, sizeof(buf
) - len
,
748 "%-11s: ", mt7620_port_mibs
[i
].name
);
749 counter
= get_mib_counter_port_7620(priv
, i
, val
->port_vlan
);
750 len
+= snprintf(buf
+ len
, sizeof(buf
) - len
, "%llu\n",
759 static int mt7530_get_port_stats(struct switch_dev
*dev
, int port
,
760 struct switch_port_stats
*stats
)
762 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
764 if (port
< 0 || port
>= MT7530_NUM_PORTS
)
767 stats
->tx_bytes
= get_mib_counter_port_7620(priv
, MT7530_PORT_MIB_TXB_ID
, port
);
768 stats
->rx_bytes
= get_mib_counter_port_7620(priv
, MT7530_PORT_MIB_RXB_ID
, port
);
773 static int mt7621_get_port_stats(struct switch_dev
*dev
, int port
,
774 struct switch_port_stats
*stats
)
776 struct mt7530_priv
*priv
= container_of(dev
, struct mt7530_priv
, swdev
);
778 if (port
< 0 || port
>= MT7530_NUM_PORTS
)
781 stats
->tx_bytes
= get_mib_counter(priv
, MT7621_PORT_MIB_TXB_ID
, port
);
782 stats
->rx_bytes
= get_mib_counter(priv
, MT7621_PORT_MIB_RXB_ID
, port
);
787 static const struct switch_attr mt7530_global
[] = {
789 .type
= SWITCH_TYPE_INT
,
790 .name
= "enable_vlan",
791 .description
= "VLAN mode (1:enabled)",
793 .id
= MT7530_ATTR_ENABLE_VLAN
,
794 .get
= mt7530_get_vlan_enable
,
795 .set
= mt7530_set_vlan_enable
,
797 .type
= SWITCH_TYPE_STRING
,
799 .description
= "Get MIB counters for switch",
800 .get
= mt7530_sw_get_mib
,
805 static const struct switch_attr mt7621_port
[] = {
807 .type
= SWITCH_TYPE_STRING
,
809 .description
= "Get MIB counters for port",
810 .get
= mt7621_sw_get_port_mib
,
815 static const struct switch_attr mt7530_port
[] = {
817 .type
= SWITCH_TYPE_STRING
,
819 .description
= "Get MIB counters for port",
820 .get
= mt7530_sw_get_port_mib
,
825 static const struct switch_attr mt7530_vlan
[] = {
827 .type
= SWITCH_TYPE_INT
,
829 .description
= "VLAN ID (0-4094)",
830 .set
= mt7530_set_vid
,
831 .get
= mt7530_get_vid
,
836 static const struct switch_dev_ops mt7621_ops
= {
838 .attr
= mt7530_global
,
839 .n_attr
= ARRAY_SIZE(mt7530_global
),
843 .n_attr
= ARRAY_SIZE(mt7621_port
),
847 .n_attr
= ARRAY_SIZE(mt7530_vlan
),
849 .get_vlan_ports
= mt7530_get_vlan_ports
,
850 .set_vlan_ports
= mt7530_set_vlan_ports
,
851 .get_port_pvid
= mt7530_get_port_pvid
,
852 .set_port_pvid
= mt7530_set_port_pvid
,
853 .get_port_link
= mt7530_get_port_link
,
854 .get_port_stats
= mt7621_get_port_stats
,
855 .apply_config
= mt7530_apply_config
,
856 .reset_switch
= mt7530_reset_switch
,
859 static const struct switch_dev_ops mt7530_ops
= {
861 .attr
= mt7530_global
,
862 .n_attr
= ARRAY_SIZE(mt7530_global
),
866 .n_attr
= ARRAY_SIZE(mt7530_port
),
870 .n_attr
= ARRAY_SIZE(mt7530_vlan
),
872 .get_vlan_ports
= mt7530_get_vlan_ports
,
873 .set_vlan_ports
= mt7530_set_vlan_ports
,
874 .get_port_pvid
= mt7530_get_port_pvid
,
875 .set_port_pvid
= mt7530_set_port_pvid
,
876 .get_port_link
= mt7530_get_port_link
,
877 .get_port_stats
= mt7530_get_port_stats
,
878 .apply_config
= mt7530_apply_config
,
879 .reset_switch
= mt7530_reset_switch
,
883 mt7530_probe(struct device
*dev
, void __iomem
*base
, struct mii_bus
*bus
, int vlan
)
885 struct switch_dev
*swdev
;
886 struct mt7530_priv
*mt7530
;
887 struct mt7530_mapping
*map
;
890 mt7530
= devm_kzalloc(dev
, sizeof(struct mt7530_priv
), GFP_KERNEL
);
896 mt7530
->global_vlan_enable
= vlan
;
898 swdev
= &mt7530
->swdev
;
900 swdev
->alias
= "mt7530";
901 swdev
->name
= "mt7530";
902 } else if (IS_ENABLED(CONFIG_SOC_MT7621
)) {
903 swdev
->alias
= "mt7621";
904 swdev
->name
= "mt7621";
906 swdev
->alias
= "mt7620";
907 swdev
->name
= "mt7620";
909 swdev
->cpu_port
= MT7530_CPU_PORT
;
910 swdev
->ports
= MT7530_NUM_PORTS
;
911 swdev
->vlans
= MT7530_NUM_VLANS
;
912 if (IS_ENABLED(CONFIG_SOC_MT7621
))
913 swdev
->ops
= &mt7621_ops
;
915 swdev
->ops
= &mt7530_ops
;
917 ret
= register_switch(swdev
, NULL
);
919 dev_err(dev
, "failed to register mt7530\n");
924 map
= mt7530_find_mapping(dev
->of_node
);
926 mt7530_apply_mapping(mt7530
, map
);
927 mt7530_apply_config(swdev
);
930 if (!IS_ENABLED(CONFIG_SOC_MT7621
) && bus
&& mt7530_r32(mt7530
, REG_HWTRAP
) != 0x1117edf) {
931 dev_info(dev
, "fixing up MHWTRAP register - bootloader probably played with it\n");
932 mt7530_w32(mt7530
, REG_HWTRAP
, 0x1117edf);
934 dev_info(dev
, "loaded %s driver\n", swdev
->name
);