2 * LZMA compressed kernel loader for Atheros AR7XXX/AR9XXX based boards
4 * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
6 * Some parts of this code was based on the OpenWrt specific lzma-loader
7 * for the BCM47xx and ADM5120 based boards:
8 * Copyright (C) 2004 Manuel Novoa III (mjn3@codepoet.org)
9 * Copyright (C) 2005 by Oleg I. Vdovikin <oleg@cs.msu.su>
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License version 2 as published
13 * by the Free Software Foundation.
17 #include <asm/regdef.h>
18 #include "cp0regdef.h"
21 #define KSEG0 0x80000000
42 mtc0 zero, CP0_WATCHLO # clear watch registers
43 mtc0 zero, CP0_WATCHHI
44 mtc0 zero, CP0_CAUSE # clear before writing status register
54 mtc0 zero, CP0_COMPARE
57 la t0, __reloc_label # get linked address of label
58 bal __reloc_label # branch and link to label to
59 nop # get actual address
61 subu t0, ra, t0 # get reloc_delta
63 /* Copy our code to the right place */
64 la t1, _code_start # get linked address of _code_start
65 la t2, _code_end # get linked address of _code_end
67 addu t4, t2, t0 # calculate actual address of _code_end
68 lw t5, 0(t4) # get extra data size
73 add t0, t1 # calculate actual address of _code_start
79 blt t1, t2, __reloc_copy
86 li t2, ~(CONFIG_CACHELINE_SIZE - 1)
89 li t2, CONFIG_CACHELINE_SIZE
95 cache Hit_Writeback_Inv_D, 0(t0)
96 cache Hit_Invalidate_I, 0(t0)
100 bne t0, t1, __flush_line
121 blt t0, t1, __kernel_copy
128 add t1, CONFIG_CACHELINE_SIZE - 1
129 li t2, ~(CONFIG_CACHELINE_SIZE - 1)
132 li t2, CONFIG_CACHELINE_SIZE
134 b __kernel_flush_check
138 cache Hit_Writeback_Inv_D, 0(t0)
139 cache Hit_Invalidate_I, 0(t0)
142 __kernel_flush_check:
143 bne t0, t1, __kernel_flush_line