1 From 298e990777004a6a72b1c95af5a2cd984c56135d Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Sat, 23 Mar 2013 19:44:41 +0100
4 Subject: [PATCH 03/33] MIPS: ralink: add support for periodic timer irq
6 Adds a driver for the periodic timer found on Ralink SoC.
8 Signed-off-by: John Crispin <blogic@openwrt.org>
10 arch/mips/ralink/Makefile | 2 +-
11 arch/mips/ralink/timer.c | 192 +++++++++++++++++++++++++++++++++++++++++++++
12 2 files changed, 193 insertions(+), 1 deletion(-)
13 create mode 100644 arch/mips/ralink/timer.c
15 --- a/arch/mips/ralink/Makefile
16 +++ b/arch/mips/ralink/Makefile
18 # Copyright (C) 2009-2011 Gabor Juhos <juhosg@openwrt.org>
19 # Copyright (C) 2013 John Crispin <blogic@openwrt.org>
21 -obj-y := prom.o of.o reset.o clk.o irq.o pinmux.o
22 +obj-y := prom.o of.o reset.o clk.o irq.o pinmux.o timer.o
24 obj-$(CONFIG_SOC_RT288X) += rt288x.o
25 obj-$(CONFIG_SOC_RT305X) += rt305x.o
27 +++ b/arch/mips/ralink/timer.c
30 + * This program is free software; you can redistribute it and/or modify it
31 + * under the terms of the GNU General Public License version 2 as published
32 + * by the Free Software Foundation.
34 + * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
37 +#include <linux/module.h>
38 +#include <linux/platform_device.h>
39 +#include <linux/interrupt.h>
40 +#include <linux/timer.h>
41 +#include <linux/of_gpio.h>
42 +#include <linux/clk.h>
44 +#include <asm/mach-ralink/ralink_regs.h>
46 +#define TIMER_REG_TMRSTAT 0x00
47 +#define TIMER_REG_TMR0LOAD 0x10
48 +#define TIMER_REG_TMR0CTL 0x18
50 +#define TMRSTAT_TMR0INT BIT(0)
52 +#define TMR0CTL_ENABLE BIT(7)
53 +#define TMR0CTL_MODE_PERIODIC BIT(4)
54 +#define TMR0CTL_PRESCALER 1
55 +#define TMR0CTL_PRESCALE_VAL (0xf - TMR0CTL_PRESCALER)
56 +#define TMR0CTL_PRESCALE_DIV (65536 / BIT(TMR0CTL_PRESCALER))
60 + void __iomem *membase;
62 + unsigned long timer_freq;
63 + unsigned long timer_div;
66 +static inline void rt_timer_w32(struct rt_timer *rt, u8 reg, u32 val)
68 + __raw_writel(val, rt->membase + reg);
71 +static inline u32 rt_timer_r32(struct rt_timer *rt, u8 reg)
73 + return __raw_readl(rt->membase + reg);
76 +static irqreturn_t rt_timer_irq(int irq, void *_rt)
78 + struct rt_timer *rt = (struct rt_timer *) _rt;
80 + rt_timer_w32(rt, TIMER_REG_TMR0LOAD, rt->timer_freq / rt->timer_div);
81 + rt_timer_w32(rt, TIMER_REG_TMRSTAT, TMRSTAT_TMR0INT);
87 +static int rt_timer_request(struct rt_timer *rt)
89 + int err = request_irq(rt->irq, rt_timer_irq, IRQF_DISABLED,
90 + dev_name(rt->dev), rt);
92 + dev_err(rt->dev, "failed to request irq\n");
94 + u32 t = TMR0CTL_MODE_PERIODIC | TMR0CTL_PRESCALE_VAL;
95 + rt_timer_w32(rt, TIMER_REG_TMR0CTL, t);
100 +static void rt_timer_free(struct rt_timer *rt)
102 + free_irq(rt->irq, rt);
105 +static int rt_timer_config(struct rt_timer *rt, unsigned long divisor)
107 + if (rt->timer_freq < divisor)
108 + rt->timer_div = rt->timer_freq;
110 + rt->timer_div = divisor;
112 + rt_timer_w32(rt, TIMER_REG_TMR0LOAD, rt->timer_freq / rt->timer_div);
117 +static int rt_timer_enable(struct rt_timer *rt)
121 + rt_timer_w32(rt, TIMER_REG_TMR0LOAD, rt->timer_freq / rt->timer_div);
123 + t = rt_timer_r32(rt, TIMER_REG_TMR0CTL);
124 + t |= TMR0CTL_ENABLE;
125 + rt_timer_w32(rt, TIMER_REG_TMR0CTL, t);
130 +static void rt_timer_disable(struct rt_timer *rt)
134 + t = rt_timer_r32(rt, TIMER_REG_TMR0CTL);
135 + t &= ~TMR0CTL_ENABLE;
136 + rt_timer_w32(rt, TIMER_REG_TMR0CTL, t);
139 +static int rt_timer_probe(struct platform_device *pdev)
141 + struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
142 + struct rt_timer *rt;
146 + dev_err(&pdev->dev, "no memory resource found\n");
150 + rt = devm_kzalloc(&pdev->dev, sizeof(*rt), GFP_KERNEL);
152 + dev_err(&pdev->dev, "failed to allocate memory\n");
156 + rt->irq = platform_get_irq(pdev, 0);
158 + dev_err(&pdev->dev, "failed to load irq\n");
162 + rt->membase = devm_request_and_ioremap(&pdev->dev, res);
163 + if (!rt->membase) {
164 + dev_err(&pdev->dev, "failed to ioremap\n");
168 + clk = devm_clk_get(&pdev->dev, NULL);
170 + dev_err(&pdev->dev, "failed get clock rate\n");
171 + return PTR_ERR(clk);
174 + rt->timer_freq = clk_get_rate(clk) / TMR0CTL_PRESCALE_DIV;
175 + if (!rt->timer_freq)
178 + rt->dev = &pdev->dev;
179 + platform_set_drvdata(pdev, rt);
181 + rt_timer_request(rt);
182 + rt_timer_config(rt, 2);
183 + rt_timer_enable(rt);
185 + dev_info(&pdev->dev, "maximum frequncy is %luHz\n", rt->timer_freq);
190 +static int rt_timer_remove(struct platform_device *pdev)
192 + struct rt_timer *rt = platform_get_drvdata(pdev);
194 + rt_timer_disable(rt);
200 +static const struct of_device_id rt_timer_match[] = {
201 + { .compatible = "ralink,rt2880-timer" },
204 +MODULE_DEVICE_TABLE(of, rt_timer_match);
206 +static struct platform_driver rt_timer_driver = {
207 + .probe = rt_timer_probe,
208 + .remove = rt_timer_remove,
210 + .name = "rt-timer",
211 + .owner = THIS_MODULE,
212 + .of_match_table = rt_timer_match
216 +module_platform_driver(rt_timer_driver);
218 +MODULE_DESCRIPTION("Ralink RT2880 timer");
219 +MODULE_AUTHOR("John Crispin <blogic@openwrt.org");
220 +MODULE_LICENSE("GPL");