1 From 2a9b5a9fc1a0707b95dbe61dd1c30b9337cb457d Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Sun, 16 Mar 2014 05:26:34 +0000
4 Subject: [PATCH 212/215] GPIO: ralink: add mt7621 gpio controller
6 Signed-off-by: John Crispin <blogic@openwrt.org>
8 arch/mips/Kconfig | 5 +-
9 drivers/gpio/Kconfig | 6 ++
10 drivers/gpio/Makefile | 1 +
11 drivers/gpio/gpio-mt7621.c | 183 ++++++++++++++++++++++++++++++++++++++++++++
12 4 files changed, 194 insertions(+), 1 deletion(-)
13 create mode 100644 drivers/gpio/gpio-mt7621.c
15 Index: linux-3.10.32/arch/mips/Kconfig
16 ===================================================================
17 --- linux-3.10.32.orig/arch/mips/Kconfig 2014-03-18 11:00:30.945639822 +0000
18 +++ linux-3.10.32/arch/mips/Kconfig 2014-03-18 11:00:31.325639806 +0000
20 select ARCH_REQUIRE_GPIOLIB
24 + select ARCH_HAS_RESET_CONTROLLER
25 + select RESET_CONTROLLER
26 + select ARCH_REQUIRE_GPIOLIB
29 bool "SGI IP22 (Indy/Indigo2)"
31 Index: linux-3.10.32/drivers/gpio/Kconfig
32 ===================================================================
33 --- linux-3.10.32.orig/drivers/gpio/Kconfig 2014-03-18 11:00:30.653639834 +0000
34 +++ linux-3.10.32/drivers/gpio/Kconfig 2014-03-18 11:02:01.901636126 +0000
36 Enable support for GPIO on intel MSIC controllers found in
40 + bool "Mediatek GPIO Support"
41 + depends on SOC_MT7621
43 + Say yes here to support the Mediatek SoC GPIO device
45 comment "USB GPIO expanders:"
47 config GPIO_VIPERBOARD
48 Index: linux-3.10.32/drivers/gpio/Makefile
49 ===================================================================
50 --- linux-3.10.32.orig/drivers/gpio/Makefile 2014-03-18 11:00:30.653639834 +0000
51 +++ linux-3.10.32/drivers/gpio/Makefile 2014-03-18 11:00:31.325639806 +0000
53 obj-$(CONFIG_GPIO_WM8350) += gpio-wm8350.o
54 obj-$(CONFIG_GPIO_WM8994) += gpio-wm8994.o
55 obj-$(CONFIG_GPIO_XILINX) += gpio-xilinx.o
56 +obj-$(CONFIG_GPIO_MT7621) += gpio-mt7621.o
57 Index: linux-3.10.32/drivers/gpio/gpio-mt7621.c
58 ===================================================================
59 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
60 +++ linux-3.10.32/drivers/gpio/gpio-mt7621.c 2014-03-18 11:00:31.325639806 +0000
63 + * This program is free software; you can redistribute it and/or modify it
64 + * under the terms of the GNU General Public License version 2 as published
65 + * by the Free Software Foundation.
67 + * Copyright (C) 2009-2011 Gabor Juhos <juhosg@openwrt.org>
68 + * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
71 +#include <linux/io.h>
72 +#include <linux/err.h>
73 +#include <linux/gpio.h>
74 +#include <linux/module.h>
75 +#include <linux/of_irq.h>
76 +#include <linux/spinlock.h>
77 +#include <linux/irqdomain.h>
78 +#include <linux/interrupt.h>
79 +#include <linux/platform_device.h>
81 +#define MTK_BANK_WIDTH 32
83 +enum mediatek_gpio_reg {
91 +static void __iomem *mtk_gc_membase;
94 + struct gpio_chip chip;
100 +gpio_to_irq(unsigned gpio)
105 +static inline struct mtk_gc
106 +*to_mediatek_gpio(struct gpio_chip *chip)
108 + struct mtk_gc *mgc;
110 + mgc = container_of(chip, struct mtk_gc, chip);
116 +mtk_gpio_w32(struct mtk_gc *rg, u8 reg, u32 val)
118 + iowrite32(val, mtk_gc_membase + (reg * 0x10) + (rg->bank * 0x4));
122 +mtk_gpio_r32(struct mtk_gc *rg, u8 reg)
124 + return ioread32(mtk_gc_membase + (reg * 0x10) + (rg->bank * 0x4));
128 +mediatek_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
130 + struct mtk_gc *rg = to_mediatek_gpio(chip);
132 + mtk_gpio_w32(rg, (value) ? GPIO_REG_DSET : GPIO_REG_DCLR, BIT(offset));
136 +mediatek_gpio_get(struct gpio_chip *chip, unsigned offset)
138 + struct mtk_gc *rg = to_mediatek_gpio(chip);
140 + return !!(mtk_gpio_r32(rg, GPIO_REG_DATA) & BIT(offset));
144 +mediatek_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
146 + struct mtk_gc *rg = to_mediatek_gpio(chip);
147 + unsigned long flags;
150 + spin_lock_irqsave(&rg->lock, flags);
151 + t = mtk_gpio_r32(rg, GPIO_REG_CTRL);
153 + mtk_gpio_w32(rg, GPIO_REG_CTRL, t);
154 + spin_unlock_irqrestore(&rg->lock, flags);
160 +mediatek_gpio_direction_output(struct gpio_chip *chip,
161 + unsigned offset, int value)
163 + struct mtk_gc *rg = to_mediatek_gpio(chip);
164 + unsigned long flags;
167 + spin_lock_irqsave(&rg->lock, flags);
168 + t = mtk_gpio_r32(rg, GPIO_REG_CTRL);
170 + mtk_gpio_w32(rg, GPIO_REG_CTRL, t);
171 + mediatek_gpio_set(chip, offset, value);
172 + spin_unlock_irqrestore(&rg->lock, flags);
178 +mediatek_gpio_bank_probe(struct platform_device *pdev, struct device_node *bank)
180 + const __be32 *id = of_get_property(bank, "reg", NULL);
181 + struct mtk_gc *rg = devm_kzalloc(&pdev->dev,
182 + sizeof(struct mtk_gc), GFP_KERNEL);
186 + spin_lock_init(&rg->lock);
188 + rg->chip.dev = &pdev->dev;
189 + rg->chip.label = dev_name(&pdev->dev);
190 + rg->chip.of_node = bank;
191 + rg->chip.base = MTK_BANK_WIDTH * be32_to_cpu(*id);
192 + rg->chip.ngpio = MTK_BANK_WIDTH;
193 + rg->chip.direction_input = mediatek_gpio_direction_input;
194 + rg->chip.direction_output = mediatek_gpio_direction_output;
195 + rg->chip.get = mediatek_gpio_get;
196 + rg->chip.set = mediatek_gpio_set;
198 + /* set polarity to low for all gpios */
199 + mtk_gpio_w32(rg, GPIO_REG_POL, 0);
201 + dev_info(&pdev->dev, "registering %d gpios\n", rg->chip.ngpio);
203 + return gpiochip_add(&rg->chip);
207 +mediatek_gpio_probe(struct platform_device *pdev)
209 + struct device_node *bank, *np = pdev->dev.of_node;
210 + struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
212 + mtk_gc_membase = devm_request_and_ioremap(&pdev->dev, res);
213 + if (IS_ERR(mtk_gc_membase))
214 + return PTR_ERR(mtk_gc_membase);
216 + for_each_child_of_node(np, bank)
217 + if (of_device_is_compatible(bank, "mtk,mt7621-gpio-bank"))
218 + mediatek_gpio_bank_probe(pdev, bank);
223 +static const struct of_device_id mediatek_gpio_match[] = {
224 + { .compatible = "mtk,mt7621-gpio" },
227 +MODULE_DEVICE_TABLE(of, mediatek_gpio_match);
229 +static struct platform_driver mediatek_gpio_driver = {
230 + .probe = mediatek_gpio_probe,
232 + .name = "mt7621_gpio",
233 + .owner = THIS_MODULE,
234 + .of_match_table = mediatek_gpio_match,
239 +mediatek_gpio_init(void)
241 + return platform_driver_register(&mediatek_gpio_driver);
244 +subsys_initcall(mediatek_gpio_init);