1 From efc0f99cebcab21dbabcc634b9dbb963bbbbcab8 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Sun, 27 Jul 2014 09:23:36 +0100
4 Subject: [PATCH 07/57] MIPS: ralink: add support for MT7620n
6 This is the small version of MT7620a.
8 Signed-off-by: John Crispin <blogic@openwrt.org>
10 arch/mips/include/asm/mach-ralink/mt7620.h | 7 ++-----
11 arch/mips/ralink/mt7620.c | 19 ++++++++++++-------
12 2 files changed, 14 insertions(+), 12 deletions(-)
14 diff --git a/arch/mips/include/asm/mach-ralink/mt7620.h b/arch/mips/include/asm/mach-ralink/mt7620.h
15 index 7ff9290..27b2fa9 100644
16 --- a/arch/mips/include/asm/mach-ralink/mt7620.h
17 +++ b/arch/mips/include/asm/mach-ralink/mt7620.h
19 #define SYSC_REG_CPLL_CONFIG0 0x54
20 #define SYSC_REG_CPLL_CONFIG1 0x58
22 -#define MT7620N_CHIP_NAME0 0x33365452
23 -#define MT7620N_CHIP_NAME1 0x20203235
25 -#define MT7620A_CHIP_NAME0 0x3637544d
26 -#define MT7620A_CHIP_NAME1 0x20203032
27 +#define MT7620_CHIP_NAME0 0x3637544d
28 +#define MT7620_CHIP_NAME1 0x20203032
30 #define SYSCFG0_XTAL_FREQ_SEL BIT(6)
32 diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c
33 index 5846817..4fdee17 100644
34 --- a/arch/mips/ralink/mt7620.c
35 +++ b/arch/mips/ralink/mt7620.c
36 @@ -357,22 +357,27 @@ void prom_soc_init(struct ralink_soc_info *soc_info)
42 n0 = __raw_readl(sysc + SYSC_REG_CHIP_NAME0);
43 n1 = __raw_readl(sysc + SYSC_REG_CHIP_NAME1);
44 + rev = __raw_readl(sysc + SYSC_REG_CHIP_REV);
45 + bga = (rev >> CHIP_REV_PKG_SHIFT) & CHIP_REV_PKG_MASK;
47 - if (n0 == MT7620N_CHIP_NAME0 && n1 == MT7620N_CHIP_NAME1) {
49 - soc_info->compatible = "ralink,mt7620n-soc";
50 - } else if (n0 == MT7620A_CHIP_NAME0 && n1 == MT7620A_CHIP_NAME1) {
51 + if (n0 != MT7620_CHIP_NAME0 || n1 != MT7620_CHIP_NAME1)
52 + panic("mt7620: unknown SoC, n0:%08x n1:%08x\n", n0, n1);
56 soc_info->compatible = "ralink,mt7620a-soc";
58 - panic("mt7620: unknown SoC, n0:%08x n1:%08x", n0, n1);
60 + soc_info->compatible = "ralink,mt7620n-soc";
62 + panic("mt7620n is only supported for non pci kernels");
66 - rev = __raw_readl(sysc + SYSC_REG_CHIP_REV);
68 snprintf(soc_info->sys_type, RAMIPS_SYS_TYPE_LEN,
69 "Ralink %s ver:%u eco:%u",