1 From 34e2a5ededc6140f311b3b3c88edf4e18e88126a Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Fri, 24 Jan 2014 17:01:22 +0100
4 Subject: [PATCH 14/57] MIPS: ralink: add MT7621 dts file
6 Signed-off-by: John Crispin <blogic@openwrt.org>
8 arch/mips/ralink/dts/Makefile | 1 +
9 arch/mips/ralink/dts/mt7621.dtsi | 257 ++++++++++++++++++++++++++++++++++
10 arch/mips/ralink/dts/mt7621_eval.dts | 16 +++
11 3 files changed, 274 insertions(+)
12 create mode 100644 arch/mips/ralink/dts/mt7621.dtsi
13 create mode 100644 arch/mips/ralink/dts/mt7621_eval.dts
15 diff --git a/arch/mips/ralink/dts/Makefile b/arch/mips/ralink/dts/Makefile
16 index 18194fa..9742c73 100644
17 --- a/arch/mips/ralink/dts/Makefile
18 +++ b/arch/mips/ralink/dts/Makefile
19 @@ -2,3 +2,4 @@ obj-$(CONFIG_DTB_RT2880_EVAL) := rt2880_eval.dtb.o
20 obj-$(CONFIG_DTB_RT305X_EVAL) := rt3052_eval.dtb.o
21 obj-$(CONFIG_DTB_RT3883_EVAL) := rt3883_eval.dtb.o
22 obj-$(CONFIG_DTB_MT7620A_EVAL) := mt7620a_eval.dtb.o
23 +obj-$(CONFIG_DTB_MT7621_EVAL) := mt7621_eval.dtb.o
24 diff --git a/arch/mips/ralink/dts/mt7621.dtsi b/arch/mips/ralink/dts/mt7621.dtsi
26 index 0000000..6db2c57
28 +++ b/arch/mips/ralink/dts/mt7621.dtsi
31 + #address-cells = <1>;
33 + compatible = "ralink,mtk7620a-soc";
37 + compatible = "mips,mips24KEc";
41 + cpuintc: cpuintc@0 {
42 + #address-cells = <0>;
43 + #interrupt-cells = <1>;
44 + interrupt-controller;
45 + compatible = "mti,cpu-interrupt-controller";
49 + compatible = "palmbus";
50 + reg = <0x1E000000 0x100000>;
51 + ranges = <0x0 0x1E000000 0x0FFFFF>;
53 + #address-cells = <1>;
57 + compatible = "mtk,mt7621-sysc";
62 + compatible = "mtk,mt7621-wdt";
63 + reg = <0x100 0x100>;
67 + #address-cells = <1>;
70 + compatible = "mtk,mt7621-gpio";
71 + reg = <0x600 0x100>;
75 + compatible = "mtk,mt7621-gpio-bank";
82 + compatible = "mtk,mt7621-gpio-bank";
89 + compatible = "mtk,mt7621-gpio-bank";
96 + compatible = "mtk,mt7621-memc";
97 + reg = <0x300 0x100>;
101 + compatible = "ns16550a";
102 + reg = <0xc00 0x100>;
104 + interrupt-parent = <&gic>;
108 + reg-io-width = <4>;
113 + compatible = "ns16550a";
114 + reg = <0xd00 0x100>;
116 + interrupt-parent = <&gic>;
121 + reg-io-width = <4>;
128 + compatible = "ralink,mt7621-spi";
129 + reg = <0xb00 0x100>;
131 + resets = <&rstctrl 18>;
132 + reset-names = "spi";
134 + #address-cells = <1>;
137 +/* pinctrl-names = "default";
138 + pinctrl-0 = <&spi_pins>;*/
141 + #address-cells = <1>;
143 + compatible = "en25q64";
145 + linux,modalias = "m25p80", "en25q64";
146 + spi-max-frequency = <10000000>;
152 + reg = <0x0 0x30000>;
157 + label = "u-boot-env";
158 + reg = <0x30000 0x10000>;
162 + factory: partition@40000 {
164 + reg = <0x40000 0x10000>;
169 + label = "firmware";
170 + reg = <0x50000 0x7a0000>;
175 + reg = <0x7f0000 0x10000>;
182 + compatible = "ralink,rt2880-reset";
183 + #reset-cells = <1>;
187 + compatible = "ralink,mt7620a-sdhci";
188 + reg = <0x1E130000 4000>;
190 + interrupt-parent = <&gic>;
195 + compatible = "xhci-platform";
196 + reg = <0x1E1C0000 4000>;
198 + interrupt-parent = <&gic>;
202 + gic: gic@1fbc0000 {
203 + #address-cells = <0>;
204 + #interrupt-cells = <1>;
205 + interrupt-controller;
206 + compatible = "ralink,mt7621-gic";
207 + reg = < 0x1fbc0000 0x80 /* gic */
208 + 0x1fbf0000 0x8000 /* cpc */
209 + 0x1fbf8000 0x8000 /* gpmc */
214 + compatible = "mtk,mt7621-nand";
216 + reg = <0x1e003000 0x800
218 + #address-cells = <1>;
223 + reg = <0x00000 0x80000>; /* 64 KB */
226 + label = "uboot_env";
227 + reg = <0x80000 0x80000>; /* 64 KB */
231 + reg = <0x100000 0x40000>;
235 + reg = <0x140000 0xec0000>;
239 + ethernet@1e100000 {
240 + compatible = "ralink,mt7621-eth";
241 + reg = <0x1e100000 10000>;
243 + #address-cells = <1>;
246 + ralink,port-map = "llllw";
248 + interrupt-parent = <&gic>;
251 +/* resets = <&rstctrl 21 &rstctrl 23>;
252 + reset-names = "fe", "esw";
255 + compatible = "ralink,mt7620a-gsw-port", "ralink,eth-port";
258 + status = "disabled";
262 + compatible = "ralink,mt7620a-gsw-port", "ralink,eth-port";
265 + status = "disabled";
269 + #address-cells = <1>;
272 + phy1f: ethernet-phy@1f {
274 + phy-mode = "rgmii";
276 +/* interrupt-parent = <&gic>;
283 + compatible = "ralink,mt7620a-gsw";
284 + reg = <0x1e110000 8000>;
287 diff --git a/arch/mips/ralink/dts/mt7621_eval.dts b/arch/mips/ralink/dts/mt7621_eval.dts
289 index 0000000..834f59c
291 +++ b/arch/mips/ralink/dts/mt7621_eval.dts
295 +/include/ "mt7621.dtsi"
298 + compatible = "ralink,mt7621-eval-board", "ralink,mt7621-soc";
299 + model = "Ralink MT7621 evaluation board";
302 + reg = <0x0 0x2000000>;
306 + bootargs = "console=ttyS0,57600";