target/linux/ramips/patches-3.14/0024-MIPS-ralink-add-mt7628an-devicetree-files.patch

   1 From fbc9fb0c2d30f2141e1b0b824f473276c3aef528 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Wed, 6 Aug 2014 17:53:24 +0200
   4 Subject: [PATCH 24/57] MIPS: ralink: add mt7628an devicetree files
   5
   6 Signed-off-by: John Crispin <blogic@openwrt.org>
   7 ---
   8  arch/mips/ralink/Kconfig               |    4 +
   9  arch/mips/ralink/dts/Makefile          |    1 +
  10  arch/mips/ralink/dts/mt7628an.dtsi     |  184 ++++++++++++++++++++++++++++++++
  11  arch/mips/ralink/dts/mt7628an_eval.dts |   54 ++++++++++
  12  4 files changed, 243 insertions(+)
  13  create mode 100644 arch/mips/ralink/dts/mt7628an.dtsi
  14  create mode 100644 arch/mips/ralink/dts/mt7628an_eval.dts
  15
  16 --- a/arch/mips/ralink/Kconfig
  17 +++ b/arch/mips/ralink/Kconfig
  18 @@ -75,6 +75,10 @@ choice
  19                 bool "MT7620A eval kit"
  20                 depends on SOC_MT7620
  21
  22 +       config DTB_MT7628AN_EVAL
  23 +               bool "MT7620A eval kit"
  24 +               depends on SOC_MT7620
  25 +
  26         config DTB_MT7621_EVAL
  27                 bool "MT7621 eval kit"
  28                 depends on SOC_MT7621
  29 --- a/arch/mips/ralink/dts/Makefile
  30 +++ b/arch/mips/ralink/dts/Makefile
  31 @@ -3,3 +3,4 @@ obj-$(CONFIG_DTB_RT305X_EVAL) := rt3052_
  32  obj-$(CONFIG_DTB_RT3883_EVAL) := rt3883_eval.dtb.o
  33  obj-$(CONFIG_DTB_MT7620A_EVAL) := mt7620a_eval.dtb.o
  34  obj-$(CONFIG_DTB_MT7621_EVAL) := mt7621_eval.dtb.o
  35 +obj-$(CONFIG_DTB_MT7628AN_EVAL) := mt7628an_eval.dtb.o
  36 --- /dev/null
  37 +++ b/arch/mips/ralink/dts/mt7628an.dtsi
  38 @@ -0,0 +1,184 @@
  39 +/ {
  40 +       #address-cells = <1>;
  41 +       #size-cells = <1>;
  42 +       compatible = "ralink,mtk7628an-soc";
  43 +
  44 +       cpus {
  45 +               cpu@0 {
  46 +                       compatible = "mips,mips24KEc";
  47 +               };
  48 +       };
  49 +
  50 +       cpuintc: cpuintc@0 {
  51 +               #address-cells = <0>;
  52 +               #interrupt-cells = <1>;
  53 +               interrupt-controller;
  54 +               compatible = "mti,cpu-interrupt-controller";
  55 +       };
  56 +
  57 +       palmbus@10000000 {
  58 +               compatible = "palmbus";
  59 +               reg = <0x10000000 0x200000>;
  60 +                ranges = <0x0 0x10000000 0x1FFFFF>;
  61 +
  62 +               #address-cells = <1>;
  63 +               #size-cells = <1>;
  64 +
  65 +               sysc@0 {
  66 +                       compatible = "ralink,mt7620a-sysc";
  67 +                       reg = <0x0 0x100>;
  68 +               };
  69 +
  70 +               watchdog@120 {
  71 +                       compatible = "ralink,mt7628an-wdt", "mtk,mt7621-wdt";
  72 +                       reg = <0x120 0x10>;
  73 +
  74 +                       resets = <&rstctrl 8>;
  75 +                       reset-names = "wdt";
  76 +
  77 +                       interrupt-parent = <&intc>;
  78 +                       interrupts = <24>;
  79 +               };
  80 +
  81 +               intc: intc@200 {
  82 +                       compatible = "ralink,mt7628an-intc", "ralink,rt2880-intc";
  83 +                       reg = <0x200 0x100>;
  84 +
  85 +                       resets = <&rstctrl 9>;
  86 +                       reset-names = "intc";
  87 +
  88 +                       interrupt-controller;
  89 +                       #interrupt-cells = <1>;
  90 +
  91 +                       interrupt-parent = <&cpuintc>;
  92 +                       interrupts = <2>;
  93 +
  94 +                       ralink,intc-registers = <0x9c 0xa0
  95 +                                                0x6c 0xa4
  96 +                                                0x80 0x78>;
  97 +               };
  98 +
  99 +               memc@300 {
 100 +                       compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
 101 +                       reg = <0x300 0x100>;
 102 +
 103 +                       resets = <&rstctrl 20>;
 104 +                       reset-names = "mc";
 105 +
 106 +                       interrupt-parent = <&intc>;
 107 +                       interrupts = <3>;
 108 +               };
 109 +
 110 +               gpio@600 {
 111 +                       #address-cells = <1>;
 112 +                       #size-cells = <0>;
 113 +
 114 +                       compatible = "mtk,mt7628-gpio", "mtk,mt7621-gpio";
 115 +                       reg = <0x600 0x100>;
 116 +
 117 +                       gpio0: bank@0 {
 118 +                               reg = <0>;
 119 +                               compatible = "mtk,mt7621-gpio-bank";
 120 +                               gpio-controller;
 121 +                               #gpio-cells = <2>;
 122 +                       };
 123 +
 124 +                       gpio1: bank@1 {
 125 +                               reg = <1>;
 126 +                               compatible = "mtk,mt7621-gpio-bank";
 127 +                               gpio-controller;
 128 +                               #gpio-cells = <2>;
 129 +                       };
 130 +
 131 +                       gpio2: bank@2 {
 132 +                               reg = <2>;
 133 +                               compatible = "mtk,mt7621-gpio-bank";
 134 +                               gpio-controller;
 135 +                               #gpio-cells = <2>;
 136 +                       };
 137 +               };
 138 +
 139 +               spi@b00 {
 140 +                       compatible = "ralink,mt7621-spi";
 141 +                       reg = <0xb00 0x100>;
 142 +
 143 +                       resets = <&rstctrl 18>;
 144 +                       reset-names = "spi";
 145 +
 146 +                       #address-cells = <1>;
 147 +                       #size-cells = <1>;
 148 +
 149 +                       pinctrl-names = "default";
 150 +                       pinctrl-0 = <&spi_pins>;
 151 +
 152 +                       status = "disabled";
 153 +               };
 154 +
 155 +               uartlite@c00 {
 156 +                       compatible = "ns16550a";
 157 +                       reg = <0xc00 0x100>;
 158 +
 159 +                       reg-shift = <2>;
 160 +                       reg-io-width = <4>;
 161 +                       no-loopback-test;
 162 +
 163 +                       resets = <&rstctrl 12>;
 164 +                       reset-names = "uartl";
 165 +
 166 +                       interrupt-parent = <&intc>;
 167 +                       interrupts = <20>;
 168 +
 169 +                       pinctrl-names = "default";
 170 +                       pinctrl-0 = <&uart0_pins>;
 171 +               };
 172 +       };
 173 +
 174 +       pinctrl {
 175 +               compatible = "ralink,rt2880-pinmux";
 176 +               pinctrl-names = "default";
 177 +               pinctrl-0 = <&state_default>;
 178 +               state_default: pinctrl0 {
 179 +               };
 180 +               spi_pins: spi {
 181 +                       spi {
 182 +                               ralink,group = "spi";
 183 +                               ralink,function = "spi";
 184 +                       };
 185 +               };
 186 +               uart0_pins: uartlite {
 187 +                       uart {
 188 +                               ralink,group = "uart0";
 189 +                               ralink,function = "uart";
 190 +                       };
 191 +               };
 192 +       };
 193 +
 194 +       rstctrl: rstctrl {
 195 +               compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
 196 +               #reset-cells = <1>;
 197 +       };
 198 +
 199 +       usbphy {
 200 +               compatible = "ralink,mt7628an-usbphy", "ralink,mt7620a-usbphy";
 201 +
 202 +               resets = <&rstctrl 22>;
 203 +               reset-names = "host";
 204 +       };
 205 +
 206 +       ehci@101c0000 {
 207 +               compatible = "ralink,rt3xxx-ehci";
 208 +               reg = <0x101c0000 0x1000>;
 209 +
 210 +               interrupt-parent = <&intc>;
 211 +               interrupts = <18>;
 212 +       };
 213 +
 214 +       ohci@101c1000 {
 215 +               compatible = "ralink,rt3xxx-ohci";
 216 +               reg = <0x101c1000 0x1000>;
 217 +
 218 +               interrupt-parent = <&intc>;
 219 +               interrupts = <18>;
 220 +       };
 221 +
 222 +};
 223 --- /dev/null
 224 +++ b/arch/mips/ralink/dts/mt7628an_eval.dts
 225 @@ -0,0 +1,54 @@
 226 +/dts-v1/;
 227 +
 228 +/include/ "mt7628an.dtsi"
 229 +
 230 +/ {
 231 +       compatible = "ralink,mt7628an-eval-board", "ralink,mt7628an-soc";
 232 +       model = "Ralink MT7628AN evaluation board";
 233 +
 234 +       memory@0 {
 235 +               reg = <0x0 0x2000000>;
 236 +       };
 237 +
 238 +       chosen {
 239 +               bootargs = "console=ttyS0,57600 init=/init";
 240 +       };
 241 +
 242 +       palmbus@10000000 {
 243 +               spi@b00 {
 244 +                       status = "okay";
 245 +
 246 +                       m25p80@0 {
 247 +                               #address-cells = <1>;
 248 +                               #size-cells = <1>;
 249 +                               compatible = "en25q64";
 250 +                               reg = <0 0>;
 251 +                               linux,modalias = "m25p80", "en25q64";
 252 +                               spi-max-frequency = <10000000>;
 253 +
 254 +                               partition@0 {
 255 +                                       label = "u-boot";
 256 +                                       reg = <0x0 0x30000>;
 257 +                                       read-only;
 258 +                               };
 259 +
 260 +                               partition@30000 {
 261 +                                       label = "u-boot-env";
 262 +                                       reg = <0x30000 0x10000>;
 263 +                                       read-only;
 264 +                               };
 265 +
 266 +                               factory: partition@40000 {
 267 +                                       label = "factory";
 268 +                                       reg = <0x40000 0x10000>;
 269 +                                       read-only;
 270 +                               };
 271 +
 272 +                               partition@50000 {
 273 +                                       label = "firmware";
 274 +                                       reg = <0x50000 0x7b0000>;
 275 +                               };
 276 +                       };
 277 +               };
 278 +       };
 279 +};