target/linux/ramips/patches-3.14/0024-MIPS-ralink-add-mt7628an-devicetree-files.patch

   1 From fbc9fb0c2d30f2141e1b0b824f473276c3aef528 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Wed, 6 Aug 2014 17:53:24 +0200
   4 Subject: [PATCH 24/57] MIPS: ralink: add mt7628an devicetree files
   5
   6 Signed-off-by: John Crispin <blogic@openwrt.org>
   7 ---
   8  arch/mips/ralink/Kconfig               |    4 +
   9  arch/mips/ralink/dts/Makefile          |    1 +
  10  arch/mips/ralink/dts/mt7628an.dtsi     |  184 ++++++++++++++++++++++++++++++++
  11  arch/mips/ralink/dts/mt7628an_eval.dts |   54 ++++++++++
  12  4 files changed, 243 insertions(+)
  13  create mode 100644 arch/mips/ralink/dts/mt7628an.dtsi
  14  create mode 100644 arch/mips/ralink/dts/mt7628an_eval.dts
  15
  16 diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
  17 index 6a04360..9174dbc 100644
  18 --- a/arch/mips/ralink/Kconfig
  19 +++ b/arch/mips/ralink/Kconfig
  20 @@ -75,6 +75,10 @@ choice
  21                 bool "MT7620A eval kit"
  22                 depends on SOC_MT7620
  23
  24 +       config DTB_MT7628AN_EVAL
  25 +               bool "MT7620A eval kit"
  26 +               depends on SOC_MT7620
  27 +
  28         config DTB_MT7621_EVAL
  29                 bool "MT7621 eval kit"
  30                 depends on SOC_MT7621
  31 diff --git a/arch/mips/ralink/dts/Makefile b/arch/mips/ralink/dts/Makefile
  32 index 9742c73..9f4e1c7 100644
  33 --- a/arch/mips/ralink/dts/Makefile
  34 +++ b/arch/mips/ralink/dts/Makefile
  35 @@ -3,3 +3,4 @@ obj-$(CONFIG_DTB_RT305X_EVAL) := rt3052_eval.dtb.o
  36  obj-$(CONFIG_DTB_RT3883_EVAL) := rt3883_eval.dtb.o
  37  obj-$(CONFIG_DTB_MT7620A_EVAL) := mt7620a_eval.dtb.o
  38  obj-$(CONFIG_DTB_MT7621_EVAL) := mt7621_eval.dtb.o
  39 +obj-$(CONFIG_DTB_MT7628AN_EVAL) := mt7628an_eval.dtb.o
  40 diff --git a/arch/mips/ralink/dts/mt7628an.dtsi b/arch/mips/ralink/dts/mt7628an.dtsi
  41 new file mode 100644
  42 index 0000000..fd17d0a
  43 --- /dev/null
  44 +++ b/arch/mips/ralink/dts/mt7628an.dtsi
  45 @@ -0,0 +1,184 @@
  46 +/ {
  47 +       #address-cells = <1>;
  48 +       #size-cells = <1>;
  49 +       compatible = "ralink,mtk7628an-soc";
  50 +
  51 +       cpus {
  52 +               cpu@0 {
  53 +                       compatible = "mips,mips24KEc";
  54 +               };
  55 +       };
  56 +
  57 +       cpuintc: cpuintc@0 {
  58 +               #address-cells = <0>;
  59 +               #interrupt-cells = <1>;
  60 +               interrupt-controller;
  61 +               compatible = "mti,cpu-interrupt-controller";
  62 +       };
  63 +
  64 +       palmbus@10000000 {
  65 +               compatible = "palmbus";
  66 +               reg = <0x10000000 0x200000>;
  67 +                ranges = <0x0 0x10000000 0x1FFFFF>;
  68 +
  69 +               #address-cells = <1>;
  70 +               #size-cells = <1>;
  71 +
  72 +               sysc@0 {
  73 +                       compatible = "ralink,mt7620a-sysc";
  74 +                       reg = <0x0 0x100>;
  75 +               };
  76 +
  77 +               watchdog@120 {
  78 +                       compatible = "ralink,mt7628an-wdt", "mtk,mt7621-wdt";
  79 +                       reg = <0x120 0x10>;
  80 +
  81 +                       resets = <&rstctrl 8>;
  82 +                       reset-names = "wdt";
  83 +
  84 +                       interrupt-parent = <&intc>;
  85 +                       interrupts = <24>;
  86 +               };
  87 +
  88 +               intc: intc@200 {
  89 +                       compatible = "ralink,mt7628an-intc", "ralink,rt2880-intc";
  90 +                       reg = <0x200 0x100>;
  91 +
  92 +                       resets = <&rstctrl 9>;
  93 +                       reset-names = "intc";
  94 +
  95 +                       interrupt-controller;
  96 +                       #interrupt-cells = <1>;
  97 +
  98 +                       interrupt-parent = <&cpuintc>;
  99 +                       interrupts = <2>;
 100 +
 101 +                       ralink,intc-registers = <0x9c 0xa0
 102 +                                                0x6c 0xa4
 103 +                                                0x80 0x78>;
 104 +               };
 105 +
 106 +               memc@300 {
 107 +                       compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
 108 +                       reg = <0x300 0x100>;
 109 +
 110 +                       resets = <&rstctrl 20>;
 111 +                       reset-names = "mc";
 112 +
 113 +                       interrupt-parent = <&intc>;
 114 +                       interrupts = <3>;
 115 +               };
 116 +
 117 +               gpio@600 {
 118 +                       #address-cells = <1>;
 119 +                       #size-cells = <0>;
 120 +
 121 +                       compatible = "mtk,mt7628-gpio", "mtk,mt7621-gpio";
 122 +                       reg = <0x600 0x100>;
 123 +
 124 +                       gpio0: bank@0 {
 125 +                               reg = <0>;
 126 +                               compatible = "mtk,mt7621-gpio-bank";
 127 +                               gpio-controller;
 128 +                               #gpio-cells = <2>;
 129 +                       };
 130 +
 131 +                       gpio1: bank@1 {
 132 +                               reg = <1>;
 133 +                               compatible = "mtk,mt7621-gpio-bank";
 134 +                               gpio-controller;
 135 +                               #gpio-cells = <2>;
 136 +                       };
 137 +
 138 +                       gpio2: bank@2 {
 139 +                               reg = <2>;
 140 +                               compatible = "mtk,mt7621-gpio-bank";
 141 +                               gpio-controller;
 142 +                               #gpio-cells = <2>;
 143 +                       };
 144 +               };
 145 +
 146 +               spi@b00 {
 147 +                       compatible = "ralink,mt7621-spi";
 148 +                       reg = <0xb00 0x100>;
 149 +
 150 +                       resets = <&rstctrl 18>;
 151 +                       reset-names = "spi";
 152 +
 153 +                       #address-cells = <1>;
 154 +                       #size-cells = <1>;
 155 +
 156 +                       pinctrl-names = "default";
 157 +                       pinctrl-0 = <&spi_pins>;
 158 +
 159 +                       status = "disabled";
 160 +               };
 161 +
 162 +               uartlite@c00 {
 163 +                       compatible = "ns16550a";
 164 +                       reg = <0xc00 0x100>;
 165 +
 166 +                       reg-shift = <2>;
 167 +                       reg-io-width = <4>;
 168 +                       no-loopback-test;
 169 +
 170 +                       resets = <&rstctrl 12>;
 171 +                       reset-names = "uartl";
 172 +
 173 +                       interrupt-parent = <&intc>;
 174 +                       interrupts = <20>;
 175 +
 176 +                       pinctrl-names = "default";
 177 +                       pinctrl-0 = <&uart0_pins>;
 178 +               };
 179 +       };
 180 +
 181 +       pinctrl {
 182 +               compatible = "ralink,rt2880-pinmux";
 183 +               pinctrl-names = "default";
 184 +               pinctrl-0 = <&state_default>;
 185 +               state_default: pinctrl0 {
 186 +               };
 187 +               spi_pins: spi {
 188 +                       spi {
 189 +                               ralink,group = "spi";
 190 +                               ralink,function = "spi";
 191 +                       };
 192 +               };
 193 +               uart0_pins: uartlite {
 194 +                       uart {
 195 +                               ralink,group = "uart0";
 196 +                               ralink,function = "uart";
 197 +                       };
 198 +               };
 199 +       };
 200 +
 201 +       rstctrl: rstctrl {
 202 +               compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
 203 +               #reset-cells = <1>;
 204 +       };
 205 +
 206 +       usbphy {
 207 +               compatible = "ralink,mt7628an-usbphy", "ralink,mt7620a-usbphy";
 208 +
 209 +               resets = <&rstctrl 22>;
 210 +               reset-names = "host";
 211 +       };
 212 +
 213 +       ehci@101c0000 {
 214 +               compatible = "ralink,rt3xxx-ehci";
 215 +               reg = <0x101c0000 0x1000>;
 216 +
 217 +               interrupt-parent = <&intc>;
 218 +               interrupts = <18>;
 219 +       };
 220 +
 221 +       ohci@101c1000 {
 222 +               compatible = "ralink,rt3xxx-ohci";
 223 +               reg = <0x101c1000 0x1000>;
 224 +
 225 +               interrupt-parent = <&intc>;
 226 +               interrupts = <18>;
 227 +       };
 228 +
 229 +};
 230 diff --git a/arch/mips/ralink/dts/mt7628an_eval.dts b/arch/mips/ralink/dts/mt7628an_eval.dts
 231 new file mode 100644
 232 index 0000000..132c29e
 233 --- /dev/null
 234 +++ b/arch/mips/ralink/dts/mt7628an_eval.dts
 235 @@ -0,0 +1,54 @@
 236 +/dts-v1/;
 237 +
 238 +/include/ "mt7628an.dtsi"
 239 +
 240 +/ {
 241 +       compatible = "ralink,mt7628an-eval-board", "ralink,mt7628an-soc";
 242 +       model = "Ralink MT7628AN evaluation board";
 243 +
 244 +       memory@0 {
 245 +               reg = <0x0 0x2000000>;
 246 +       };
 247 +
 248 +       chosen {
 249 +               bootargs = "console=ttyS0,57600 init=/init";
 250 +       };
 251 +
 252 +       palmbus@10000000 {
 253 +               spi@b00 {
 254 +                       status = "okay";
 255 +
 256 +                       m25p80@0 {
 257 +                               #address-cells = <1>;
 258 +                               #size-cells = <1>;
 259 +                               compatible = "en25q64";
 260 +                               reg = <0 0>;
 261 +                               linux,modalias = "m25p80", "en25q64";
 262 +                               spi-max-frequency = <10000000>;
 263 +
 264 +                               partition@0 {
 265 +                                       label = "u-boot";
 266 +                                       reg = <0x0 0x30000>;
 267 +                                       read-only;
 268 +                               };
 269 +
 270 +                               partition@30000 {
 271 +                                       label = "u-boot-env";
 272 +                                       reg = <0x30000 0x10000>;
 273 +                                       read-only;
 274 +                               };
 275 +
 276 +                               factory: partition@40000 {
 277 +                                       label = "factory";
 278 +                                       reg = <0x40000 0x10000>;
 279 +                                       read-only;
 280 +                               };
 281 +
 282 +                               partition@50000 {
 283 +                                       label = "firmware";
 284 +                                       reg = <0x50000 0x7b0000>;
 285 +                               };
 286 +                       };
 287 +               };
 288 +       };
 289 +};
 290 --
 291 1.7.10.4
 292