1 --- a/drivers/i2c/busses/Kconfig
2 +++ b/drivers/i2c/busses/Kconfig
3 @@ -714,6 +714,10 @@ config I2C_RALINK
4 tristate "Ralink I2C Controller"
8 + tristate "MT7621 I2C Controller"
11 config HAVE_S3C2410_I2C
14 --- a/drivers/i2c/busses/Makefile
15 +++ b/drivers/i2c/busses/Makefile
16 @@ -67,6 +67,7 @@ obj-$(CONFIG_I2C_PUV3) += i2c-puv3.o
17 obj-$(CONFIG_I2C_PXA) += i2c-pxa.o
18 obj-$(CONFIG_I2C_PXA_PCI) += i2c-pxa-pci.o
19 obj-$(CONFIG_I2C_RALINK) += i2c-ralink.o
20 +obj-$(CONFIG_I2C_MT7621) += i2c-mt7621.o
21 obj-$(CONFIG_I2C_QUP) += i2c-qup.o
22 obj-$(CONFIG_I2C_RIIC) += i2c-riic.o
23 obj-$(CONFIG_I2C_RK3X) += i2c-rk3x.o
25 +++ b/drivers/i2c/busses/i2c-mt7621.c
28 + * drivers/i2c/busses/i2c-mt7621.c
30 + * Copyright (C) 2013 Steven Liu <steven_liu@mediatek.com>
32 + * Improve driver for i2cdetect from i2c-tools to detect i2c devices on the bus.
33 + * (C) 2014 Sittisak <sittisaks@hotmail.com>
35 + * This software is licensed under the terms of the GNU General Public
36 + * License version 2, as published by the Free Software Foundation, and
37 + * may be copied, distributed, and modified under those terms.
39 + * This program is distributed in the hope that it will be useful,
40 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
41 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
42 + * GNU General Public License for more details.
46 +#include <linux/interrupt.h>
47 +#include <linux/kernel.h>
48 +#include <linux/module.h>
49 +#include <linux/reset.h>
50 +#include <linux/delay.h>
51 +#include <linux/slab.h>
52 +#include <linux/init.h>
53 +#include <linux/errno.h>
54 +#include <linux/platform_device.h>
55 +#include <linux/i2c.h>
56 +#include <linux/io.h>
57 +#include <linux/err.h>
59 +#include <asm/mach-ralink/ralink_regs.h>
61 +#define REG_CONFIG_REG 0x00
62 +#define REG_CLKDIV_REG 0x04
63 +#define REG_DEVADDR_REG 0x08
64 +#define REG_ADDR_REG 0x0C
65 +#define REG_DATAOUT_REG 0x10
66 +#define REG_DATAIN_REG 0x14
67 +#define REG_STATUS_REG 0x18
68 +#define REG_STARTXFR_REG 0x1C
69 +#define REG_BYTECNT_REG 0x20
70 +#define REG_SM0_IS_AUTOMODE 0x28
71 +#define REG_SM0CTL0 0x40
74 +#define I2C_STARTERR 0x10
75 +#define I2C_ACKERR 0x08
76 +#define I2C_DATARDY 0x04
77 +#define I2C_SDOEMPTY 0x02
78 +#define I2C_BUSY 0x01
80 +/* I2C_CFG register bit field */
81 +#define I2C_CFG_ADDRLEN_8 (7<<5) /* 8 bits */
82 +#define I2C_CFG_DEVADLEN_7 (6<<2)
83 +#define I2C_CFG_ADDRDIS BIT(1)
84 +#define I2C_CFG_DEVADDIS BIT(0)
86 +#define I2C_CFG_DEFAULT (I2C_CFG_ADDRLEN_8 | \
87 + I2C_CFG_DEVADLEN_7 | \
90 +#define I2C_RETRY 0x1000
92 +#define CLKDIV_VALUE 333
93 +#define i2c_busy_loop (CLKDIV_VALUE*30)
95 +#define READ_CMD 0x01
96 +#define WRITE_CMD 0x00
97 +#define READ_BLOCK 16
99 +#define SM0_ODRAIN BIT(31)
100 +#define SM0_VSYNC_MODE BIT(28)
101 +#define SM0_CLK_DIV (CLKDIV_VALUE << 16)
102 +#define SM0_WAIT_LEVEL BIT(6)
103 +#define SM0_EN BIT(1)
105 +#define SM0_CFG_DEFUALT (SM0_ODRAIN | SM0_VSYNC_MODE | \
106 + SM0_CLK_DIV | SM0_WAIT_LEVEL | \
108 +/***********************************************************/
110 +static void __iomem *membase;
111 +static struct i2c_adapter *adapter;
113 +static void rt_i2c_w32(u32 val, unsigned reg)
115 + iowrite32(val, membase + reg);
118 +static u32 rt_i2c_r32(unsigned reg)
120 + return ioread32(membase + reg);
123 +static void mt7621_i2c_reset(struct i2c_adapter *a)
125 + device_reset(a->dev.parent);
127 +static void mt7621_i2c_enable(struct i2c_msg *msg)
129 + rt_i2c_w32(msg->addr,REG_DEVADDR_REG);
130 + rt_i2c_w32(0,REG_ADDR_REG);
133 +static void i2c_master_init(struct i2c_adapter *a)
135 + mt7621_i2c_reset(a);
136 + rt_i2c_w32(I2C_CFG_DEFAULT,REG_CONFIG_REG);
137 + rt_i2c_w32(SM0_CFG_DEFUALT,REG_SM0CTL0);
138 + rt_i2c_w32(1,REG_SM0_IS_AUTOMODE);//auto mode
142 +static inline int rt_i2c_wait_rx_done(void)
145 + while((!(rt_i2c_r32(REG_STATUS_REG) & I2C_DATARDY)) && (i<i2c_busy_loop))
147 + if(i>=i2c_busy_loop){
148 + pr_err("err,wait for idle timeout");
154 +static inline int rt_i2c_wait_idle(void)
157 + while((rt_i2c_r32(REG_STATUS_REG) & I2C_BUSY) && (i<i2c_busy_loop))
159 + if(i>=i2c_busy_loop){
160 + pr_err("err,wait for idle timeout");
166 +static inline int rt_i2c_wait_tx_done(void)
169 + while((!(rt_i2c_r32(REG_STATUS_REG) & I2C_SDOEMPTY)) && (i<i2c_busy_loop))
171 + if(i>=i2c_busy_loop){
172 + pr_err("err,wait for idle timeout");
178 +static int rt_i2c_handle_msg(struct i2c_adapter *a, struct i2c_msg* msg)
180 + int i = 0, j = 0, pos = 0;
181 + int nblock = msg->len / READ_BLOCK;
182 + int rem = msg->len % READ_BLOCK;
184 + if (msg->flags & I2C_M_TEN) {
185 + printk("10 bits addr not supported\n");
189 + if (msg->flags & I2C_M_RD) {
190 + for (i = 0; i < nblock; i++) {
191 + if (rt_i2c_wait_idle())
193 + rt_i2c_w32(READ_BLOCK - 1, REG_BYTECNT_REG);
194 + rt_i2c_w32(READ_CMD, REG_STARTXFR_REG);
195 + for (j = 0; j < READ_BLOCK; j++) {
196 + if (rt_i2c_wait_rx_done())
198 + msg->buf[pos++] = rt_i2c_r32(REG_DATAIN_REG);
202 + if (rt_i2c_wait_idle())
204 + rt_i2c_w32(rem - 1, REG_BYTECNT_REG);
205 + rt_i2c_w32(READ_CMD, REG_STARTXFR_REG);
207 + for (i = 0; i < rem; i++) {
208 + if (rt_i2c_wait_rx_done())
210 + msg->buf[pos++] = rt_i2c_r32(REG_DATAIN_REG);
213 + if (rt_i2c_wait_idle())
215 + rt_i2c_w32(msg->len - 1, REG_BYTECNT_REG);
216 + for (i = 0; i < msg->len; i++) {
217 + rt_i2c_w32(msg->buf[i], REG_DATAOUT_REG);
219 + rt_i2c_w32(WRITE_CMD, REG_STARTXFR_REG);
221 + if (rt_i2c_wait_tx_done())
231 +static int rt_i2c_master_xfer(struct i2c_adapter *a, struct i2c_msg *m, int n)
235 + i2c_master_init(a);
236 + mt7621_i2c_enable(m);
238 + for (i = 0; i != n && ret==0; i++) {
239 + ret = rt_i2c_handle_msg(a, &m[i]);
246 +static u32 rt_i2c_func(struct i2c_adapter *a)
248 + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
251 +static const struct i2c_algorithm rt_i2c_algo = {
252 + .master_xfer = rt_i2c_master_xfer,
253 + .functionality = rt_i2c_func,
256 +static int rt_i2c_probe(struct platform_device *pdev)
258 + struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
261 + adapter = devm_kzalloc(&pdev->dev,sizeof(struct i2c_adapter), GFP_KERNEL);
263 + dev_err(&pdev->dev, "failed to allocate i2c_adapter\n");
266 + membase = devm_ioremap_resource(&pdev->dev, res);
267 + if (IS_ERR(membase))
268 + return PTR_ERR(membase);
270 + strlcpy(adapter->name, dev_name(&pdev->dev), sizeof(adapter->name));
272 + adapter->owner = THIS_MODULE;
273 + adapter->nr = pdev->id;
274 + adapter->timeout = HZ;
275 + adapter->algo = &rt_i2c_algo;
276 + adapter->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
277 + adapter->dev.parent = &pdev->dev;
278 + adapter->dev.of_node = pdev->dev.of_node;
280 + platform_set_drvdata(pdev, adapter);
282 + ret = i2c_add_numbered_adapter(adapter);
286 + dev_info(&pdev->dev,"loaded");
291 +static int rt_i2c_remove(struct platform_device *pdev)
293 + platform_set_drvdata(pdev, NULL);
297 +static const struct of_device_id i2c_rt_dt_ids[] = {
298 + { .compatible = "ralink,i2c-mt7621", },
302 +MODULE_DEVICE_TABLE(of, i2c_rt_dt_ids);
304 +static struct platform_driver rt_i2c_driver = {
305 + .probe = rt_i2c_probe,
306 + .remove = rt_i2c_remove,
308 + .owner = THIS_MODULE,
309 + .name = "i2c-mt7621",
310 + .of_match_table = i2c_rt_dt_ids,
314 +static int __init i2c_rt_init (void)
316 + return platform_driver_register(&rt_i2c_driver);
319 +static void __exit i2c_rt_exit (void)
321 + platform_driver_unregister(&rt_i2c_driver);
323 +module_init (i2c_rt_init);
324 +module_exit (i2c_rt_exit);
326 +MODULE_AUTHOR("Steven Liu <steven_liu@mediatek.com>");
327 +MODULE_DESCRIPTION("MT7621 I2c host driver");
328 +MODULE_LICENSE("GPL");
329 +MODULE_ALIAS("platform:MT7621-I2C");