2 +++ b/arch/mips/include/asm/mach-ralink/mt7621/cpu-feature-overrides.h
5 + * Ralink MT7621 specific CPU feature overrides
7 + * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
8 + * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
9 + * Copyright (C) 2015 Felix Fietkau <nbd@openwrt.org>
11 + * This file was derived from: include/asm-mips/cpu-features.h
12 + * Copyright (C) 2003, 2004 Ralf Baechle
13 + * Copyright (C) 2004 Maciej W. Rozycki
15 + * This program is free software; you can redistribute it and/or modify it
16 + * under the terms of the GNU General Public License version 2 as published
17 + * by the Free Software Foundation.
20 +#ifndef _MT7621_CPU_FEATURE_OVERRIDES_H
21 +#define _MT7621_CPU_FEATURE_OVERRIDES_H
23 +#define cpu_has_tlb 1
24 +#define cpu_has_4kex 1
25 +#define cpu_has_3k_cache 0
26 +#define cpu_has_4k_cache 1
27 +#define cpu_has_tx39_cache 0
28 +#define cpu_has_sb1_cache 0
29 +#define cpu_has_fpu 0
30 +#define cpu_has_32fpr 0
31 +#define cpu_has_counter 1
32 +#define cpu_has_watch 1
33 +#define cpu_has_divec 1
35 +#define cpu_has_prefetch 1
36 +#define cpu_has_ejtag 1
37 +#define cpu_has_llsc 1
39 +#define cpu_has_mips16 1
40 +#define cpu_has_mdmx 0
41 +#define cpu_has_mips3d 0
42 +#define cpu_has_smartmips 0
44 +#define cpu_has_mips32r1 1
45 +#define cpu_has_mips32r2 1
46 +#define cpu_has_mips64r1 0
47 +#define cpu_has_mips64r2 0
49 +#define cpu_has_dsp 1
50 +#define cpu_has_dsp2 0
51 +#define cpu_has_mipsmt 1
53 +#define cpu_has_64bits 0
54 +#define cpu_has_64bit_zero_reg 0
55 +#define cpu_has_64bit_gp_regs 0
56 +#define cpu_has_64bit_addresses 0
58 +#define cpu_dcache_line_size() 32
59 +#define cpu_icache_line_size() 32
61 +#define cpu_has_dc_aliases 0
62 +#define cpu_has_vtag_icache 0
64 +#define cpu_has_rixi 0
65 +#define cpu_has_tlbinv 0
66 +#define cpu_has_userlocal 1
68 +#endif /* _MT7621_CPU_FEATURE_OVERRIDES_H */