1 From 8563991026ee98bb5e477167236972a45dfea0e3 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Mon, 21 Jan 2013 18:25:59 +0100
4 Subject: [PATCH 01/14] MIPS: ralink: adds include files
6 Before we start adding the platform code we add the common include files.
8 Signed-off-by: John Crispin <blogic@openwrt.org>
9 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
10 Patchwork: http://patchwork.linux-mips.org/patch/4893/
12 arch/mips/include/asm/mach-ralink/ralink_regs.h | 39 ++++++++++++++++++++
13 arch/mips/include/asm/mach-ralink/war.h | 25 +++++++++++++
14 arch/mips/ralink/common.h | 44 +++++++++++++++++++++++
15 3 files changed, 108 insertions(+)
16 create mode 100644 arch/mips/include/asm/mach-ralink/ralink_regs.h
17 create mode 100644 arch/mips/include/asm/mach-ralink/war.h
18 create mode 100644 arch/mips/ralink/common.h
21 +++ b/arch/mips/include/asm/mach-ralink/ralink_regs.h
24 + * Ralink SoC register definitions
26 + * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
27 + * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
28 + * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
30 + * This program is free software; you can redistribute it and/or modify it
31 + * under the terms of the GNU General Public License version 2 as published
32 + * by the Free Software Foundation.
35 +#ifndef _RALINK_REGS_H_
36 +#define _RALINK_REGS_H_
38 +extern __iomem void *rt_sysc_membase;
39 +extern __iomem void *rt_memc_membase;
41 +static inline void rt_sysc_w32(u32 val, unsigned reg)
43 + __raw_writel(val, rt_sysc_membase + reg);
46 +static inline u32 rt_sysc_r32(unsigned reg)
48 + return __raw_readl(rt_sysc_membase + reg);
51 +static inline void rt_memc_w32(u32 val, unsigned reg)
53 + __raw_writel(val, rt_memc_membase + reg);
56 +static inline u32 rt_memc_r32(unsigned reg)
58 + return __raw_readl(rt_memc_membase + reg);
61 +#endif /* _RALINK_REGS_H_ */
63 +++ b/arch/mips/include/asm/mach-ralink/war.h
66 + * This file is subject to the terms and conditions of the GNU General Public
67 + * License. See the file "COPYING" in the main directory of this archive
70 + * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
72 +#ifndef __ASM_MACH_RALINK_WAR_H
73 +#define __ASM_MACH_RALINK_WAR_H
75 +#define R4600_V1_INDEX_ICACHEOP_WAR 0
76 +#define R4600_V1_HIT_CACHEOP_WAR 0
77 +#define R4600_V2_HIT_CACHEOP_WAR 0
78 +#define R5432_CP0_INTERRUPT_WAR 0
79 +#define BCM1250_M3_WAR 0
80 +#define SIBYTE_1956_WAR 0
81 +#define MIPS4K_ICACHE_REFILL_WAR 0
82 +#define MIPS_CACHE_SYNC_WAR 0
83 +#define TX49XX_ICACHE_INDEX_INV_WAR 0
84 +#define RM9000_CDEX_SMP_WAR 0
85 +#define ICACHE_REFILLS_WORKAROUND_WAR 0
86 +#define R10000_LLSC_WAR 0
87 +#define MIPS34K_MISSED_ITLB_WAR 0
89 +#endif /* __ASM_MACH_RALINK_WAR_H */
91 +++ b/arch/mips/ralink/common.h
94 + * This program is free software; you can redistribute it and/or modify it
95 + * under the terms of the GNU General Public License version 2 as published
96 + * by the Free Software Foundation.
98 + * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
101 +#ifndef _RALINK_COMMON_H__
102 +#define _RALINK_COMMON_H__
104 +#define RAMIPS_SYS_TYPE_LEN 32
106 +struct ralink_pinmux_grp {
113 +struct ralink_pinmux {
114 + struct ralink_pinmux_grp *mode;
115 + struct ralink_pinmux_grp *uart;
117 + void (*wdt_reset)(void);
119 +extern struct ralink_pinmux gpio_pinmux;
121 +struct ralink_soc_info {
122 + unsigned char sys_type[RAMIPS_SYS_TYPE_LEN];
123 + unsigned char *compatible;
125 +extern struct ralink_soc_info soc_info;
127 +extern void ralink_of_remap(void);
129 +extern void ralink_clk_init(void);
130 +extern void ralink_clk_add(const char *dev, unsigned long rate);
132 +extern void prom_soc_init(struct ralink_soc_info *soc_info);
134 +__iomem void *plat_of_remap_node(const char *node);
136 +#endif /* _RALINK_COMMON_H__ */