1 From b3cda181b5f9986b05bd95ee322504a8f2ed0b69 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Fri, 12 Apr 2013 06:27:37 +0000
4 Subject: [PATCH 34/79] DT: MIPS: ralink: add RT2880 dts files
6 Add a dtsi file for RT2880 SoC and a sample dts file.
8 Signed-off-by: John Crispin <blogic@openwrt.org>
9 Acked-by: Grant Likely <grant.likely@secretlab.ca>
10 Patchwork: http://patchwork.linux-mips.org/patch/5188/
12 arch/mips/ralink/Kconfig | 4 +++
13 arch/mips/ralink/dts/Makefile | 1 +
14 arch/mips/ralink/dts/rt2880.dtsi | 58 ++++++++++++++++++++++++++++++++++
15 arch/mips/ralink/dts/rt2880_eval.dts | 46 +++++++++++++++++++++++++++
16 4 files changed, 109 insertions(+)
17 create mode 100644 arch/mips/ralink/dts/rt2880.dtsi
18 create mode 100644 arch/mips/ralink/dts/rt2880_eval.dts
20 diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
21 index 86f6c77..2f6fbb8 100644
22 --- a/arch/mips/ralink/Kconfig
23 +++ b/arch/mips/ralink/Kconfig
24 @@ -34,6 +34,10 @@ choice
28 + config DTB_RT2880_EVAL
29 + bool "RT2880 eval kit"
30 + depends on SOC_RT288X
32 config DTB_RT305X_EVAL
33 bool "RT305x eval kit"
35 diff --git a/arch/mips/ralink/dts/Makefile b/arch/mips/ralink/dts/Makefile
36 index 1a69fb3..f635a01 100644
37 --- a/arch/mips/ralink/dts/Makefile
38 +++ b/arch/mips/ralink/dts/Makefile
40 +obj-$(CONFIG_DTB_RT2880_EVAL) := rt2880_eval.dtb.o
41 obj-$(CONFIG_DTB_RT305X_EVAL) := rt3052_eval.dtb.o
42 diff --git a/arch/mips/ralink/dts/rt2880.dtsi b/arch/mips/ralink/dts/rt2880.dtsi
44 index 0000000..182afde
46 +++ b/arch/mips/ralink/dts/rt2880.dtsi
49 + #address-cells = <1>;
51 + compatible = "ralink,rt2880-soc";
55 + compatible = "mips,mips4KEc";
59 + cpuintc: cpuintc@0 {
60 + #address-cells = <0>;
61 + #interrupt-cells = <1>;
62 + interrupt-controller;
63 + compatible = "mti,cpu-interrupt-controller";
67 + compatible = "palmbus";
68 + reg = <0x300000 0x200000>;
69 + ranges = <0x0 0x300000 0x1FFFFF>;
71 + #address-cells = <1>;
75 + compatible = "ralink,rt2880-sysc";
80 + compatible = "ralink,rt2880-intc";
81 + reg = <0x200 0x100>;
83 + interrupt-controller;
84 + #interrupt-cells = <1>;
86 + interrupt-parent = <&cpuintc>;
91 + compatible = "ralink,rt2880-memc";
92 + reg = <0x300 0x100>;
96 + compatible = "ralink,rt2880-uart", "ns16550a";
97 + reg = <0xc00 0x100>;
99 + interrupt-parent = <&intc>;
106 diff --git a/arch/mips/ralink/dts/rt2880_eval.dts b/arch/mips/ralink/dts/rt2880_eval.dts
108 index 0000000..322d700
110 +++ b/arch/mips/ralink/dts/rt2880_eval.dts
114 +/include/ "rt2880.dtsi"
117 + compatible = "ralink,rt2880-eval-board", "ralink,rt2880-soc";
118 + model = "Ralink RT2880 evaluation board";
121 + reg = <0x8000000 0x2000000>;
125 + bootargs = "console=ttyS0,57600";
129 + compatible = "cfi-flash";
130 + reg = <0x1f000000 0x400000>;
133 + device-width = <2>;
134 + #address-cells = <1>;
139 + reg = <0x0 0x30000>;
143 + label = "uboot-env";
144 + reg = <0x30000 0x10000>;
148 + label = "calibration";
149 + reg = <0x40000 0x10000>;
154 + reg = <0x50000 0x3b0000>;