1 From 9c83b58b49f88a48565fad6acea921a0ae222856 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Thu, 21 Mar 2013 17:50:05 +0100
4 Subject: [PATCH 112/121] MIPS: add MT7620 dts files
6 Adds the dtsi file for MT7620 SoC. This is the latest and greatest SoC shipped
9 Signed-off-by: John Crispin <blogic@openwrt.org>
11 arch/mips/ralink/Kconfig | 4 +
12 arch/mips/ralink/dts/Makefile | 1 +
13 arch/mips/ralink/dts/mt7620.dtsi | 138 ++++++++++++++++++++++++++++++++++
14 arch/mips/ralink/dts/mt7620_eval.dts | 22 ++++++
15 4 files changed, 165 insertions(+)
16 create mode 100644 arch/mips/ralink/dts/mt7620.dtsi
17 create mode 100644 arch/mips/ralink/dts/mt7620_eval.dts
19 diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
20 index 493411f..8254502 100644
21 --- a/arch/mips/ralink/Kconfig
22 +++ b/arch/mips/ralink/Kconfig
23 @@ -46,6 +46,10 @@ choice
24 bool "RT3883 eval kit"
27 + config DTB_MT7620_EVAL
28 + bool "MT7620 eval kit"
29 + depends on SOC_MT7620
34 diff --git a/arch/mips/ralink/dts/Makefile b/arch/mips/ralink/dts/Makefile
35 index 040a986..036603a 100644
36 --- a/arch/mips/ralink/dts/Makefile
37 +++ b/arch/mips/ralink/dts/Makefile
39 obj-$(CONFIG_DTB_RT2880_EVAL) := rt2880_eval.dtb.o
40 obj-$(CONFIG_DTB_RT305X_EVAL) := rt3052_eval.dtb.o
41 obj-$(CONFIG_DTB_RT3883_EVAL) := rt3883_eval.dtb.o
42 +obj-$(CONFIG_DTB_MT7620_EVAL) := mt7620_eval.dtb.o
43 diff --git a/arch/mips/ralink/dts/mt7620.dtsi b/arch/mips/ralink/dts/mt7620.dtsi
45 index 0000000..59f057f
47 +++ b/arch/mips/ralink/dts/mt7620.dtsi
50 + #address-cells = <1>;
52 + compatible = "ralink,mtk7620n-soc", "ralink,mt7620-soc";
56 + compatible = "mips,mips24KEc";
61 + bootargs = "console=ttyS0,57600 init=/init";
64 + cpuintc: cpuintc@0 {
65 + #address-cells = <0>;
66 + #interrupt-cells = <1>;
67 + interrupt-controller;
68 + compatible = "mti,cpu-interrupt-controller";
72 + compatible = "palmbus";
73 + reg = <0x10000000 0x200000>;
74 + ranges = <0x0 0x10000000 0x1FFFFF>;
76 + #address-cells = <1>;
80 + compatible = "ralink,mt7620-sysc", "ralink,mt7620n-sysc";
85 + compatible = "ralink,mt7620-timer", "ralink,rt2880-timer";
88 + interrupt-parent = <&intc>;
91 + status = "disabled";
95 + compatible = "ralink,mt7620-wdt", "ralink,rt2880-wdt";
100 + compatible = "ralink,mt7620-intc", "ralink,rt2880-intc";
101 + reg = <0x200 0x100>;
103 + interrupt-controller;
104 + #interrupt-cells = <1>;
106 + interrupt-parent = <&cpuintc>;
111 + compatible = "ralink,mt7620-memc", "ralink,rt3050-memc";
112 + reg = <0x300 0x100>;
116 + compatible = "ralink,mt7620-gpio", "ralink,rt2880-gpio";
117 + reg = <0x600 0x34>;
122 + ralink,num-gpios = <24>;
123 + ralink,register-map = [ 00 04 08 0c
129 + compatible = "ralink,mt7620-gpio", "ralink,rt2880-gpio";
130 + reg = <0x638 0x24>;
135 + ralink,num-gpios = <16>;
136 + ralink,register-map = [ 00 04 08 0c
142 + compatible = "ralink,mt7620-gpio", "ralink,rt2880-gpio";
143 + reg = <0x660 0x24>;
148 + ralink,num-gpios = <32>;
149 + ralink,register-map = [ 00 04 08 0c
155 + compatible = "ralink,mt7620-gpio", "ralink,rt2880-gpio";
156 + reg = <0x688 0x24>;
161 + ralink,num-gpios = <1>;
162 + ralink,register-map = [ 00 04 08 0c
168 + compatible = "ralink,rt3883-spi", "ralink,rt2880-spi";
169 + reg = <0xb00 0x100>;
170 + #address-cells = <1>;
173 + status = "disabled";
177 + compatible = "ralink,mt7620-uart", "ralink,rt2880-uart", "ns16550a";
178 + reg = <0xc00 0x100>;
180 + interrupt-parent = <&intc>;
187 diff --git a/arch/mips/ralink/dts/mt7620_eval.dts b/arch/mips/ralink/dts/mt7620_eval.dts
189 index 0000000..dda0f4d
191 +++ b/arch/mips/ralink/dts/mt7620_eval.dts
195 +/include/ "mt7620.dtsi"
198 + #address-cells = <1>;
200 + compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";
201 + model = "Ralink MT7620 evaluation board";
204 + reg = <0x0 0x4000000>;
209 + ralink,pinmmux = "uartlite", "spi";
210 + ralink,uartmux = "gpio";
211 + ralink,wdtmux = <0>;