target/linux/ramips/patches-3.8/0112-MIPS-add-MT7620-dts-files.patch

   1 From 9c83b58b49f88a48565fad6acea921a0ae222856 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Thu, 21 Mar 2013 17:50:05 +0100
   4 Subject: [PATCH 112/121] MIPS: add MT7620 dts files
   5
   6 Adds the dtsi file for MT7620 SoC. This is the latest and greatest SoC shipped
   7 by Mediatek.
   8
   9 Signed-off-by: John Crispin <blogic@openwrt.org>
  10 ---
  11  arch/mips/ralink/Kconfig             |    4 +
  12  arch/mips/ralink/dts/Makefile        |    1 +
  13  arch/mips/ralink/dts/mt7620.dtsi     |  138 ++++++++++++++++++++++++++++++++++
  14  arch/mips/ralink/dts/mt7620_eval.dts |   22 ++++++
  15  4 files changed, 165 insertions(+)
  16  create mode 100644 arch/mips/ralink/dts/mt7620.dtsi
  17  create mode 100644 arch/mips/ralink/dts/mt7620_eval.dts
  18
  19 diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
  20 index 493411f..8254502 100644
  21 --- a/arch/mips/ralink/Kconfig
  22 +++ b/arch/mips/ralink/Kconfig
  23 @@ -46,6 +46,10 @@ choice
  24                 bool "RT3883 eval kit"
  25                 depends on SOC_RT3883
  26
  27 +       config DTB_MT7620_EVAL
  28 +               bool "MT7620 eval kit"
  29 +               depends on SOC_MT7620
  30 +
  31  endchoice
  32
  33  endif
  34 diff --git a/arch/mips/ralink/dts/Makefile b/arch/mips/ralink/dts/Makefile
  35 index 040a986..036603a 100644
  36 --- a/arch/mips/ralink/dts/Makefile
  37 +++ b/arch/mips/ralink/dts/Makefile
  38 @@ -1,3 +1,4 @@
  39  obj-$(CONFIG_DTB_RT2880_EVAL) := rt2880_eval.dtb.o
  40  obj-$(CONFIG_DTB_RT305X_EVAL) := rt3052_eval.dtb.o
  41  obj-$(CONFIG_DTB_RT3883_EVAL) := rt3883_eval.dtb.o
  42 +obj-$(CONFIG_DTB_MT7620_EVAL) := mt7620_eval.dtb.o
  43 diff --git a/arch/mips/ralink/dts/mt7620.dtsi b/arch/mips/ralink/dts/mt7620.dtsi
  44 new file mode 100644
  45 index 0000000..59f057f
  46 --- /dev/null
  47 +++ b/arch/mips/ralink/dts/mt7620.dtsi
  48 @@ -0,0 +1,138 @@
  49 +/ {
  50 +       #address-cells = <1>;
  51 +       #size-cells = <1>;
  52 +       compatible = "ralink,mtk7620n-soc", "ralink,mt7620-soc";
  53 +
  54 +       cpus {
  55 +               cpu@0 {
  56 +                       compatible = "mips,mips24KEc";
  57 +               };
  58 +       };
  59 +
  60 +       chosen {
  61 +               bootargs = "console=ttyS0,57600 init=/init";
  62 +       };
  63 +
  64 +       cpuintc: cpuintc@0 {
  65 +               #address-cells = <0>;
  66 +               #interrupt-cells = <1>;
  67 +               interrupt-controller;
  68 +               compatible = "mti,cpu-interrupt-controller";
  69 +       };
  70 +
  71 +       palmbus@10000000 {
  72 +               compatible = "palmbus";
  73 +               reg = <0x10000000 0x200000>;
  74 +                ranges = <0x0 0x10000000 0x1FFFFF>;
  75 +
  76 +               #address-cells = <1>;
  77 +               #size-cells = <1>;
  78 +
  79 +               sysc@0 {
  80 +                       compatible = "ralink,mt7620-sysc", "ralink,mt7620n-sysc";
  81 +                       reg = <0x0 0x100>;
  82 +               };
  83 +
  84 +               timer@100 {
  85 +                       compatible = "ralink,mt7620-timer", "ralink,rt2880-timer";
  86 +                       reg = <0x100 0x20>;
  87 +
  88 +                       interrupt-parent = <&intc>;
  89 +                       interrupts = <1>;
  90 +
  91 +                       status = "disabled";
  92 +               };
  93 +
  94 +               watchdog@120 {
  95 +                       compatible = "ralink,mt7620-wdt", "ralink,rt2880-wdt";
  96 +                       reg = <0x120 0x10>;
  97 +               };
  98 +
  99 +               intc: intc@200 {
 100 +                       compatible = "ralink,mt7620-intc", "ralink,rt2880-intc";
 101 +                       reg = <0x200 0x100>;
 102 +
 103 +                       interrupt-controller;
 104 +                       #interrupt-cells = <1>;
 105 +
 106 +                       interrupt-parent = <&cpuintc>;
 107 +                       interrupts = <2>;
 108 +               };
 109 +
 110 +               memc@300 {
 111 +                       compatible = "ralink,mt7620-memc", "ralink,rt3050-memc";
 112 +                       reg = <0x300 0x100>;
 113 +               };
 114 +
 115 +               gpio0: gpio@600 {
 116 +                       compatible = "ralink,mt7620-gpio", "ralink,rt2880-gpio";
 117 +                       reg = <0x600 0x34>;
 118 +
 119 +                       gpio-controller;
 120 +                       #gpio-cells = <2>;
 121 +
 122 +                       ralink,num-gpios = <24>;
 123 +                       ralink,register-map = [ 00 04 08 0c
 124 +                                               20 24 28 2c
 125 +                                               30 34 ];
 126 +               };
 127 +
 128 +               gpio1: gpio@638 {
 129 +                       compatible = "ralink,mt7620-gpio", "ralink,rt2880-gpio";
 130 +                       reg = <0x638 0x24>;
 131 +
 132 +                       gpio-controller;
 133 +                       #gpio-cells = <2>;
 134 +
 135 +                       ralink,num-gpios = <16>;
 136 +                       ralink,register-map = [ 00 04 08 0c
 137 +                                               10 14 18 1c
 138 +                                               20 24 ];
 139 +               };
 140 +
 141 +               gpio2: gpio@660 {
 142 +                       compatible = "ralink,mt7620-gpio", "ralink,rt2880-gpio";
 143 +                       reg = <0x660 0x24>;
 144 +
 145 +                       gpio-controller;
 146 +                       #gpio-cells = <2>;
 147 +
 148 +                       ralink,num-gpios = <32>;
 149 +                       ralink,register-map = [ 00 04 08 0c
 150 +                                               10 14 18 1c
 151 +                                               20 24 ];
 152 +               };
 153 +
 154 +               gpio3: gpio@688 {
 155 +                       compatible = "ralink,mt7620-gpio", "ralink,rt2880-gpio";
 156 +                       reg = <0x688 0x24>;
 157 +
 158 +                       gpio-controller;
 159 +                       #gpio-cells = <2>;
 160 +
 161 +                       ralink,num-gpios = <1>;
 162 +                       ralink,register-map = [ 00 04 08 0c
 163 +                                               10 14 18 1c
 164 +                                               20 24 ];
 165 +               };
 166 +
 167 +               spi@b00 {
 168 +                       compatible = "ralink,rt3883-spi", "ralink,rt2880-spi";
 169 +                       reg = <0xb00 0x100>;
 170 +                       #address-cells = <1>;
 171 +                       #size-cells = <0>;
 172 +
 173 +                       status = "disabled";
 174 +               };
 175 +
 176 +               uartlite@c00 {
 177 +                       compatible = "ralink,mt7620-uart", "ralink,rt2880-uart", "ns16550a";
 178 +                       reg = <0xc00 0x100>;
 179 +
 180 +                       interrupt-parent = <&intc>;
 181 +                       interrupts = <12>;
 182 +
 183 +                       reg-shift = <2>;
 184 +               };
 185 +       };
 186 +};
 187 diff --git a/arch/mips/ralink/dts/mt7620_eval.dts b/arch/mips/ralink/dts/mt7620_eval.dts
 188 new file mode 100644
 189 index 0000000..dda0f4d
 190 --- /dev/null
 191 +++ b/arch/mips/ralink/dts/mt7620_eval.dts
 192 @@ -0,0 +1,22 @@
 193 +/dts-v1/;
 194 +
 195 +/include/ "mt7620.dtsi"
 196 +
 197 +/ {
 198 +       #address-cells = <1>;
 199 +       #size-cells = <1>;
 200 +       compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";
 201 +       model = "Ralink MT7620 evaluation board";
 202 +
 203 +       memory@0 {
 204 +               reg = <0x0 0x4000000>;
 205 +       };
 206 +
 207 +       palmbus@10000000 {
 208 +               sysc@0 {
 209 +                       ralink,pinmmux = "uartlite", "spi";
 210 +                       ralink,uartmux = "gpio";
 211 +                       ralink,wdtmux = <0>;
 212 +               };
 213 +       };
 214 +};
 215 --
 216 1.7.10.4
 217