1 From b39e659770cb71939765de8c9e73c0a0cfa832db Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Fri, 12 Apr 2013 06:27:37 +0000
4 Subject: [PATCH 118/137] DT: MIPS: ralink: add RT2880 dts files
6 Add a dtsi file for RT2880 SoC and a sample dts file.
8 Signed-off-by: John Crispin <blogic@openwrt.org>
9 Acked-by: Grant Likely <grant.likely@secretlab.ca>
10 Patchwork: http://patchwork.linux-mips.org/patch/5188/
12 arch/mips/ralink/Kconfig | 4 +++
13 arch/mips/ralink/dts/Makefile | 1 +
14 arch/mips/ralink/dts/rt2880.dtsi | 58 ++++++++++++++++++++++++++++++++++
15 arch/mips/ralink/dts/rt2880_eval.dts | 46 +++++++++++++++++++++++++++
16 4 files changed, 109 insertions(+)
17 create mode 100644 arch/mips/ralink/dts/rt2880.dtsi
18 create mode 100644 arch/mips/ralink/dts/rt2880_eval.dts
20 --- a/arch/mips/ralink/Kconfig
21 +++ b/arch/mips/ralink/Kconfig
22 @@ -34,6 +34,10 @@ choice
26 + config DTB_RT2880_EVAL
27 + bool "RT2880 eval kit"
28 + depends on SOC_RT288X
30 config DTB_RT305X_EVAL
31 bool "RT305x eval kit"
33 --- a/arch/mips/ralink/dts/Makefile
34 +++ b/arch/mips/ralink/dts/Makefile
36 +obj-$(CONFIG_DTB_RT2880_EVAL) := rt2880_eval.dtb.o
37 obj-$(CONFIG_DTB_RT305X_EVAL) := rt3052_eval.dtb.o
39 +++ b/arch/mips/ralink/dts/rt2880.dtsi
42 + #address-cells = <1>;
44 + compatible = "ralink,rt2880-soc";
48 + compatible = "mips,mips4KEc";
52 + cpuintc: cpuintc@0 {
53 + #address-cells = <0>;
54 + #interrupt-cells = <1>;
55 + interrupt-controller;
56 + compatible = "mti,cpu-interrupt-controller";
60 + compatible = "palmbus";
61 + reg = <0x300000 0x200000>;
62 + ranges = <0x0 0x300000 0x1FFFFF>;
64 + #address-cells = <1>;
68 + compatible = "ralink,rt2880-sysc";
73 + compatible = "ralink,rt2880-intc";
74 + reg = <0x200 0x100>;
76 + interrupt-controller;
77 + #interrupt-cells = <1>;
79 + interrupt-parent = <&cpuintc>;
84 + compatible = "ralink,rt2880-memc";
85 + reg = <0x300 0x100>;
89 + compatible = "ralink,rt2880-uart", "ns16550a";
90 + reg = <0xc00 0x100>;
92 + interrupt-parent = <&intc>;
100 +++ b/arch/mips/ralink/dts/rt2880_eval.dts
104 +/include/ "rt2880.dtsi"
107 + compatible = "ralink,rt2880-eval-board", "ralink,rt2880-soc";
108 + model = "Ralink RT2880 evaluation board";
111 + reg = <0x8000000 0x2000000>;
115 + bootargs = "console=ttyS0,57600";
119 + compatible = "cfi-flash";
120 + reg = <0x1f000000 0x400000>;
123 + device-width = <2>;
124 + #address-cells = <1>;
129 + reg = <0x0 0x30000>;
133 + label = "uboot-env";
134 + reg = <0x30000 0x10000>;
138 + label = "calibration";
139 + reg = <0x40000 0x10000>;
144 + reg = <0x50000 0x3b0000>;