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kernel: update linux 3.9 to 3.9.8
[openwrt/staging/wigyori.git] / target / linux / ramips / patches-3.9 / 0162-USB-MIPS-ralink-add-rt5350-mt7620-UDC.patch
1 From 0e3b1bffd1974e6852912865a7cea481617b1c39 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Thu, 30 May 2013 16:06:35 +0200
4 Subject: [PATCH 162/164] USB: MIPS: ralink: add rt5350/mt7620 UDC
5
6 Signed-off-by: John Crispin <blogic@openwrt.org>
7 ---
8 drivers/usb/gadget/Kconfig | 8 +
9 drivers/usb/gadget/Makefile | 1 +
10 drivers/usb/gadget/rt_udc.h | 417 +++++++
11 drivers/usb/gadget/rt_udc_pdma.c | 2547 ++++++++++++++++++++++++++++++++++++++
12 4 files changed, 2973 insertions(+)
13 create mode 100644 drivers/usb/gadget/rt_udc.h
14 create mode 100644 drivers/usb/gadget/rt_udc_pdma.c
15
16 --- a/drivers/usb/gadget/Kconfig
17 +++ b/drivers/usb/gadget/Kconfig
18 @@ -336,6 +336,14 @@ config USB_MV_U3D
19 MARVELL PXA2128 Processor series include a super speed USB3.0 device
20 controller, which support super speed USB peripheral.
21
22 +config USB_RT_UDC
23 + boolean "Ralink USB Device Port"
24 + depends on SOC_MT7620
25 + help
26 + Say "y" to link the driver statically, or "m" to build a
27 + dynamically linked module called "rt_udc" and force all
28 + gadget drivers to also be dynamically linked.
29 +
30 #
31 # Controllers available in both integrated and discrete versions
32 #
33 --- a/drivers/usb/gadget/Makefile
34 +++ b/drivers/usb/gadget/Makefile
35 @@ -34,6 +34,7 @@ obj-$(CONFIG_USB_MV_UDC) += mv_udc.o
36 mv_udc-y := mv_udc_core.o
37 obj-$(CONFIG_USB_FUSB300) += fusb300_udc.o
38 obj-$(CONFIG_USB_MV_U3D) += mv_u3d_core.o
39 +obj-$(CONFIG_USB_RT_UDC) += rt_udc_pdma.o
40
41 # USB Functions
42 obj-$(CONFIG_USB_F_ACM) += f_acm.o
43 --- /dev/null
44 +++ b/drivers/usb/gadget/rt_udc.h
45 @@ -0,0 +1,417 @@
46 +/*
47 + * Copyright (C) 2009 Y.Y. Huang, Ralink Tech.(yy_huang@ralinktech.com)
48 + *
49 + * This udc driver is now under testing and code is based on pxa2xx_udc.h
50 + * Please use it with your own risk!
51 + *
52 + * This program is free software; you can redistribute it and/or modify
53 + * it under the terms of the GNU General Public License as published by
54 + * the Free Software Foundation; either version 2 of the License, or
55 + * (at your option) any later version.
56 + *
57 + * This program is distributed in the hope that it will be useful,
58 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
59 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
60 + * GNU General Public License for more details.
61 + */
62 +
63 +#ifndef __LINUX_USB_GADGET_RT_UDC_H
64 +#define __LINUX_USB_GADGET_RT_UDC_H
65 +
66 +#define CONFIG_RALINK_MT7620
67 +
68 +#include <linux/types.h>
69 +
70 +//#include "../host/ralink_usb.h" /* for port sharing setting and power saving purpose */
71 +
72 +#if defined (CONFIG_RALINK_RT3883) || defined (CONFIG_RALINK_RT3352) || defined (CONFIG_RALINK_MT7620)
73 +#define IN_EP_NUM 2
74 +#define OUT_EP_NUM 2
75 +#elif defined (CONFIG_RALINK_RT5350)
76 +#define IN_EP_NUM 1
77 +#define OUT_EP_NUM 1
78 +#else
79 +#error "Please define a platform."
80 +#endif
81 +
82 +/* Helper macros */
83 +#define EP_IDX(ep) ((ep->bEndpointAddress & ~USB_DIR_IN)+(EP_DIR(ep)? 0:IN_EP_NUM)) /* IN:1, OUT:0 */
84 +#define EP_NO(ep) ((ep->bEndpointAddress & ~USB_DIR_IN)) /* IN:1, OUT:0 */
85 +#define EP_DIR(ep) ((ep->bEndpointAddress) & USB_DIR_IN ? 1 : 0)
86 +#define EP_IN 1
87 +#define EP_OUT 0
88 +#define RT_USB_NB_EP (IN_EP_NUM + OUT_EP_NUM + 1)
89 +
90 +/* Driver structures */
91 +struct rt_request {
92 + struct usb_request req;
93 + struct list_head queue;
94 + unsigned int in_use;
95 + struct rt_ep_struct *rt_ep; // test for rx tasklet
96 + int zlp_dma_done; // used for DMA ZLP packet.
97 + int txd_count;
98 +};
99 +
100 +enum ep0_state {
101 + EP0_IDLE,
102 + EP0_IN_DATA_PHASE,
103 + EP0_OUT_DATA_PHASE,
104 + EP0_NO_DATA_PHASE,
105 + EP0_STALL,
106 +};
107 +
108 +struct rt_ep_struct {
109 + struct usb_ep ep;
110 + struct rt_udc_struct *rt_usb;
111 + struct list_head queue;
112 + unsigned char stopped;
113 + unsigned char bEndpointAddress;
114 + unsigned char bmAttributes;
115 +
116 + unsigned char pending;
117 + unsigned int rx_done_count; /* used by OUT EP only */
118 + unsigned int tx_done_count; /* used by OUT EP only */
119 +};
120 +
121 +struct rt_udc_struct {
122 + struct usb_gadget gadget;
123 + struct usb_gadget_driver *driver;
124 + struct device *dev;
125 + struct rt_ep_struct rt_ep[RT_USB_NB_EP];
126 + /* struct clk *clk; */
127 + struct timer_list timer;
128 + enum ep0_state ep0state;
129 + struct resource *res;
130 + void __iomem *base;
131 + unsigned char set_config;
132 + int cfg,
133 + intf,
134 + alt,
135 + interrupt;
136 +};
137 +
138 +#define USB_BASE (0xB0120000)
139 +
140 +#define OUT0BC (0x000)
141 +#define IN0BC (0x001)
142 +#define EP0CS (0x002)
143 +
144 +#define OUT1CON (0x00A)
145 +#define IN1CON (0x00E)
146 +#define OUT2CON (0x012)
147 +#define IN2CON (0x016)
148 +#define OUT3CON (0x01A)
149 +#define IN3CON (0x01E)
150 +#define OUT4CON (0x022)
151 +#define IN4CON (0x026)
152 +
153 +
154 +#define EP0INDAT (0x100)
155 +#define EP0OUTDAT (0x140)
156 +#define SETUPDATA (0x180)
157 +
158 +#define IN07IRQ (0x188)
159 +#define IN815IRQ (0x189)
160 +#define OUT07IRQ (0x18A)
161 +#define OUT815IRQ (0x18B)
162 +#define USBIRQ (0x18C)
163 +#define OUT07PNGIRQ (0x18E)
164 +#define OUT815PNGIRQ (0x18F)
165 +
166 +#define IN07IEN (0x194)
167 +#define OUT07IEN (0x196)
168 +#define USBIEN (0x198)
169 +
170 +#define OUT07PNGIEN (0x19A)
171 +#define OUT815PNGIEN (0x19B)
172 +
173 +#define ENDPRST (0x1A2)
174 +#define ENDPRST_IO (0x1 << 4)
175 +#define ENDPRST_TOGRST (0x1 << 5)
176 +#define ENDPRST_FIFORST (0x1 << 6)
177 +
178 +#define FIFOCTRL (0x1A8)
179 +
180 +#define EP_CS_EP0_STALL (0x1 << 0)
181 +#define EP_CS_EP0_HSNAK (0x1 << 1)
182 +#define EP_CS_EP0_INBSY (0x1 << 2)
183 +#define EP_CS_EP0_OUTBSY (0x1 << 3)
184 +#define EP_CS_AUTO (0x1 << 4)
185 +#define EP_CS_NPAK1 (0x1 << 3)
186 +#define EP_CS_NPAK0 (0x1 << 2)
187 +#define EP_CS_BSY (0x1 << 1)
188 +#define EP_CS_ERR (0x1 << 0)
189 +
190 +#define EP0_OUT_BSY (0x1 << 3)
191 +#define EP0_IN_BSY (0x1 << 2)
192 +
193 +#define USB_INTR_HSPEED (0x20)
194 +#define USB_INTR_RESET (0x10)
195 +#define USB_INTR_SUSPEND (0x08)
196 +#define USB_INTR_SETUP_TOKEN (0x04)
197 +#define USB_INTR_SOF (0x02)
198 +#define USB_INTR_SETUP_TOKEN_VALID (0x01)
199 +
200 +/* UDMA */
201 +#define RTUSB_UDMA_CTRL (USB_BASE + 0x800)
202 +#define RTUSB_UDMA_WRR (USB_BASE + 0x804)
203 +
204 +/* PDMA */
205 +#define RTUSB_TX_BASE_PTR0 (USB_BASE + 0x1000)
206 +#define RTUSB_TX_MAX_CNT0 (USB_BASE + 0x1004)
207 +#define RTUSB_TX_CTX_IDX0 (USB_BASE + 0x1008)
208 +#define RTUSB_TX_DTX_IDX0 (USB_BASE + 0x100C)
209 +#define RTUSB_TX_BASE_PTR1 (USB_BASE + 0x1010)
210 +#define RTUSB_TX_MAX_CNT1 (USB_BASE + 0x1014)
211 +#define RTUSB_TX_CTX_IDX1 (USB_BASE + 0x1018)
212 +#define RTUSB_TX_DTX_IDX1 (USB_BASE + 0x101C)
213 +#define RTUSB_RX_BASE_PTR0 (USB_BASE + 0x1100)
214 +#define RTUSB_RX_MAX_CNT0 (USB_BASE + 0x1104)
215 +#define RTUSB_RX_CALC_IDX0 (USB_BASE + 0x1108)
216 +#define RTUSB_RX_DRX_IDX0 (USB_BASE + 0x110C)
217 +#define RTUSB_PDMA_GLO_CFG (USB_BASE + 0x1204)
218 +
219 +#define RTUSB_TX_WB_DDONE (0x1 << 6)
220 +#define RTUSB_RX_DMA_BUSY (0x1 << 3)
221 +#define RTUSB_RX_DMA_EN (0x1 << 2)
222 +#define RTUSB_TX_DMA_BUSY (0x1 << 1)
223 +#define RTUSB_TX_DMA_EN (0x1 << 0)
224 +
225 +#define RTUSB_PDMA_RST_IDX (USB_BASE + 0x1208)
226 +
227 +#define RTUSB_RST_DRX_IDX1 (0x1 << 17)
228 +#define RTUSB_RST_DRX_IDX0 (0x1 << 16)
229 +#define RTUSB_RST_DTX_IDX3 (0x1 << 3)
230 +#define RTUSB_RST_DTX_IDX2 (0x1 << 2)
231 +#define RTUSB_RST_DTX_IDX1 (0x1 << 1)
232 +#define RTUSB_RST_DTX_IDX0 (0x1 << 0)
233 +
234 +#define RTUSB_DELAY_INT_CFG (USB_BASE + 0x120C)
235 +#define RTUSB_INT_STATUS (USB_BASE + 0x1220)
236 +#define RTUSB_RX_DONE_INT1 (0x1 << 17)
237 +#define RTUSB_RX_DONE_INT0 (0x1 << 16)
238 +#define RTUSB_TX_DONE_INT3 (0x1 << 3)
239 +#define RTUSB_TX_DONE_INT2 (0x1 << 2)
240 +#define RTUSB_TX_DONE_INT1 (0x1 << 1)
241 +#define RTUSB_TX_DONE_INT0 (0x1 << 0)
242 +
243 +#define RTUSB_INT_MASK (USB_BASE + 0x1228)
244 +#define RTUSB_RX_DONE_INT_MSK1 (0x1 << 17)
245 +#define RTUSB_RX_DONE_INT_MSK0 (0x1 << 16)
246 +#define RTUSB_TX_DONE_INT_MSK3 (0x1 << 3)
247 +#define RTUSB_TX_DONE_INT_MSK2 (0x1 << 2)
248 +#define RTUSB_TX_DONE_INT_MSK1 (0x1 << 1)
249 +#define RTUSB_TX_DONE_INT_MSK0 (0x1 << 0)
250 +
251 +
252 +/*=========================================
253 + PDMA RX Descriptor Format define
254 +=========================================*/
255 +//-------------------------------------------------
256 +typedef struct _PDMA_RXD_INFO1_ PDMA_RXD_INFO1_T;
257 +
258 +struct _PDMA_RXD_INFO1_ {
259 + unsigned int PDP0;
260 +};
261 +//-------------------------------------------------
262 +typedef struct _PDMA_RXD_INFO2_ PDMA_RXD_INFO2_T;
263 +
264 +struct _PDMA_RXD_INFO2_ {
265 + unsigned int PLEN1 : 14;
266 + unsigned int LS1 : 1;
267 + unsigned int UN_USED : 1;
268 + unsigned int PLEN0 : 14;
269 + unsigned int LS0 : 1;
270 + unsigned int DDONE_bit : 1;
271 +};
272 +//-------------------------------------------------
273 +typedef struct _PDMA_RXD_INFO3_ PDMA_RXD_INFO3_T;
274 +
275 +struct _PDMA_RXD_INFO3_ {
276 + unsigned int PDP1;
277 +};
278 +//-------------------------------------------------
279 +typedef struct _PDMA_RXD_INFO4_ PDMA_RXD_INFO4_T;
280 +
281 +struct _PDMA_RXD_INFO4_ {
282 + unsigned int Rx_bcnt:16;
283 + unsigned int Reserved1:8;
284 + unsigned int Out_ep_addr:4;
285 + unsigned int Reserved0:4;
286 +};
287 +struct PDMA_rxdesc {
288 + PDMA_RXD_INFO1_T rxd_info1;
289 + PDMA_RXD_INFO2_T rxd_info2;
290 + PDMA_RXD_INFO3_T rxd_info3;
291 + PDMA_RXD_INFO4_T rxd_info4;
292 +};
293 +/*=========================================
294 + PDMA TX Descriptor Format define
295 +=========================================*/
296 +//-------------------------------------------------
297 +typedef struct _PDMA_TXD_INFO1_ PDMA_TXD_INFO1_T;
298 +
299 +struct _PDMA_TXD_INFO1_ {
300 + unsigned int SDP0;
301 +};
302 +//-------------------------------------------------
303 +typedef struct _PDMA_TXD_INFO2_ PDMA_TXD_INFO2_T;
304 +
305 +struct _PDMA_TXD_INFO2_ {
306 + unsigned int SDL1 : 14;
307 + unsigned int LS1_bit : 1;
308 + unsigned int BURST_bit : 1;
309 + unsigned int SDL0 : 14;
310 + unsigned int LS0_bit : 1;
311 + unsigned int DDONE_bit : 1;
312 +};
313 +//-------------------------------------------------
314 +typedef struct _PDMA_TXD_INFO3_ PDMA_TXD_INFO3_T;
315 +
316 +struct _PDMA_TXD_INFO3_ {
317 + unsigned int SDP1;
318 +};
319 +//-------------------------------------------------
320 +typedef struct _PDMA_TXD_INFO4_ PDMA_TXD_INFO4_T;
321 +struct _PDMA_TXD_INFO4_ {
322 + unsigned int reserved2:17;
323 + unsigned int zlp_flag:1;
324 + unsigned int reserved1:6;
325 + unsigned int In_ep_addr:4;
326 + unsigned int rsv:4;
327 +};
328 +
329 +struct PDMA_txdesc {
330 + PDMA_TXD_INFO1_T txd_info1;
331 + PDMA_TXD_INFO2_T txd_info2;
332 + PDMA_TXD_INFO3_T txd_info3;
333 + PDMA_TXD_INFO4_T txd_info4;
334 +};
335 +
336 +
337 +#ifdef DEBUG
338 +#define DBG do{ if(debuglevel) printk("%s()\n", __FUNCTION__); }while(0);
339 +#define DD do{ printk("%s: %s %d\n", driver_name, __FUNCTION__, __LINE__); } while(0);
340 +#define xprintk(fmt, args...) do{ if(debuglevel) printk(fmt, ## args); } while(0);
341 +#else
342 +#define DBG
343 +#define DD
344 +#define xprintk(fmt, args...)
345 +#endif
346 +
347 +#define FATAL_ERROR(fmt, args...) do{ printk(fmt, ## args); printk("\n############### ERROR #####################\n %s %d\n############### ERROR #####################\n", __FUNCTION__, __LINE__); BUG(); } while(0)
348 +
349 +static void inline dump_usbirq(u32 irqreg)
350 +{
351 + if(irqreg)
352 + xprintk("U%s%s%s%s%s%s\n",
353 + (irqreg & USB_INTR_SOF) ? "sof" : "",
354 + (irqreg & USB_INTR_RESET) ? " rst" : "",
355 + (irqreg & USB_INTR_SUSPEND) ? " sus" : "",
356 + (irqreg & USB_INTR_SETUP_TOKEN) ? "st" : "",
357 + (irqreg & USB_INTR_SETUP_TOKEN_VALID) ? "sv" : "",
358 + (irqreg & USB_INTR_HSPEED) ? " HS" : "");
359 +
360 +// if(irqreg & USB_INTR_SETUP_TOKEN)
361 +// printk("ST\n");
362 +// if(irqreg & USB_INTR_SETUP_TOKEN_VALID)
363 +// printk("SV\n");
364 +
365 +}
366 +
367 +static void inline dump_epirq(u32 irqreg, u32 ienreg, int dir)
368 +{
369 + if(irqreg)
370 + xprintk("%s%x\n", dir? "I" : "O", irqreg);
371 +}
372 +
373 +static __inline__ u32 usb_read(u32 addr)
374 +{
375 + return ioread32( (void __iomem *)(USB_BASE + (addr << 2)) );
376 +}
377 +
378 +static __inline__ void usb_write(u32 addr, u32 value)
379 +{
380 + iowrite32(value, (void __iomem *)(USB_BASE + (addr << 2)) );
381 +}
382 +
383 +static __inline__ void reg_write(u32 addr, u32 value)
384 +{
385 + iowrite32(value, (void __iomem *)0x0 + addr);
386 +}
387 +
388 +static __inline__ u32 reg_read(u32 addr)
389 +{
390 + return ioread32( (void __iomem *)0x0 + addr);
391 +}
392 +
393 +
394 +static void handle_pending_epoutirq(struct rt_udc_struct *rt_usb, struct rt_ep_struct *rt_ep, struct rt_request *req);
395 +
396 +/* Debug macros */
397 +#ifdef DEBUG
398 +#define DEBUG_REQ
399 +#define DEBUG_TRX
400 +#define DEBUG_INIT
401 +#define DEBUG_EP0
402 +#define DEBUG_EPX
403 +#define DEBUG_ERR
404 +
405 +#ifdef DEBUG_REQ
406 + #define D_REQ(dev, args...) printk(args)
407 +#else
408 + #define D_REQ(dev, args...) do {} while (0)
409 +#endif /* DEBUG_REQ */
410 +
411 +#ifdef DEBUG_TRX
412 + #define D_TRX(dev, args...) printk(args)
413 +#else
414 + #define D_TRX(dev, args...) do {} while (0)
415 +#endif /* DEBUG_TRX */
416 +
417 +#ifdef DEBUG_INIT
418 + #define D_INI(dev, args...) printk(args)
419 +#else
420 + #define D_INI(dev, args...) do {} while (0)
421 +#endif /* DEBUG_INIT */
422 +
423 +#ifdef DEBUG_EP0
424 + static const char *state_name[] = {
425 + "IDLE",
426 + "IN",
427 + "OUT",
428 + "NODATA",
429 + "STALL"
430 + };
431 + #define D_EP0(dev, args...) printk(args)
432 +#else
433 + #define D_EP0(dev, args...) do {} while (0)
434 +#endif /* DEBUG_EP0 */
435 +
436 +#ifdef DEBUG_EPX
437 + #define D_EPX(dev, args...) printk(args)
438 +#else
439 + #define D_EPX(dev, args...) do {} while (0)
440 +#endif /* DEBUG_EP0 */
441 +
442 +#ifdef DEBUG_ERR
443 + #define D_ERR(dev, args...) printk(args)
444 +#else
445 + #define D_ERR(dev, args...) do {} while (0)
446 +#endif
447 +
448 +#else
449 + #define D_REQ(dev, args...) do {} while (0)
450 + #define D_TRX(dev, args...) do {} while (0)
451 + #define D_INI(dev, args...) do {} while (0)
452 + #define D_EP0(dev, args...) do {} while (0)
453 + #define D_EPX(dev, args...) do {} while (0)
454 + #define dump_ep_intr(x, y, z, i) do {} while (0)
455 + #define dump_intr(x, y, z) do {} while (0)
456 + #define dump_ep_stat(x, y) do {} while (0)
457 + #define dump_usb_stat(x, y) do {} while (0)
458 + #define dump_req(x, y, z) do {} while (0)
459 + #define D_ERR(dev, args...) do {} while (0)
460 +#endif /* DEBUG */
461 +
462 +#endif /* __LINUX_USB_GADGET_RT_UDC_H */
463 --- /dev/null
464 +++ b/drivers/usb/gadget/rt_udc_pdma.c
465 @@ -0,0 +1,2547 @@
466 +/*
467 + * driver/usb/gadget/rt_udc.c
468 + *
469 + * Copyright (C) 2009 Ying Yuan Huang, Ralink Tech. <yyhuang@ralink_tech.com>
470 + *
471 + * This program is free software; you can redistribute it and/or modify
472 + * it under the terms of the GNU General Public License as published by
473 + * the Free Software Foundation; either version 2 of the License, or
474 + * (at your option) any later version.
475 + *
476 + * This program is distributed in the hope that it will be useful,
477 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
478 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
479 + * GNU General Public License for more details.
480 + */
481 +
482 +/*
483 + * 1) [ USB composite device ]. The USB PDMA architecture is not suitable for USB composite
484 + * device support. A passive gadget driver(device) may slow down or block other gadget
485 + * (device) because they are in the same ring.
486 + */
487 +#include <linux/init.h>
488 +#include <linux/kernel.h>
489 +#include <linux/platform_device.h>
490 +#include <linux/module.h>
491 +#include <linux/errno.h>
492 +#include <linux/list.h>
493 +#include <linux/interrupt.h>
494 +#include <linux/io.h>
495 +#include <linux/irq.h>
496 +#include <linux/device.h>
497 +#include <linux/dma-mapping.h>
498 +#include <linux/clk.h>
499 +#include <linux/delay.h>
500 +#include <linux/timer.h>
501 +#include <linux/proc_fs.h>
502 +#include <linux/usb/ch9.h>
503 +#include <linux/version.h>
504 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)
505 +#include <linux/usb_gadget.h>
506 +#else
507 +#include <linux/usb/gadget.h>
508 +#endif
509 +
510 +static const char driver_name[] = "rt_udc";
511 +static const char ep0name[] = "ep0";
512 +static unsigned debuglevel = 0;
513 +module_param (debuglevel, uint, S_IRUGO);
514 +
515 +#define DEBUG
516 +#include "rt_udc.h"
517 +
518 +#define PROC_DIR driver_name
519 +#define DEBUGLEVEL_PROCFILE "debuglevel"
520 +static struct proc_dir_entry *pProcDir = NULL;
521 +static struct proc_dir_entry *pProcDebugLevel = NULL;
522 +
523 +/*
524 + * USB PDMA related
525 + */
526 +#define NUM_RX_DESC 256
527 +#define NUM_TX_DESC 256
528 +#define RX_BUFF_SZ 1600 /* 1536 */
529 +#define RING_RESET_TIMEOUT 3000 /* 3 secs */
530 +#define RX_RESCHEDULE 64
531 +#define TX_RESCHEDULE 4
532 +static unsigned dma = 0;
533 +module_param (dma, uint, S_IRUGO);
534 +static unsigned sm = 0;
535 +module_param (sm, uint, S_IRUGO);
536 +static unsigned int TXMAXCAP = 512;
537 +module_param (TXMAXCAP, uint, S_IRUGO);
538 +
539 +static struct PDMA_txdesc *tx_ring0_cache = NULL;
540 +static struct PDMA_rxdesc *rx_ring0_cache = NULL;
541 +static volatile struct PDMA_rxdesc *rx_ring0_noncache = NULL;
542 +static volatile struct PDMA_txdesc *tx_ring0_noncache = NULL;
543 +static dma_addr_t tx_ring_bus_addr;
544 +static dma_addr_t rx_ring_bus_addr;
545 +
546 +static int rx_dma_owner_idx0; /* Point to the next RXD DMA wants to use in RXD Ring#0. */
547 +static int tx_cpu_owner_idx0;
548 +static int tx_need_free_idx0;
549 +
550 +static volatile unsigned char *USBRxPackets[NUM_RX_DESC]; /* Receive packets */
551 +static unsigned char tx_zlp_dummy_buf[8];
552 +struct tasklet_struct rx_dma_tasklet;
553 +struct tasklet_struct tx_dma_tasklet;
554 +
555 +static struct rt_udc_struct controller;
556 +static struct rt_request *handle_outep(struct rt_ep_struct *rt_ep);
557 +
558 +static int debuglevel_read(char *page, char **start, off_t off,int count, int *eof, void *data)
559 +{
560 + int len;
561 + sprintf(page, "%d\n", debuglevel);
562 + len = strlen(page) + 1;
563 + *eof = 1;
564 + return len;
565 +}
566 +
567 +static int debuglevel_write(struct file *file, const char *buffer, unsigned long count, void *data)
568 +{
569 + char tmp[32];
570 + count = (count > 32) ? 32 : count;
571 + memset(tmp, 0, 32);
572 + if (copy_from_user(tmp, buffer, count))
573 + return -EFAULT;
574 + debuglevel = simple_strtol(tmp, 0, 10);
575 + return count;
576 +}
577 +
578 +static void ep0_chg_stat(const char *label, struct rt_udc_struct *rt_usb, enum ep0_state stat)
579 +{
580 + xprintk("<0st>%s->%s\n", state_name[rt_usb->ep0state], state_name[stat]);
581 +
582 + if (rt_usb->ep0state == stat)
583 + return;
584 + rt_usb->ep0state = stat;
585 +}
586 +
587 +static u8 read_epcs(struct rt_ep_struct *rt_ep)
588 +{
589 + int idx = EP_NO(rt_ep);
590 + int dir = EP_DIR(rt_ep);
591 +
592 + if(idx == 0)
593 + return usb_read(EP0CS);
594 +
595 + return (dir == EP_IN ? usb_read(0x7 + idx*8) : usb_read(0x3 + idx*8) );
596 +}
597 +
598 +static void write_epcs(struct rt_ep_struct *rt_ep, u8 val)
599 +{
600 + int idx = EP_NO(rt_ep);
601 + int dir = EP_DIR(rt_ep);
602 +
603 + if(idx == 0)
604 + usb_write(EP0CS, val);
605 + else
606 + (dir == EP_IN ? /*IN */ usb_write(0x7 + idx*8, val) : usb_write(0x3 + idx*8, val) );
607 +}
608 +
609 +static u16 read_inbc(int epnum)
610 +{
611 + u16 low, high = 0;
612 + if(epnum == 0){ /* EP0 */
613 + low = usb_read(IN0BC);
614 + }else{
615 + low = usb_read(epnum * 8 + 4);
616 + high = usb_read((epnum * 8 + 4)+1);
617 + }
618 + return (low | (high << 8));
619 +}
620 +
621 +static u16 read_outbc(int epnum)
622 +{
623 + u16 low, high = 0;
624 + if(epnum == 0){ /* EP0 */
625 + low = usb_read(OUT0BC);
626 + }else{
627 + low = usb_read(epnum * 8);
628 + high = usb_read((epnum * 8)+1);
629 + }
630 + return (low | (high << 8));
631 +}
632 +
633 +
634 +static void rt_all_eps_reset(void)
635 +{
636 + // reset(toggle & fifo) all 16 IN & 16 OUT endpoints
637 + usb_write(ENDPRST, 0x10);
638 + usb_write(ENDPRST, 0x70);
639 + usb_write(ENDPRST, 0x00);
640 + usb_write(ENDPRST, 0x60);
641 +}
642 +
643 +static void rt_ep_rst(struct rt_ep_struct *rt_ep)
644 +{
645 + u8 reg = 0;
646 + u8 idx = EP_NO(rt_ep);
647 + u8 dir = EP_DIR(rt_ep);
648 + if(dir == EP_IN )
649 + reg |= ENDPRST_IO | idx;
650 + usb_write(ENDPRST, reg);
651 +
652 + reg |= ENDPRST_TOGRST | ENDPRST_FIFORST;
653 + usb_write(ENDPRST, reg);
654 +}
655 +
656 +static void rt_ep_irq_enable(struct rt_ep_struct *rt_ep)
657 +{
658 + u8 reg;
659 + u8 idx = EP_NO(rt_ep);
660 + u8 dir = EP_DIR(rt_ep);
661 +
662 + if(idx == 0 /* ep0 */){
663 + usb_write(IN07IEN, (usb_read(IN07IEN) | 0x1) );
664 + usb_write(OUT07IEN, (usb_read(OUT07IEN) | 0x1) );
665 + }else{ /* epX */
666 + reg = usb_read(dir ? IN07IEN : OUT07IEN);
667 + reg = reg | (0x1 << idx);
668 + usb_write(dir == EP_IN ? IN07IEN : OUT07IEN, reg);
669 + reg = usb_read(dir ? IN07IEN : OUT07IEN);
670 + }
671 +}
672 +
673 +static void rt_udc_init_ep(struct rt_udc_struct *rt_usb)
674 +{
675 + DBG;
676 + if(dma){
677 +#if defined (CONFIG_RALINK_RT3883) || defined (CONFIG_RALINK_RT3352) || defined (CONFIG_RALINK_MT7620)
678 + usb_write(IN1CON, 0x8D); // InEP1 : Int, 2 subfifos
679 + usb_write(IN2CON, 0x89); // InEP2 : Bulk, 2 subfifos
680 + usb_write(OUT1CON, 0x8D); // OutEP1 : Int, 2 subfifos
681 + usb_write(OUT2CON, 0x89); // OutEP2 : Bulk, 2 subfifos
682 + //usb_write(OUT3CON, 0x89); // OutEP3 : Bulk, 2 subfifos
683 + //usb_write(OUT4CON, 0x89); // OutEP4 : Bulk, 2 subfifos
684 +#elif defined (CONFIG_RALINK_RT5350)
685 + usb_write(IN1CON, 0x89); // InEP1 : BULK, 2 subfifos
686 + usb_write(OUT1CON, 0x89); // OutEP1 : BULK, 2 subfifos
687 +#else
688 +#error "define a platform"
689 +#endif
690 + }else{
691 +#if defined (CONFIG_RALINK_RT3883) || defined (CONFIG_RALINK_RT3352) || defined (CONFIG_RALINK_MT7620)
692 + usb_write(IN1CON, 0x8C); // InEP1 : Int , 1 subfifos
693 + usb_write(IN2CON, 0x88); // InEP2 : Bulk, 1 subfifo
694 + usb_write(OUT1CON, 0x8C); // OutEP1 : Int, 1 subfifos
695 + usb_write(OUT2CON, 0x88); // OutEP2 : Bulk, 1 subfifos
696 + //usb_write(OUT3CON, 0x88); // OutEP3 : Bulk, 1 subfifo
697 + //usb_write(OUT4CON, 0x88); // OutEP4 : Bulk. 1 subfifo
698 +
699 +#elif defined (CONFIG_RALINK_RT5350)
700 + usb_write(IN1CON, 0x88); // InEP1 : BULK , 1 subfifos
701 + usb_write(OUT1CON, 0x88); // OutEP1 : BULK, 1 subfifos
702 +#else
703 +#error "define a platform"
704 +#endif
705 + }
706 + // clear all pending HW interrupts
707 + usb_write(IN07IRQ, 0xFF);
708 + usb_write(OUT07IRQ, 0xFF);
709 + rt_all_eps_reset();
710 + rt_ep_irq_enable(&rt_usb->rt_ep[0]);
711 +}
712 +
713 +static void rt_udc_init_fifo(struct rt_udc_struct *rt_usb)
714 +{
715 + // fifo control
716 + if(dma){
717 + usb_write(FIFOCTRL, 0x31); // INEP1, Autoin = 1
718 + usb_write(FIFOCTRL, 0x32); // INEP2, Autoin = 1
719 + usb_write(FIFOCTRL, 0x21); // OUTEP1, Autoin = 1
720 + usb_write(FIFOCTRL, 0x22); // OUTEP2, Autoin = 1
721 + //usb_write(FIFOCTRL, 0x23);// OUTEP3, Autoin = 1
722 + //usb_write(FIFOCTRL, 0x24);// OUTEP4, Autoin = 1
723 +
724 + usb_write(FIFOCTRL, 0x00); // Access by DMA
725 + }else{
726 + usb_write(FIFOCTRL, 0x11); // INEP1, Autoin = 0
727 + usb_write(FIFOCTRL, 0x12); // INEP2, Autoin = 0
728 + usb_write(FIFOCTRL, 0x01); // OUTEP1, Autoin = 0
729 + usb_write(FIFOCTRL, 0x02); // OUTEP2, Autoin = 0
730 + //usb_write(FIFOCTRL, 0x03);// OUTEP3, Autoin = 0
731 + //usb_write(FIFOCTRL, 0x04);// OUTEP4, Autoin = 0
732 +
733 + usb_write(FIFOCTRL, 0x80); // Access by CPU
734 + }
735 +}
736 +
737 +static void rt_udc_init(struct rt_udc_struct *rt_usb)
738 +{
739 + /* Setup & Init endpoints */
740 + rt_udc_init_ep(rt_usb);
741 +
742 + // Enable HS, reset, suspend, SETUP valid data interrupt
743 + usb_write(USBIRQ, 0xff); // clear first
744 + usb_write(USBIEN, 0x21);
745 +
746 + /* Setup ep fifos */
747 + rt_udc_init_fifo(rt_usb);
748 +}
749 +
750 +static void rt_ep_irq_disable(struct rt_ep_struct *rt_ep)
751 +{
752 + u8 reg;
753 + u8 idx = EP_NO(rt_ep);
754 + u8 dir = EP_DIR(rt_ep);
755 +
756 + if(idx == 0 /* ep0 */){
757 + usb_write(IN07IEN, (usb_read(IN07IEN) & ~(0x1)) );
758 + usb_write(OUT07IEN, (usb_read(OUT07IEN) & ~(0x1)) );
759 + }else{
760 + reg = usb_read(dir ? IN07IEN : OUT07IEN);
761 + reg = reg & ~(0x1 << idx);
762 + usb_write(dir == EP_IN ? IN07IEN : OUT07IEN, reg);
763 + reg = usb_read(dir ? IN07IEN : OUT07IEN);
764 + }
765 +}
766 +
767 +static u32 rt_fifo_bcount(struct rt_ep_struct *rt_ep)
768 +{
769 + u8 low, high;
770 + u32 rc;
771 +
772 + int idx = EP_NO(rt_ep);
773 + int dir = EP_DIR(rt_ep);
774 +
775 + if(idx == 0)
776 + return 0;
777 +
778 + if(dir /* IN */){
779 + low = usb_read(0x004 + idx*8);
780 + high = usb_read( (0x004 + idx*8)+1 );
781 + }else{ /* OUT */
782 + low = usb_read(0x000 + idx*8);
783 + high = usb_read( (0x000 + idx*8)+1 );
784 + }
785 + rc = high | low;
786 + return rc;
787 +}
788 +
789 +void rt_flush(struct rt_ep_struct *rt_ep)
790 +{
791 + rt_ep_rst(rt_ep);
792 +}
793 +
794 +void rt_ep_stall(struct rt_ep_struct *rt_ep, int value)
795 +{
796 + u8 tmp;
797 + u32 addr;
798 + int idx = EP_NO(rt_ep);
799 + int dir = EP_DIR(rt_ep);
800 +
801 + if(idx == 0){
802 + tmp = usb_read(EP0CS);
803 + if(value)
804 + tmp |= 0x1;
805 + else
806 + tmp &= ~(0x1);
807 + usb_write(EP0CS, tmp);
808 + }else{
809 + addr = (dir == EP_IN ? 0x006 : 0x002) + idx * 8;
810 + tmp = usb_read(addr);
811 + if(value)
812 + tmp |= 0x40;
813 + else
814 + tmp &= ~(0x40);
815 + usb_write(addr, tmp);
816 + }
817 +
818 + return;
819 +}
820 +
821 +static int rt_udc_get_frame(struct usb_gadget *_gadget)
822 +{
823 + return 0;
824 +}
825 +
826 +static int rt_udc_wakeup(struct usb_gadget *_gadget)
827 +{
828 + DBG;
829 + return 0;
830 +}
831 +
832 +
833 +/*******************************************************************************
834 + * USB request control functions
835 + *******************************************************************************
836 + */
837 +static inline void ep_add_request(struct rt_ep_struct *rt_ep, struct rt_request *req)
838 +{
839 + if (unlikely(!req))
840 + return;
841 + req->in_use = 1;
842 + req->zlp_dma_done = 0;
843 + req->rt_ep = rt_ep;
844 + list_add_tail(&req->queue, &rt_ep->queue);
845 +}
846 +
847 +static inline void ep_del_request(struct rt_ep_struct *rt_ep, struct rt_request *req)
848 +{
849 + if (unlikely(!req))
850 + return;
851 + list_del_init(&req->queue);
852 + req->zlp_dma_done = 0;
853 + req->in_use = 0;
854 +}
855 +
856 +static void done(struct rt_ep_struct *rt_ep, struct rt_request *req, int status)
857 +{
858 + ep_del_request(rt_ep, req);
859 +
860 + if (likely(req->req.status == -EINPROGRESS))
861 + req->req.status = status;
862 + else
863 + status = req->req.status;
864 +
865 + if (status && status != -ESHUTDOWN)
866 + D_ERR(rt_ep->rt_usb->dev, "<%s> complete %s req %p stat %d len %u/%u\n", __func__, rt_ep->ep.name, &req->req, status,req->req.actual, req->req.length);
867 +
868 + req->req.complete(&rt_ep->ep, &req->req);
869 +}
870 +
871 +#if 0
872 +/* for reference */
873 +struct tasklet_struct rx_tasklet_tmp;
874 +static void rx_done_do_tasklet(unsigned long arg)
875 +{
876 + struct rt_ep_struct *rt_ep;
877 + struct rt_request *rt_req;
878 + struct usb_request *usb_req;
879 + struct usb_ep *ep;
880 + int i, rx_count, status = 0;
881 + struct rt_udc_struct *rt_usb = &controller;
882 +
883 + for (i = (IN_EP_NUM+1); i < RT_USB_NB_EP; i++) {
884 + rt_ep = &rt_usb->rt_ep[i];
885 + ep = &rt_ep->ep;
886 +
887 + // shared by irq handler, protect it
888 + spin_lock_irqsave(&rx_done_lock, rx_done_lock_flags);
889 + rx_count = rt_ep->rx_done_count;
890 +
891 + //spin_unlock_irqrestore(&rx_done_lock, rx_done_lock_flags);
892 +
893 + for (;rx_count > 0; rx_count--) {
894 + if(unlikely(list_empty(&rt_ep->queue)))
895 + FATAL_ERROR("empty queue");
896 +
897 + rt_req = list_entry(rt_ep->queue.next, struct rt_request, queue);
898 + usb_req = &rt_req->req;
899 +
900 + ep_del_request(rt_ep, rt_req);
901 + rt_ep->rx_done_count--;
902 +
903 + spin_unlock_irqrestore(&rx_done_lock, rx_done_lock_flags);
904 +
905 + if (unlikely(rt_req->req.status == -EINPROGRESS))
906 + rt_req->req.status = status;
907 + else
908 + status = rt_req->req.status;
909 +
910 + if (unlikely(status && status != -ESHUTDOWN))
911 + D_ERR(rt_ep->rt_usb->dev, "<%s> complete %s req %p stat %d len %u/%u\n", __func__, rt_ep->ep.name, &rt_req->req, status,rt_req->req.actual, rt_req->req.length);
912 +
913 + // indicate gadget driver.
914 + usb_req->complete(ep, usb_req);
915 +
916 + spin_lock_irqsave(&rx_done_lock, rx_done_lock_flags);
917 + }
918 + spin_unlock_irqrestore(&rx_done_lock, rx_done_lock_flags);
919 + }
920 +}
921 +#endif
922 +
923 +struct tasklet_struct tx_tasklet;
924 +static void tx_do_tasklet(unsigned long arg)
925 +{
926 + return;
927 +}
928 +
929 +struct tasklet_struct rx_tasklet;
930 +static void rx_do_tasklet(unsigned long arg)
931 +{
932 + struct rt_ep_struct *rt_ep;
933 + struct rt_request *req;
934 + struct usb_ep *ep;
935 + int i;
936 + struct rt_udc_struct *rt_usb = &controller;
937 +
938 + for (i = (IN_EP_NUM+1/* EP0 */); i < RT_USB_NB_EP; i++){
939 + u8 epcs;
940 + rt_ep = &rt_usb->rt_ep[i];
941 + ep = &rt_ep->ep;
942 +
943 + epcs = read_epcs(rt_ep);
944 + while(!(epcs & EP_CS_BSY)){
945 + req = handle_outep(rt_ep);
946 + if(!req){
947 + // No usb request found.
948 + // Just set up the flag (pending) and clear int.
949 + rt_ep->pending = 1;
950 + break;
951 + }else{
952 + if(req && ( (req->req.actual % rt_ep->ep.maxpacket) || (req->req.actual >= req->req.length))){
953 + xprintk("q.l=%d,q.a=%d\n", req->req.length, req->req.actual);
954 + done(rt_ep, req, 0);
955 + }
956 + }
957 +
958 + epcs = read_epcs(rt_ep);
959 + write_epcs(rt_ep, 0x0);
960 + epcs = read_epcs(rt_ep);
961 + }
962 + }
963 +}
964 +
965 +static void nuke(struct rt_ep_struct *rt_ep, int status)
966 +{
967 + struct rt_request *req;
968 +
969 + DBG;
970 + while (!list_empty(&rt_ep->queue)) {
971 + req = list_entry(rt_ep->queue.next, struct rt_request, queue);
972 + done(rt_ep, req, status);
973 + }
974 +}
975 +
976 +/*
977 + *******************************************************************************
978 + * Data tansfer over USB functions
979 + *******************************************************************************
980 + */
981 +static int read_ep0_fifo(struct rt_ep_struct *rt_ep, struct rt_request *req)
982 +{
983 + u8 *buf;
984 + int byte_count, req_bufferspace, count, i;
985 +
986 +DBG;
987 + if(!in_irq())
988 + FATAL_ERROR("not irq context.");
989 +
990 + byte_count = read_outbc(EP_NO(rt_ep));
991 + req_bufferspace = req->req.length - req->req.actual;
992 +
993 + buf = req->req.buf + req->req.actual;
994 +
995 + if(!req_bufferspace)
996 + FATAL_ERROR("zlp");
997 +
998 + if(byte_count > req_bufferspace)
999 + FATAL_ERROR("buffer overflow, byte_count=%d, req->req.length=%d, req->req.actual=%d\n", byte_count, req->req.length ,req->req.actual);
1000 +
1001 + count = min(byte_count, req_bufferspace);
1002 +
1003 + //test, Access by CPU
1004 + if(dma)
1005 + usb_write(FIFOCTRL, 0x80);
1006 +
1007 + for (i = 0; i < count; i++){
1008 + *buf = usb_read(EP0OUTDAT+i);
1009 + buf++;
1010 + }
1011 + req->req.actual += count;
1012 +
1013 + //test, Access by DMA
1014 + if(dma)
1015 + usb_write(FIFOCTRL, 0x00);
1016 +
1017 + return count;
1018 +}
1019 +
1020 +
1021 +static int read_ep_fifo(struct rt_ep_struct *rt_ep, struct rt_request *req)
1022 +{
1023 + u8 *buf, ep_no, ep_no_shift;
1024 + int byte_count, req_bufferspace, count, i;
1025 +
1026 +DBG;
1027 + ep_no = EP_NO(rt_ep);
1028 +
1029 + byte_count = read_outbc(ep_no);
1030 + if(unlikely(!byte_count))
1031 + FATAL_ERROR("ep_no:%d bc = 0", ep_no);
1032 +
1033 + req_bufferspace = req->req.length - req->req.actual;
1034 +
1035 + buf = req->req.buf + req->req.actual;
1036 +
1037 + if(unlikely(!req_bufferspace))
1038 + FATAL_ERROR("zlp");
1039 +
1040 + xprintk("bc=%d,r.l=%d,r.a=%d\n", byte_count, req->req.length ,req->req.actual);
1041 + if(unlikely(byte_count > req_bufferspace))
1042 + FATAL_ERROR("buffer overflow, byte_count=%d, req->req.length=%d, req->req.actual=%d\n", byte_count, req->req.length ,req->req.actual);
1043 +
1044 + count = min(byte_count, req_bufferspace);
1045 +
1046 + ep_no_shift = 0x80+ep_no * 4;
1047 + for (i = 0; i < count; i++){
1048 + *buf = usb_read(ep_no_shift);
1049 + buf++;
1050 + }
1051 +
1052 + req->req.actual += count;
1053 +
1054 + // EP Out irq handler would arm another transaction.
1055 + return count;
1056 +}
1057 +
1058 +static int write_ep_fifo_zlp(struct rt_ep_struct *rt_ep)
1059 +{
1060 + u8 epcs;
1061 + int ep_no = EP_NO(rt_ep);
1062 +
1063 +DBG;
1064 + xprintk("w%d ZLP\n", EP_NO(rt_ep));
1065 + epcs = read_epcs(rt_ep);
1066 + if(epcs & EP_CS_BSY)
1067 + FATAL_ERROR("EP%d busy. cs=%x\n", ep_no, epcs);
1068 +
1069 + /* check INEP byte count is zero? */
1070 + if(read_inbc(ep_no))
1071 + FATAL_ERROR("EP%d bc zero. bc=%d\n", ep_no, read_inbc(ep_no));
1072 +
1073 + epcs = read_epcs(rt_ep);
1074 + write_epcs(rt_ep, epcs);
1075 + return 0;
1076 +}
1077 +
1078 +
1079 +/*
1080 + * handle_epinirq()
1081 +*/
1082 +static int write_ep_fifo(struct rt_ep_struct *rt_ep, struct rt_request *req)
1083 +{
1084 + u8 *buf, epcs;
1085 + int length, i, ep_no = EP_NO(rt_ep);
1086 +
1087 +DBG;
1088 + xprintk("w ep%d req=%p,r.l=%d,r.a=%d\n",EP_NO(rt_ep),&req->req,req->req.length,req->req.actual);
1089 + epcs = read_epcs(rt_ep);
1090 + if(epcs & EP_CS_BSY)
1091 + FATAL_ERROR("EP%d busy. epcs=%x\n", ep_no, epcs);
1092 +
1093 + /* check INEP byte count is zero? */
1094 + if(read_inbc(ep_no))
1095 + FATAL_ERROR("EP%d bc=%d\n", ep_no, read_inbc(ep_no));
1096 +
1097 + buf = req->req.buf + req->req.actual;
1098 + length = (req->req.length - req->req.actual) < rt_ep->ep.maxpacket ? (req->req.length - req->req.actual) : rt_ep->ep.maxpacket;
1099 + req->req.actual += length;
1100 + if (!length) { /* zlp */
1101 + // for debug
1102 + xprintk("<%s> zero packet\n", __func__);
1103 + write_ep_fifo_zlp(rt_ep);
1104 + return 0;
1105 + }
1106 +
1107 + // write to ep in fifo
1108 + for (i=0; i< length; i++)
1109 + usb_write(0x80+ep_no*4, *buf++);
1110 +
1111 + epcs = read_epcs(rt_ep);
1112 + write_epcs(rt_ep, epcs);
1113 +
1114 + return length;
1115 +}
1116 +
1117 +/*
1118 + *
1119 + */
1120 +static int write_ep0_fifo(struct rt_ep_struct *rt_ep, struct rt_request *req)
1121 +{
1122 + u8 *buf;
1123 + int length, i;
1124 + u32 maxpacket;
1125 +
1126 +DBG;
1127 + xprintk("q.l=%d, q.a=%d, maxp=%d\n", req->req.length, req->req.actual, rt_ep->ep.maxpacket);
1128 +
1129 + buf = req->req.buf + req->req.actual;
1130 + maxpacket = (u32)(rt_ep->ep.maxpacket);
1131 + length = min(req->req.length - req->req.actual, maxpacket);
1132 +
1133 + req->req.actual += length;
1134 +
1135 + if (!length && req->req.zero)
1136 + FATAL_ERROR("zlp");
1137 +
1138 + if(!in_irq())
1139 + FATAL_ERROR("Not in irq context");
1140 +
1141 + //test, Access by CPU
1142 + if(dma)
1143 + usb_write(FIFOCTRL, 0x80);
1144 +
1145 + //write to ep0in fifo
1146 + for (i=0; i< length; i++)
1147 + usb_write(EP0INDAT+i, *buf++);
1148 +
1149 + // arm ep0in
1150 + usb_write(IN0BC, length);
1151 + if(length != rt_ep->ep.maxpacket)
1152 + usb_write(EP0CS, 0x2); // clear NAK bit to ACK host.
1153 +
1154 + //test, Access by CPU
1155 + if(dma)
1156 + usb_write(FIFOCTRL, 0x00);
1157 +
1158 + return length;
1159 +}
1160 +
1161 +static struct rt_request *get_unhandled_req(struct rt_ep_struct *rt_ep)
1162 +{
1163 + struct list_head *p;
1164 + struct rt_request *req = NULL;
1165 +
1166 + if(EP_DIR(rt_ep) == EP_OUT)
1167 + FATAL_ERROR("Out EP");
1168 +
1169 + if(dma){
1170 + list_for_each(p, &rt_ep->queue){
1171 + req = list_entry(p, struct rt_request, queue);
1172 + if(req->req.length > req->req.actual )
1173 + return req;
1174 + else if(unlikely(req->req.length == 0 && req->zlp_dma_done == 0))
1175 + return req;
1176 + else
1177 + continue;
1178 + }
1179 + return NULL;
1180 + }else{
1181 + if (!list_empty(&rt_ep->queue)){
1182 + req = list_entry(rt_ep->queue.next, struct rt_request, queue);
1183 + }else {
1184 + FATAL_ERROR("%s No request", rt_ep->ep.name);
1185 + }
1186 + return req;
1187 + }
1188 +}
1189 +
1190 +#define PADDING_LENGTH 64
1191 +static int write_dma_txring(struct rt_ep_struct *rt_ep,struct rt_request *req)
1192 +{
1193 + u8 *buf;
1194 + int length;
1195 + int retry_times = 0;
1196 + u32 hw_current_idx;
1197 +DBG;
1198 + xprintk("w%dr=%p,r.l=%d,r.a=%d\n", EP_NO(rt_ep), &req->req,req->req.length,req->req.actual);
1199 +
1200 + length = req->req.length;
1201 +
1202 + while(length > 0 || (req->req.length == 0 && req->zlp_dma_done == 0)){
1203 +retry:
1204 + /* wait for a free TXD */
1205 + hw_current_idx = reg_read(RTUSB_TX_DTX_IDX0);
1206 + if ( tx_ring0_cache[tx_cpu_owner_idx0].txd_info2.DDONE_bit == 0 ||
1207 + ((tx_cpu_owner_idx0+1) % NUM_TX_DESC == hw_current_idx) ) {
1208 + if(retry_times > 1000)
1209 + return -1;
1210 + mdelay(1);
1211 + retry_times++;
1212 + goto retry;
1213 + }
1214 +
1215 + if(length > TXMAXCAP)
1216 + length = TXMAXCAP;
1217 +
1218 + buf = req->req.buf + req->req.actual;
1219 + req->req.actual += length;
1220 +
1221 + /* deal with ZLP.*/
1222 + if(req->req.length == 0 && req->zlp_dma_done == 0)
1223 + req->zlp_dma_done = 1;
1224 +
1225 + req->txd_count++;
1226 +
1227 +#define phys_to_bus(a) ((u32)a & 0x1FFFFFFF)
1228 + if(length){
1229 + tx_ring0_cache[tx_cpu_owner_idx0].txd_info1.SDP0 = cpu_to_le32(phys_to_bus(buf));
1230 + tx_ring0_cache[tx_cpu_owner_idx0].txd_info2.SDL0 = cpu_to_le32(length);
1231 + tx_ring0_cache[tx_cpu_owner_idx0].txd_info4.zlp_flag = 0;
1232 + dma_cache_sync(NULL, (void *)buf, length, DMA_TO_DEVICE);
1233 + }else{
1234 + tx_ring0_cache[tx_cpu_owner_idx0].txd_info1.SDP0 = cpu_to_le32(phys_to_bus(tx_zlp_dummy_buf));
1235 + tx_ring0_cache[tx_cpu_owner_idx0].txd_info2.SDL0 = cpu_to_le32(sizeof(tx_zlp_dummy_buf));
1236 + tx_ring0_cache[tx_cpu_owner_idx0].txd_info4.zlp_flag = 1;
1237 + }
1238 +
1239 + tx_ring0_cache[tx_cpu_owner_idx0].txd_info4.In_ep_addr = cpu_to_le32(EP_NO(rt_ep));
1240 + tx_ring0_cache[tx_cpu_owner_idx0].txd_info2.DDONE_bit = 0;
1241 + tx_cpu_owner_idx0 = (tx_cpu_owner_idx0 + 1) % NUM_TX_DESC;
1242 +
1243 + length = req->req.length - req->req.actual;
1244 + }
1245 +
1246 + reg_write(RTUSB_TX_CTX_IDX0, tx_cpu_owner_idx0);
1247 +
1248 + return 0;
1249 +}
1250 +
1251 +
1252 +/*******************************************************************************
1253 + * Endpoint handlers
1254 + *******************************************************************************
1255 + */
1256 +
1257 +/*
1258 + * Handle In Endpoint
1259 + * CPU(FIFO):
1260 + * Enqueue -> Write fifo -> TX_DONE -> Write fifo -> TX_DONE -> ..
1261 + *
1262 + * DMA
1263 + * Enqueue -> Kick off TxD. Enqueue -> Kick off TxD. Enqueue -> Kick off TxD.
1264 + */
1265 +static int handle_inep(struct rt_ep_struct *rt_ep)
1266 +{
1267 + struct rt_request *req;
1268 +
1269 +DBG;
1270 + if(!(req = get_unhandled_req(rt_ep)))
1271 + return -1;
1272 +
1273 + if(dma){
1274 + write_dma_txring(rt_ep, req);
1275 + }else{
1276 + write_ep_fifo(rt_ep, req);
1277 + rt_ep->tx_done_count = 1;
1278 + }
1279 + return 0;
1280 +}
1281 +
1282 +/*
1283 + * IRQ context.
1284 + */
1285 +static struct rt_request *handle_outep(struct rt_ep_struct *rt_ep)
1286 +{
1287 + struct rt_request *req;
1288 + struct list_head *p;
1289 + int count = 0;
1290 +
1291 +DBG;
1292 + if (list_empty(&rt_ep->queue)){
1293 + return NULL;
1294 + }
1295 +
1296 + list_for_each(p, &rt_ep->queue){
1297 + if(count != rt_ep->rx_done_count){
1298 + count++;
1299 + continue;
1300 + }
1301 + req = list_entry(p, struct rt_request, queue);
1302 + read_ep_fifo(rt_ep, req);
1303 + return req;
1304 + }
1305 +
1306 + return NULL;
1307 +}
1308 +
1309 +static struct rt_request *handle_inep0(struct rt_ep_struct *rt_ep)
1310 +{
1311 + struct rt_request *req = NULL;
1312 +
1313 +DBG;
1314 + if (list_empty(&rt_ep->queue)) {
1315 + D_ERR(rt_ep->rt_usb->dev, "<%s> no request on %s\n", __func__, rt_ep->ep.name);
1316 + return NULL;
1317 + }
1318 +
1319 + req = list_entry(rt_ep->queue.next, struct rt_request, queue);
1320 + switch (rt_ep->rt_usb->ep0state) {
1321 + case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR */
1322 + write_ep0_fifo(rt_ep, req);
1323 + break;
1324 +
1325 + // Impossible:
1326 + //case EP0_OUT_DATA_PHASE: /* SET_DESCRIPTOR */
1327 + //case EP0_NO_DATA_PHASE: /* for no data stage control transfer */
1328 +
1329 + default:
1330 + D_ERR(rt_ep->rt_usb->dev, "<%s> ep0 i/o, odd state %d\n", __func__, rt_ep->rt_usb->ep0state);
1331 + ep_del_request(rt_ep, req);
1332 + req = NULL;
1333 + break;
1334 + }
1335 +
1336 + return req;
1337 +}
1338 +
1339 +static struct rt_request *handle_outep0(struct rt_ep_struct *rt_ep)
1340 +{
1341 + struct rt_request *req = NULL;
1342 +
1343 +DBG;
1344 + if (list_empty(&rt_ep->queue)) {
1345 + D_ERR(rt_ep->rt_usb->dev, "<%s> no request on %s\n", __func__, rt_ep->ep.name);
1346 + return NULL;
1347 + }
1348 +
1349 + if(rt_ep->rt_usb->ep0state != EP0_OUT_DATA_PHASE){
1350 + D_EP0(rt_ep->rt_usb->dev, "<%s> ep0 i/o, odd state %d\n", __func__, rt_ep->rt_usb->ep0state);
1351 + ep_del_request(rt_ep, req);
1352 + req = NULL;
1353 + }
1354 +
1355 + req = list_entry(rt_ep->queue.next, struct rt_request, queue);
1356 +
1357 + read_ep0_fifo(rt_ep, req);
1358 +
1359 + return req;
1360 +}
1361 +
1362 +/*******************************************************************************
1363 + * USB gadget callback functions
1364 + *******************************************************************************
1365 + */
1366 +static void handle_dma_rxdone(struct rt_udc_struct *rt_usb)
1367 +{
1368 + DBG;
1369 + tasklet_schedule(&rx_dma_tasklet);
1370 +}
1371 +
1372 +static void handle_dma_txdone(struct rt_udc_struct *rt_usb)
1373 +{
1374 + DBG;
1375 + tasklet_schedule(&tx_dma_tasklet);
1376 +}
1377 +
1378 +static void handle_dmairq(struct rt_udc_struct *rt_usb, u32 irq)
1379 +{
1380 + if(irq & RTUSB_RX_DONE_INT0){
1381 + handle_dma_rxdone(rt_usb);
1382 + }
1383 +
1384 + if(irq & RTUSB_TX_DONE_INT0){
1385 + handle_dma_txdone(rt_usb);
1386 + }
1387 +
1388 + reg_write(RTUSB_INT_STATUS, irq);
1389 +}
1390 +
1391 +static inline int udc_dma_reset_txring(void)
1392 +{
1393 + int count = 0;
1394 + u32 reg;
1395 +
1396 + while(count++< RING_RESET_TIMEOUT){
1397 + reg = reg_read(RTUSB_PDMA_GLO_CFG);
1398 + if(reg & RTUSB_TX_DMA_BUSY){
1399 + mdelay(1);
1400 + }else
1401 + break;
1402 +
1403 + }
1404 + if(count== RING_RESET_TIMEOUT)
1405 + return -1;
1406 +
1407 + reg = reg_read(RTUSB_PDMA_RST_IDX);
1408 + udelay(100);
1409 + reg |= (RTUSB_RST_DTX_IDX1 | RTUSB_RST_DTX_IDX0);
1410 + reg_write(RTUSB_PDMA_RST_IDX, reg);
1411 + udelay(100);
1412 + return 0;
1413 +}
1414 +
1415 +static inline int udc_dma_reset_rxring(void)
1416 +{
1417 + int count = 0;
1418 + u32 reg;
1419 +
1420 + while(count++< RING_RESET_TIMEOUT){
1421 + reg = reg_read(RTUSB_PDMA_GLO_CFG);
1422 + if(reg & RTUSB_RX_DMA_BUSY){
1423 + mdelay(1);
1424 + }else
1425 + break;
1426 + }
1427 + if(count== RING_RESET_TIMEOUT)
1428 + return -1;
1429 +
1430 + reg = reg_read(RTUSB_PDMA_RST_IDX);
1431 + udelay(100);
1432 + reg |= (RTUSB_RST_DRX_IDX1 | RTUSB_RST_DRX_IDX0);
1433 + reg_write(RTUSB_PDMA_RST_IDX, reg);
1434 + udelay(100);\
1435 + return 0;
1436 +}
1437 +
1438 +static int udc_dma_hw_reset(void)
1439 +{
1440 + if(udc_dma_reset_rxring() == -1)
1441 + return -1;
1442 + if(udc_dma_reset_txring() == -1)
1443 + return -1;
1444 + return 0;
1445 +}
1446 +
1447 +static void udc_dma_enable(int enable)
1448 +{
1449 + u32 reg;
1450 + reg = reg_read(RTUSB_PDMA_GLO_CFG);
1451 + udelay(100);
1452 + if(enable)
1453 + reg |= RTUSB_TX_WB_DDONE | RTUSB_RX_DMA_EN | RTUSB_TX_DMA_EN ;
1454 + else
1455 + reg &= ~(RTUSB_TX_WB_DDONE | RTUSB_RX_DMA_EN | RTUSB_TX_DMA_EN) ;
1456 + reg_write(RTUSB_PDMA_GLO_CFG, reg);
1457 + udelay(500);
1458 +}
1459 +
1460 +static void udc_dma_int_enable(int enable)
1461 +{
1462 + u32 reg;
1463 + reg = reg_read(RTUSB_INT_MASK);
1464 + udelay(100);
1465 + if(enable)
1466 + reg |= RTUSB_RX_DONE_INT_MSK0 | RTUSB_TX_DONE_INT_MSK0 ;
1467 + else
1468 + reg &= ~(RTUSB_RX_DONE_INT_MSK0 | RTUSB_TX_DONE_INT_MSK0) ;
1469 + reg_write(RTUSB_INT_MASK, reg);
1470 + udelay(100);
1471 +}
1472 +
1473 +static inline void udc_dma_tx_int_clear(void)
1474 +{
1475 + reg_write(RTUSB_INT_STATUS, 0x0000000F);
1476 +}
1477 +
1478 +static inline void udc_dma_rx_int_clear(void)
1479 +{
1480 + reg_write(RTUSB_INT_STATUS, 0x00030000);
1481 +}
1482 +
1483 +static inline void udc_dma_all_int_clear(void)
1484 +{
1485 + reg_write(RTUSB_INT_STATUS, 0xFFFFFFFF);
1486 +}
1487 +
1488 +static int copy_data_to_ep(void *src, int length, int ep_num)
1489 +{
1490 + struct rt_ep_struct *rt_ep;
1491 + struct rt_udc_struct *rt_usb = &controller;
1492 + struct rt_request *req;
1493 + int req_bufferspace, count;
1494 + u8 *buf;
1495 +
1496 + DBG;
1497 + rt_ep = &rt_usb->rt_ep[ep_num+IN_EP_NUM];
1498 +
1499 + if (list_empty(&rt_ep->queue)){
1500 + /* It is safe to return 0 if no req queued. */
1501 + return 0;
1502 + }
1503 +
1504 + req = list_entry(rt_ep->queue.next, struct rt_request, queue);
1505 + req_bufferspace = req->req.length - req->req.actual;
1506 +
1507 + if(unlikely(!req_bufferspace)){
1508 + // for debug
1509 + FATAL_ERROR("zlp");
1510 + return -1;
1511 + }
1512 +
1513 + if(length > req_bufferspace){
1514 + FATAL_ERROR("buffer overflow");
1515 + return -1;
1516 + }
1517 +
1518 + // sync with cache.
1519 + if(likely(length))
1520 + dma_cache_sync(NULL, src, length, DMA_FROM_DEVICE);
1521 +
1522 + buf = req->req.buf + req->req.actual;
1523 + count = min(length, req_bufferspace);
1524 + memcpy(buf, src, count);
1525 +
1526 + req->req.actual += count;
1527 +
1528 + if((req->req.actual % rt_ep->ep.maxpacket) || (req->req.actual >= req->req.length)){
1529 + done(rt_ep, req, 0); // short packet indicates transaction is done.
1530 + }
1531 + return count;
1532 +}
1533 +
1534 +static void rx_dma_done_do_tasklet(unsigned long arg)
1535 +{
1536 + u32 *rxd_info;
1537 + u32 length;
1538 + int ep, rc;
1539 + int processed_count=0;
1540 +
1541 + DBG;
1542 + for (;;){
1543 + if (rx_ring0_cache[rx_dma_owner_idx0].rxd_info2.DDONE_bit == 0)
1544 + break;
1545 +
1546 + if(processed_count++ > RX_RESCHEDULE){
1547 + tasklet_schedule(&rx_dma_tasklet);
1548 + break;
1549 + }
1550 +
1551 + length = rx_ring0_cache[rx_dma_owner_idx0].rxd_info4.Rx_bcnt;
1552 + ep = rx_ring0_cache[rx_dma_owner_idx0].rxd_info4.Out_ep_addr;
1553 +
1554 + // copy data from RXD->buffer to ep queue.
1555 + rc = copy_data_to_ep((void *)USBRxPackets[rx_dma_owner_idx0], length, ep);
1556 + if(rc <= 0)
1557 + return;
1558 +
1559 + rxd_info = (u32 *)&rx_ring0_cache[rx_dma_owner_idx0].rxd_info4;
1560 + *rxd_info = 0;
1561 +
1562 + /* clear DDONE bit*/
1563 + rxd_info = (u32 *)&rx_ring0_cache[rx_dma_owner_idx0].rxd_info2;
1564 + *rxd_info = 0;
1565 + //rx_ring0_cache[rx_dma_owner_idx0].rxd_info2.DDONE_bit = 0;
1566 + //rx_ring0_cache[i].rxd_info2.LS0= 0;
1567 + rx_ring0_cache[rx_dma_owner_idx0].rxd_info2.PLEN0= sizeof(u8) * RX_BUFF_SZ;
1568 +
1569 + /* Move point to next RXD which wants to alloc */
1570 + //OUTL(cpu_to_le32((u32) rx_dma_owner_idx0), RTUSB_RX_CALC_IDX0);
1571 + reg_write(RTUSB_RX_CALC_IDX0, rx_dma_owner_idx0);
1572 +
1573 + /* Update to Next packet point that was received.
1574 + */
1575 + rx_dma_owner_idx0 = (rx_dma_owner_idx0 + 1) % NUM_RX_DESC;
1576 + }
1577 +}
1578 +
1579 +/*
1580 + * Recycle reqs and call gadget complete callback function.
1581 + */
1582 +static void tx_dma_done_do_tasklet(unsigned long arg)
1583 +{
1584 + int ep_num;
1585 + u32 hw_current;
1586 + struct rt_ep_struct *rt_ep;
1587 + struct rt_request *rt_req;
1588 + struct rt_udc_struct *rt_usb = &controller;
1589 +
1590 + DBG;
1591 + while(tx_need_free_idx0 != (hw_current = reg_read(RTUSB_TX_DTX_IDX0))){
1592 + int retry = 0;
1593 + while(tx_ring0_cache[tx_need_free_idx0].txd_info2.DDONE_bit != 1){
1594 + mdelay(1);
1595 + retry++;
1596 + if(retry > 1000)
1597 + FATAL_ERROR("tx timeout");
1598 + }
1599 +
1600 + // rt_ep = tx_ring0_req_mapping[tx_need_free_idx0];
1601 + ep_num = tx_ring0_cache[tx_need_free_idx0].txd_info4.In_ep_addr;
1602 + if(!ep_num || ep_num > IN_EP_NUM)
1603 + FATAL_ERROR("Out of range");
1604 +
1605 + rt_ep = &rt_usb->rt_ep[ep_num];
1606 + if(list_empty(&rt_ep->queue))
1607 + FATAL_ERROR("ep[%d] No request", ep_num);
1608 +
1609 + rt_req = list_entry(rt_ep->queue.next, struct rt_request, queue);
1610 + rt_req->txd_count--;
1611 +
1612 +
1613 + if(rt_req->txd_count == 0)
1614 + done(rt_ep, rt_req, 0);
1615 +
1616 + tx_need_free_idx0 = (tx_need_free_idx0 + 1) % NUM_TX_DESC;
1617 +
1618 + }
1619 +}
1620 +
1621 +static int udc_dma_rst(void)
1622 +{
1623 + if( udc_dma_reset_txring() == -1)
1624 + return -1;
1625 + if( udc_dma_reset_rxring() == -1)
1626 + return -1;
1627 +
1628 + tx_cpu_owner_idx0 = 0;
1629 + tx_need_free_idx0 = 0;
1630 + rx_dma_owner_idx0 = 0;
1631 + reg_write(RTUSB_RX_CALC_IDX0, cpu_to_le32(NUM_RX_DESC - 1));
1632 + return 0;
1633 +}
1634 +
1635 +static int rt_udc_dma_init(void)
1636 +{
1637 + int i;
1638 +
1639 + if( udc_dma_hw_reset() == -1)
1640 + return -1;
1641 +
1642 + for(i=0; i<NUM_RX_DESC; i++){
1643 + USBRxPackets[i] = kmalloc(sizeof(u8) * RX_BUFF_SZ, GFP_ATOMIC | GFP_DMA); // todo: use GFP_KERNEL instead.
1644 + if(!USBRxPackets[i]){
1645 + for(i=i-1; i>=0; i--)
1646 + kfree((void *)USBRxPackets[i]);
1647 + printk("No mem.");
1648 + return -1;
1649 + }
1650 + }
1651 +
1652 + tx_ring0_cache = dma_alloc_coherent(NULL, sizeof(struct PDMA_txdesc) * NUM_TX_DESC, &tx_ring_bus_addr, GFP_KERNEL);
1653 + rx_ring0_cache = dma_alloc_coherent(NULL, sizeof(struct PDMA_rxdesc) * NUM_RX_DESC, &rx_ring_bus_addr, GFP_KERNEL);
1654 +
1655 + printk("USB PDMA mode enabled.\n");
1656 + printk("tx_ring=%p\n", tx_ring0_cache);
1657 + printk("rx_ring=%p\n", rx_ring0_cache);
1658 +
1659 + tx_ring0_noncache = tx_ring0_cache;
1660 + rx_ring0_noncache = rx_ring0_cache;
1661 +
1662 + for(i=0; i < NUM_RX_DESC; i++){
1663 + memset((void *)&rx_ring0_noncache[i], 0, 16 /* sizeof()*/);
1664 + rx_ring0_noncache[i].rxd_info2.DDONE_bit = 0;
1665 + rx_ring0_noncache[i].rxd_info2.LS0= 0;
1666 + rx_ring0_noncache[i].rxd_info2.PLEN0= sizeof(u8) * RX_BUFF_SZ;
1667 + rx_ring0_noncache[i].rxd_info1.PDP0 = dma_map_single(NULL, (void *)USBRxPackets[i], sizeof(u8) * RX_BUFF_SZ, DMA_FROM_DEVICE);
1668 + }
1669 +
1670 + for (i=0; i < NUM_TX_DESC; i++) {
1671 + memset((void *)&tx_ring0_noncache[i],0, 16 /* sizeof()*/);
1672 + tx_ring0_noncache[i].txd_info2.LS0_bit = 1;
1673 + tx_ring0_noncache[i].txd_info2.DDONE_bit = 1;
1674 + // we would map dma buffer dynamically in IRQ handler & ep_queue();
1675 + }
1676 +
1677 + rx_dma_owner_idx0 = 0;
1678 + tx_cpu_owner_idx0 = 0;
1679 + tx_need_free_idx0 = 0;
1680 +
1681 + /* initial UDMA register */
1682 + //OUTL(cpu_to_le32((u32) UDMA_Init_Setting), RTUSB_UDMA_CTRL);
1683 +
1684 + if(sm){
1685 + printk("Storage mode enabled.\n");
1686 + reg_write(RTUSB_UDMA_CTRL, 0x3F000063); /* enable storage mode */
1687 + }else
1688 + reg_write(RTUSB_UDMA_CTRL, 0x3F000003);
1689 +
1690 +
1691 + /* Tell the adapter where the TX/RX rings are located. */
1692 + //OUTL(phys_to_bus((u32) &rx_ring[0]), RTUSB_RX_BASE_PTR0);
1693 + reg_write(RTUSB_RX_BASE_PTR0, rx_ring_bus_addr);
1694 +
1695 + //OUTL(phys_to_bus((u32) &tx_ring0[0]), RTUSB_TX_BASE_PTR0);
1696 + reg_write(RTUSB_TX_BASE_PTR0, tx_ring_bus_addr);
1697 +
1698 + //OUTL(cpu_to_le32((u32) NUM_RX_DESC), RTUSB_RX_MAX_CNT0);
1699 + //OUTL(cpu_to_le32((u32) NUM_TX_DESC), RTUSB_TX_MAX_CNT0);
1700 + reg_write(RTUSB_RX_MAX_CNT0, cpu_to_le32(NUM_RX_DESC));
1701 + reg_write(RTUSB_TX_MAX_CNT0, cpu_to_le32(NUM_TX_DESC));
1702 +
1703 + //OUTL(cpu_to_le32((u32) tx_cpu_owner_idx0), RTUSB_TX_CTX_IDX0);
1704 + //OUTL(cpu_to_le32((u32) (NUM_RX_DESC - 1)), RTUSB_RX_CALC_IDX0);
1705 + reg_write(RTUSB_TX_CTX_IDX0, cpu_to_le32(tx_cpu_owner_idx0));
1706 + reg_write(RTUSB_RX_CALC_IDX0, cpu_to_le32(NUM_RX_DESC - 1));
1707 +
1708 + udelay(500);
1709 + return 0;
1710 +}
1711 +
1712 +static int udc_dma_fini(void)
1713 +{
1714 + int i;
1715 + u32 len;
1716 + dma_addr_t addr;
1717 +
1718 + udc_dma_enable(false);
1719 + udc_dma_int_enable(false);
1720 +
1721 + /* restore UDMA register */
1722 + reg_write(RTUSB_UDMA_CTRL, 0x0);
1723 +
1724 + // unmap & free RX buffer
1725 + for(i=0; i<NUM_RX_DESC; i++){
1726 + addr = rx_ring0_noncache[i].rxd_info1.PDP0;
1727 + if(addr)
1728 + dma_unmap_single(NULL, addr, sizeof(u8) * RX_BUFF_SZ, DMA_FROM_DEVICE);
1729 + kfree((void *)USBRxPackets[i]);
1730 + }
1731 +
1732 + // unmap Tx buffer only(but not free it)
1733 + for(i=0; i<NUM_TX_DESC; i++){
1734 + addr = tx_ring0_noncache[i].txd_info1.SDP0;
1735 + if(addr){
1736 + len = tx_ring0_noncache[i].txd_info2.SDL0;
1737 + dma_unmap_single(NULL, addr, sizeof(u8) * len, DMA_TO_DEVICE);
1738 + }
1739 + }
1740 +
1741 + dma_free_coherent(NULL, sizeof(struct PDMA_txdesc) * NUM_TX_DESC, tx_ring0_cache, tx_ring_bus_addr);
1742 + dma_free_coherent(NULL, sizeof(struct PDMA_rxdesc) * NUM_RX_DESC, rx_ring0_cache, rx_ring_bus_addr);
1743 +
1744 + return 0;
1745 +}
1746 +
1747 +static int rt_ep_enable(struct usb_ep *usb_ep, const struct usb_endpoint_descriptor *desc)
1748 +{
1749 + struct rt_ep_struct *rt_ep = container_of(usb_ep, struct rt_ep_struct, ep);
1750 + struct rt_udc_struct *rt_usb = rt_ep->rt_usb;
1751 + unsigned long flags;
1752 +
1753 + DBG;
1754 +
1755 + if (!usb_ep || !desc || !EP_NO(rt_ep) || desc->bDescriptorType != USB_DT_ENDPOINT || rt_ep->bEndpointAddress != desc->bEndpointAddress) {
1756 + D_ERR(rt_usb->dev, "<%s> bad ep or descriptor\n", __func__);
1757 + return -EINVAL;
1758 + }
1759 + if (rt_ep->bmAttributes != desc->bmAttributes) {
1760 + D_ERR(rt_usb->dev, "<%s> %s type mismatch, 0x%x, 0x%x\n", __func__, usb_ep->name, rt_ep->bmAttributes, desc->bmAttributes);
1761 + return -EINVAL;
1762 + }
1763 + if (!rt_usb->driver || rt_usb->gadget.speed == USB_SPEED_UNKNOWN) {
1764 + D_ERR(rt_usb->dev, "<%s> bogus device state\n", __func__);
1765 + return -ESHUTDOWN;
1766 + }
1767 + local_irq_save(flags);
1768 + rt_ep->stopped = 0;
1769 + if(dma){
1770 + //rt_ep_irq_enable(rt_ep);
1771 + }else
1772 + rt_ep_irq_enable(rt_ep);
1773 + local_irq_restore(flags);
1774 +
1775 + xprintk("<%s> ENABLED %s\n", __func__, usb_ep->name);
1776 + return 0;
1777 +}
1778 +
1779 +static int rt_ep_disable(struct usb_ep *usb_ep)
1780 +{
1781 + struct rt_ep_struct *rt_ep = container_of(usb_ep, struct rt_ep_struct, ep);
1782 + unsigned long flags;
1783 +
1784 +DBG;
1785 + if (!usb_ep || !EP_NO(rt_ep) /* || !list_empty(&rt_ep->queue) */) {
1786 + D_ERR(rt_ep->rt_usb->dev, "<%s> %s can not be disabled\n", __func__, usb_ep ? rt_ep->ep.name : NULL);
1787 + return -EINVAL;
1788 + }
1789 +
1790 + local_irq_save(flags);
1791 + rt_ep->stopped = 1;
1792 + nuke(rt_ep, -ESHUTDOWN);
1793 + rt_flush(rt_ep);
1794 + rt_ep_irq_disable(rt_ep);
1795 +
1796 + local_irq_restore(flags);
1797 +
1798 + xprintk("<%s> DISABLED %s\n", __func__, usb_ep->name);
1799 + return 0;
1800 +}
1801 +
1802 +static struct usb_request *rt_ep_alloc_request (struct usb_ep *usb_ep, gfp_t gfp_flags)
1803 +{
1804 + struct rt_request *req;
1805 +
1806 + DBG;
1807 + req = kzalloc(sizeof *req, gfp_flags);
1808 + if (!req || !usb_ep)
1809 + return 0;
1810 +
1811 + INIT_LIST_HEAD(&req->queue);
1812 + req->in_use = 0;
1813 + return &req->req;
1814 +}
1815 +
1816 +static void rt_ep_free_request(struct usb_ep *usb_ep, struct usb_request *usb_req)
1817 +{
1818 + struct rt_request *req;
1819 +
1820 + DBG;
1821 + req = container_of(usb_req, struct rt_request, req);
1822 + WARN_ON(!list_empty(&req->queue));
1823 + kfree(req);
1824 +}
1825 +
1826 +/*
1827 + * Two cases :
1828 + * 1) UDC TX (IN EPs)
1829 + * enqueue req -> handle_ep() -> write fifo -> TX_DONE -> handle_ep() -> write next fifo -> TX_DONE...
1830 + *
1831 + * 2) UDC RX (OUT EPs)
1832 + * enqueue req -> RX_DONE -> handle_ep() -> read_fifo -> RX_DONE -> handle_ep() -> read fifo...
1833 + */
1834 +static int rt_ep_queue(struct usb_ep *usb_ep, struct usb_request *req, gfp_t gfp_flags)
1835 +{
1836 + struct rt_ep_struct *rt_ep;
1837 + struct rt_udc_struct *rt_usb;
1838 + struct rt_request *rt_req;
1839 + unsigned long flags;
1840 + int ret = 0;
1841 + int handle_right_now = 0;
1842 +
1843 + rt_ep = container_of(usb_ep, struct rt_ep_struct, ep);
1844 + rt_usb = rt_ep->rt_usb;
1845 + rt_req = container_of(req, struct rt_request, req);
1846 + rt_req->rt_ep = rt_ep;
1847 +
1848 + if (rt_usb->set_config && !EP_NO(rt_ep)) {
1849 + rt_usb->set_config = 0;
1850 + D_ERR(rt_usb->dev, "<%s> gadget reply set config\n", __func__);
1851 + return 0;
1852 + }
1853 +
1854 + if (unlikely(!req || !rt_req || !req->complete || !req->buf)) {
1855 + D_ERR(rt_usb->dev, "<%s> bad params\n", __func__);
1856 + return -EINVAL;
1857 + }
1858 +
1859 + if (unlikely(!usb_ep || !rt_ep)) {
1860 + D_ERR(rt_usb->dev, "<%s> bad ep\n", __func__);
1861 + return -EINVAL;
1862 + }
1863 +
1864 + if (!rt_usb->driver || rt_usb->gadget.speed == USB_SPEED_UNKNOWN) {
1865 + D_ERR(rt_usb->dev, "<%s> bogus device state\n", __func__);
1866 + return -ESHUTDOWN;
1867 + }
1868 +
1869 + /* debug */
1870 + xprintk("<eq> ep%d%s %p %dB\n", EP_NO(rt_ep), ((!EP_NO(rt_ep) && rt_ep->rt_usb->ep0state == EP0_IN_DATA_PHASE) || (EP_NO(rt_ep) && EP_DIR(rt_ep) == EP_IN )) ? "IN" : "OUT", &rt_req->req, req->length);
1871 +
1872 + if (rt_ep->stopped) {
1873 + printk("EP%d -> stopped.\n", EP_NO(rt_ep));
1874 + req->status = -ESHUTDOWN;
1875 + return -ESHUTDOWN;
1876 + }
1877 +
1878 + if (rt_req->in_use) {
1879 + D_ERR(rt_usb->dev, "<%s> refusing to queue req %p (already queued)\n", __func__, req);
1880 + return -1;
1881 + }
1882 +
1883 + local_irq_save(flags);
1884 + /*
1885 + * handle No-data Ctrl transfer.
1886 + */
1887 + if(!EP_NO(rt_ep)/* EP0 */ && EP_DIR(rt_ep) == EP_OUT && !req->length){
1888 + done(rt_ep, rt_req, 0);
1889 + local_irq_restore(flags);
1890 + return ret;
1891 + }
1892 +
1893 + req->status = -EINPROGRESS;
1894 + req->actual = 0;
1895 +
1896 + if(dma || list_empty(&rt_ep->queue))
1897 + handle_right_now = 1;
1898 +
1899 + ep_add_request(rt_ep, rt_req);
1900 +
1901 + if(handle_right_now){
1902 + if(!EP_NO(rt_ep) && rt_ep->rt_usb->ep0state != EP0_OUT_DATA_PHASE){ /* ep0 && TX*/
1903 + handle_inep0(rt_ep);
1904 + }else if( EP_DIR(rt_ep) == EP_IN){ /* epin[1-x] */
1905 + handle_inep(rt_ep);
1906 + }else{
1907 + // other reqs are waiting for TX_DONE int.
1908 + }
1909 + }
1910 +
1911 + if(dma){
1912 + if(EP_NO(rt_ep) && (EP_DIR(rt_ep) == EP_OUT))
1913 + tasklet_schedule(&rx_dma_tasklet);
1914 + }else{
1915 + if( (EP_DIR(rt_ep) == EP_OUT)/* OUT EP */ && rt_ep->pending){
1916 + rt_ep->pending = 0;
1917 + handle_pending_epoutirq(rt_usb, rt_ep, rt_req);
1918 + }
1919 + }
1920 +
1921 + local_irq_restore(flags);
1922 + return ret;
1923 +}
1924 +
1925 +static int rt_ep_dequeue(struct usb_ep *usb_ep, struct usb_request *usb_req)
1926 +{
1927 + struct rt_ep_struct *rt_ep = container_of(usb_ep, struct rt_ep_struct, ep);
1928 + struct rt_request *req;
1929 + unsigned long flags;
1930 +
1931 + DBG;
1932 + if (unlikely(!usb_ep || !EP_NO(rt_ep))) {
1933 + D_ERR(rt_ep->rt_usb->dev, "<%s> bad ep\n", __func__);
1934 + return -EINVAL;
1935 + }
1936 +
1937 + local_irq_save(flags);
1938 +
1939 + /* make sure it's actually queued on this endpoint */
1940 + list_for_each_entry(req, &rt_ep->queue, queue) {
1941 + if (&req->req == usb_req)
1942 + break;
1943 + }
1944 + if (&req->req != usb_req) {
1945 + local_irq_restore(flags);
1946 + return -EINVAL;
1947 + }
1948 +
1949 + done(rt_ep, req, -ECONNRESET);
1950 +
1951 + local_irq_restore(flags);
1952 + return 0;
1953 +}
1954 +
1955 +static int rt_ep_set_halt(struct usb_ep *usb_ep, int value)
1956 +{
1957 + struct rt_ep_struct *rt_ep = container_of(usb_ep, struct rt_ep_struct, ep);
1958 + unsigned long flags;
1959 +
1960 + DBG;
1961 + if (unlikely(!usb_ep || !EP_NO(rt_ep))) {
1962 + D_ERR(rt_ep->rt_usb->dev, "<%s> bad ep\n", __func__);
1963 + return -EINVAL;
1964 + }
1965 +
1966 + local_irq_save(flags);
1967 +
1968 + if ((rt_ep->bEndpointAddress & USB_DIR_IN) && !list_empty(&rt_ep->queue)) {
1969 + local_irq_restore(flags);
1970 + return -EAGAIN;
1971 + }
1972 +
1973 + rt_ep_stall(rt_ep, 1);
1974 +
1975 + local_irq_restore(flags);
1976 +
1977 + D_EPX(rt_ep->rt_usb->dev, "<%s> %s halt\n", __func__, usb_ep->name);
1978 + return 0;
1979 +}
1980 +
1981 +static int rt_ep_fifo_status(struct usb_ep *usb_ep)
1982 +{
1983 + struct rt_ep_struct *rt_ep = container_of(usb_ep, struct rt_ep_struct, ep);
1984 +
1985 + DBG;
1986 + if (!usb_ep) {
1987 + D_ERR(rt_ep->rt_usb->dev, "<%s> bad ep\n", __func__);
1988 + return -ENODEV;
1989 + }
1990 +
1991 + if (rt_ep->rt_usb->gadget.speed == USB_SPEED_UNKNOWN)
1992 + return 0;
1993 + else
1994 + return rt_fifo_bcount(rt_ep);
1995 +}
1996 +
1997 +static void rt_ep_fifo_flush(struct usb_ep *usb_ep)
1998 +{
1999 + struct rt_ep_struct *rt_ep = container_of(usb_ep, struct rt_ep_struct, ep);
2000 + unsigned long flags;
2001 +
2002 + DBG;
2003 + local_irq_save(flags);
2004 +
2005 + if (!usb_ep || !EP_NO(rt_ep) || !list_empty(&rt_ep->queue)) {
2006 + D_ERR(rt_ep->rt_usb->dev, "<%s> bad ep\n", __func__);
2007 + local_irq_restore(flags);
2008 + return;
2009 + }
2010 +
2011 + /* toggle and halt bits stay unchanged */
2012 + rt_flush(rt_ep);
2013 +
2014 + local_irq_restore(flags);
2015 +}
2016 +
2017 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)
2018 +static void *rt_ep_alloc_buffer(struct usb_ep *_ep, unsigned bytes, dma_addr_t *dma, gfp_t gfp_flags)
2019 +{
2020 + char *retval;
2021 +
2022 + retval = kmalloc (bytes, gfp_flags & ~(__GFP_DMA|__GFP_HIGHMEM));
2023 + if (retval)
2024 +// *dma = virt_to_bus (retval);
2025 + *dma = (dma_addr_t)~0;
2026 + return retval;
2027 +}
2028 +
2029 +static void rt_ep_free_buffer(struct usb_ep *_ep, void *buf, dma_addr_t dma, unsigned bytes)
2030 +{
2031 + kfree (buf);
2032 +}
2033 +#endif
2034 +
2035 +static struct usb_ep_ops rt_ep_ops = {
2036 + .enable = rt_ep_enable,
2037 + .disable = rt_ep_disable,
2038 +
2039 + .alloc_request = rt_ep_alloc_request,
2040 + .free_request = rt_ep_free_request,
2041 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)
2042 + .alloc_buffer = rt_ep_alloc_buffer,
2043 + .free_buffer = rt_ep_free_buffer,
2044 +#endif
2045 + .queue = rt_ep_queue,
2046 + .dequeue = rt_ep_dequeue,
2047 +
2048 + .set_halt = rt_ep_set_halt,
2049 + .fifo_status= rt_ep_fifo_status,
2050 + .fifo_flush = rt_ep_fifo_flush,
2051 +};
2052 +
2053 +/*******************************************************************************
2054 + * USB endpoint control functions
2055 + *******************************************************************************
2056 + */
2057 +static void usb_init_data(struct rt_udc_struct *rt_usb)
2058 +{
2059 + struct rt_ep_struct *rt_ep;
2060 + u8 i;
2061 +
2062 + DBG;
2063 + /* device/ep0 records init */
2064 + INIT_LIST_HEAD(&rt_usb->gadget.ep_list);
2065 + INIT_LIST_HEAD(&rt_usb->gadget.ep0->ep_list);
2066 + ep0_chg_stat(__func__, rt_usb, EP0_IDLE);
2067 +
2068 + /* basic endpoint records init */
2069 + for (i = 0; i < RT_USB_NB_EP; i++) {
2070 + rt_ep = &rt_usb->rt_ep[i];
2071 +
2072 + if (i) {
2073 + list_add_tail(&rt_ep->ep.ep_list, &rt_usb->gadget.ep_list);
2074 + rt_ep->stopped = 1;
2075 + } else
2076 + rt_ep->stopped = 0;
2077 +
2078 + INIT_LIST_HEAD(&rt_ep->queue);
2079 + }
2080 +}
2081 +
2082 +static void udc_stop_activity(struct rt_udc_struct *rt_usb, struct usb_gadget_driver *driver)
2083 +{
2084 + struct rt_ep_struct *rt_ep;
2085 + int i;
2086 +
2087 + if (rt_usb->gadget.speed == USB_SPEED_UNKNOWN)
2088 + driver = NULL;
2089 +
2090 + /* prevent new request submissions, kill any outstanding requests */
2091 + for (i = 0; i < RT_USB_NB_EP; i++) {
2092 + rt_ep = &rt_usb->rt_ep[i];
2093 + if(i != 0){ /* don't have to flush EP[0]. */
2094 + rt_flush(rt_ep);
2095 + rt_ep->stopped = 1;
2096 + rt_ep_irq_disable(rt_ep);
2097 + }
2098 + nuke(rt_ep, -ESHUTDOWN);
2099 + }
2100 +
2101 + rt_usb->cfg = 0;
2102 + rt_usb->intf = 0;
2103 + rt_usb->alt = 0;
2104 +
2105 + if (driver)
2106 + driver->disconnect(&rt_usb->gadget);
2107 +}
2108 +
2109 +/*
2110 + * keep for reference.
2111 + */
2112 +static void handle_config(unsigned long data)
2113 +{
2114 + DBG;
2115 +#if 0
2116 + struct imx_udc_struct *imx_usb = (void *)data;
2117 + struct usb_ctrlrequest u;
2118 + int temp, cfg, intf, alt;
2119 +
2120 + local_irq_disable();
2121 +
2122 + temp = __raw_readl(imx_usb->base + USB_STAT);
2123 + cfg = (temp & STAT_CFG) >> 5;
2124 + intf = (temp & STAT_INTF) >> 3;
2125 + alt = temp & STAT_ALTSET;
2126 +
2127 + xprintk("<%s> orig config C=%d, I=%d, A=%d / req config C=%d, I=%d, A=%d\n", __func__, imx_usb->cfg, imx_usb->intf, imx_usb->alt, cfg, intf, alt);
2128 +
2129 + if (cfg == 1 || cfg == 2) {
2130 +
2131 + if (imx_usb->cfg != cfg) {
2132 + u.bRequest = USB_REQ_SET_CONFIGURATION;
2133 + u.bRequestType = USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE;
2134 + u.wValue = cfg;
2135 + u.wIndex = 0;
2136 + u.wLength = 0;
2137 + imx_usb->cfg = cfg;
2138 + imx_usb->driver->setup(&imx_usb->gadget, &u);
2139 +
2140 + }
2141 + if (imx_usb->intf != intf || imx_usb->alt != alt) {
2142 + u.bRequest = USB_REQ_SET_INTERFACE;
2143 + u.bRequestType = USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_INTERFACE;
2144 + u.wValue = alt;
2145 + u.wIndex = intf;
2146 + u.wLength = 0;
2147 + imx_usb->intf = intf;
2148 + imx_usb->alt = alt;
2149 + imx_usb->driver->setup(&imx_usb->gadget, &u);
2150 + }
2151 + }
2152 +
2153 + imx_usb->set_config = 0;
2154 +
2155 + local_irq_enable();
2156 +#endif
2157 +}
2158 +
2159 +static void handle_setup(struct rt_udc_struct *rt_usb)
2160 +{
2161 + u8 epcs;
2162 + int i;
2163 + union {
2164 + struct usb_ctrlrequest r;
2165 + u8 raw[8];
2166 + u32 word[2];
2167 + } u;
2168 + struct rt_ep_struct *rt_ep = &rt_usb->rt_ep[0];
2169 +
2170 + nuke(rt_ep, -EPROTO);
2171 +
2172 + // read setup packet
2173 + for (i = 0; i < 8; i++)
2174 + u.raw[i] = usb_read(SETUPDATA + i);
2175 +
2176 + le16_to_cpus(&u.r.wValue);
2177 + le16_to_cpus(&u.r.wIndex);
2178 + le16_to_cpus(&u.r.wLength);
2179 +
2180 + xprintk("<SETUP> %02x.%02x v%04x\n", u.r.bRequestType, u.r.bRequest, u.r.wValue);
2181 +
2182 + switch(u.r.bRequest){
2183 + /* HW(CUSB2) has handled it. */
2184 + case USB_REQ_SET_ADDRESS:
2185 + if (u.r.bRequestType != (USB_TYPE_STANDARD | USB_RECIP_DEVICE))
2186 + break;
2187 + return;
2188 + }
2189 +
2190 + if(!u.r.wLength){
2191 + ep0_chg_stat(__func__, rt_usb, EP0_NO_DATA_PHASE);
2192 + }else if (u.r.bRequestType & USB_DIR_IN){
2193 + ep0_chg_stat(__func__, rt_usb, EP0_IN_DATA_PHASE);
2194 + }else{
2195 + // reload and clear out0bc
2196 + usb_write(OUT0BC, 0);
2197 + ep0_chg_stat(__func__, rt_usb, EP0_OUT_DATA_PHASE);
2198 + }
2199 +
2200 + if(!rt_usb->driver){
2201 + printk("<%s> please insert gadget driver/module.\n", __func__);
2202 + goto stall;
2203 + }
2204 +
2205 + if(!rt_usb->driver->setup)
2206 + goto stall;
2207 +
2208 + i = rt_usb->driver->setup(&rt_usb->gadget, &u.r); // gadget would queue more usb req here
2209 +
2210 + if (i < 0) {
2211 + printk("<%s> device setup error %d\n", __func__, i);
2212 + goto stall;
2213 + }
2214 +
2215 + if(rt_usb->ep0state == EP0_NO_DATA_PHASE){
2216 + epcs = read_epcs(rt_ep);
2217 + epcs |= EP_CS_EP0_HSNAK; // clear hsnak to let HW ack the status stage.
2218 + write_epcs(rt_ep, epcs);
2219 + }
2220 +
2221 + return;
2222 +stall:
2223 + printk("<%s> protocol STALL\n", __func__);
2224 + rt_ep_stall(rt_ep, 1);
2225 + ep0_chg_stat(__func__, rt_usb, EP0_STALL);
2226 + return;
2227 +}
2228 +
2229 +/*
2230 + * handle TX done interrupt
2231 + */
2232 +static void handle_epinirq(struct rt_udc_struct *rt_usb, u8 epinirq)
2233 +{
2234 + u8 irq = 0x0;
2235 + struct rt_request *req;
2236 + struct rt_ep_struct *rt_ep;
2237 +
2238 + rt_ep = &rt_usb->rt_ep[epinirq];
2239 +
2240 + if (list_empty(&rt_ep->queue))
2241 + FATAL_ERROR("empty queue");
2242 +
2243 + // clear ep interrupt
2244 + if(epinirq < 8){
2245 + irq |= 1 << epinirq;
2246 + usb_write(IN07IRQ, irq);
2247 + }else{
2248 + irq |= 1 << (epinirq-8);
2249 + usb_write(IN815IRQ, irq);
2250 + }
2251 +
2252 + req = list_entry(rt_ep->queue.next, struct rt_request, queue);
2253 + xprintk("r.l=%d, r.a=%d\n", req->req.length, req->req.actual);
2254 + if(req->req.actual >= req->req.length ){
2255 + if( req->req.actual && (!(req->req.actual % rt_ep->ep.maxpacket)) && req->req.zero){
2256 + // deal with one more "zlp"
2257 + req->req.zero = 0;
2258 + write_ep_fifo_zlp(rt_ep);
2259 + return;
2260 + }
2261 +
2262 + // the first tx req in ep->queue is done.
2263 + rt_ep->tx_done_count = 0;
2264 + if(!epinirq /* EP0 */)
2265 + ep0_chg_stat(__func__, rt_usb, EP0_IDLE);
2266 + done(rt_ep, req, 0);
2267 +#if 1
2268 + // more reqs there.
2269 + if (!list_empty(&rt_ep->queue) && !rt_ep->tx_done_count){
2270 + if(!epinirq /* EP0 */){
2271 + handle_inep0(rt_ep);
2272 + }else{
2273 + handle_inep(rt_ep);
2274 + }
2275 + }
2276 +#endif
2277 + }else{
2278 + if(!epinirq /* EP0 */){
2279 + handle_inep0(rt_ep);
2280 + }else
2281 + handle_inep(rt_ep);
2282 + }
2283 +}
2284 +
2285 +static void handle_ep0outirq(struct rt_udc_struct *rt_usb, u8 epoutirq)
2286 +{
2287 + u8 epcs, irq = 0x0;
2288 + struct rt_request *req = NULL;
2289 + struct rt_ep_struct *rt_ep = NULL;
2290 +
2291 +DBG;
2292 + rt_ep = &rt_usb->rt_ep[0];
2293 +
2294 + if(rt_usb->ep0state == EP0_STALL){
2295 + printk("<%s> protocol STALL\n", __func__);
2296 + rt_ep_stall(rt_ep, 1);
2297 + return;
2298 + }
2299 +
2300 + if(rt_usb->ep0state != EP0_OUT_DATA_PHASE)
2301 + FATAL_ERROR("Odd stage");
2302 +
2303 + do{
2304 + if(unlikely(!read_outbc(0x0)))
2305 + FATAL_ERROR("EP0 BC");
2306 +
2307 + if (unlikely(list_empty(&rt_ep->queue)))
2308 + FATAL_ERROR("EP0 no req");
2309 +
2310 + req = handle_outep0(rt_ep);
2311 +
2312 + //req = list_entry(rt_ep->queue.next, struct rt_request, queue);
2313 + xprintk("q.l=%d,q.a=%d\n", req->req.length, req->req.actual);
2314 +
2315 + // clear ep interrupt
2316 + irq |= 1;
2317 + usb_write(OUT07IRQ, irq);
2318 +
2319 + if(req && ((req->req.actual % rt_ep->ep.maxpacket) || (req->req.actual >= req->req.length))){
2320 + ep0_chg_stat(__func__, rt_usb, EP0_IDLE);
2321 + done(rt_ep, req, 0); // short packet indicates transaction is done.
2322 +
2323 + epcs = read_epcs(rt_ep);
2324 + epcs |= EP_CS_EP0_HSNAK; // clear hsnak bit to let HW ack the status stage.
2325 + write_epcs(rt_ep, epcs);
2326 + break;
2327 + }
2328 +
2329 + // reload EP[0]
2330 + usb_write(OUT0BC /*out0bc*/, 0x0);
2331 + epcs = read_epcs(rt_ep);
2332 + }while(!(epcs & EP0_OUT_BSY));
2333 +}
2334 +
2335 +static void handle_pending_epoutirq(struct rt_udc_struct *rt_usb, struct rt_ep_struct *rt_ep, struct rt_request *req)
2336 +{
2337 + u8 epcs;
2338 +
2339 +DBG;
2340 + do{
2341 + if(unlikely(!read_outbc(EP_NO(rt_ep))))
2342 + FATAL_ERROR("No BC");
2343 +
2344 + handle_outep(rt_ep);
2345 + if(req && ( (req->req.actual % rt_ep->ep.maxpacket) || (req->req.actual >= req->req.length))){
2346 + xprintk("q.l=%d,q.a=%d\n", req->req.length, req->req.actual);
2347 +
2348 + //rx_done(rt_ep, req, 0);
2349 + done(rt_ep, req, 0);
2350 + }
2351 +
2352 + epcs = read_epcs(rt_ep);
2353 + write_epcs(rt_ep, 0x0);
2354 + epcs = read_epcs(rt_ep);
2355 +
2356 + }while(!(epcs & EP_CS_BSY));
2357 +}
2358 +
2359 +static void handle_epoutirq(struct rt_udc_struct *rt_usb, u8 epoutirq)
2360 +{
2361 + u8 irq = 0x0;
2362 +
2363 +DBG;
2364 + if(unlikely(epoutirq == 0x0)){
2365 + handle_ep0outirq(rt_usb, 0x0);
2366 + return;
2367 + }
2368 +
2369 + tasklet_schedule(&rx_tasklet);
2370 +
2371 + // clear ep interrupt
2372 + irq |= 1 << epoutirq;
2373 + usb_write(OUT07IRQ, irq);
2374 + return;
2375 +}
2376 +
2377 +static void eps_change_to_hs(struct rt_udc_struct *rt_usb)
2378 +{
2379 + int i;
2380 + struct rt_ep_struct *rt_ep;
2381 + for(i = 0; i < RT_USB_NB_EP; i++){
2382 + rt_ep = &rt_usb->rt_ep[i];
2383 + if(rt_ep->bmAttributes == USB_ENDPOINT_XFER_BULK){
2384 + rt_ep->ep.maxpacket = 512;
2385 + }
2386 + }
2387 +}
2388 +
2389 +static void eps_change_to_fs(struct rt_udc_struct *rt_usb)
2390 +{
2391 + int i;
2392 + struct rt_ep_struct *rt_ep;
2393 + for(i = 0; i < RT_USB_NB_EP; i++){
2394 + rt_ep = &rt_usb->rt_ep[i];
2395 + if(rt_ep->bmAttributes == USB_ENDPOINT_XFER_BULK){
2396 + rt_ep->ep.maxpacket = 64;
2397 + }
2398 + }
2399 +}
2400 +
2401 +void handle_highspeed(struct rt_udc_struct *rt_usb)
2402 +{
2403 + DBG;
2404 +
2405 + eps_change_to_hs(rt_usb);
2406 +
2407 + if(dma){
2408 +#if defined (CONFIG_RALINK_RT3883) || defined (CONFIG_RALINK_RT3352) || defined (CONFIG_RALINK_MT7620)
2409 + usb_write(IN1CON, 0x8D); // InEP1 : Int, 2 subfifos
2410 + usb_write(IN2CON, 0x89); // InEP2 : Bulk, 2 subfifo
2411 + usb_write(OUT1CON, 0x8D); // OutEP1 : Int, 2 subfifos
2412 + usb_write(OUT2CON, 0x89); // OutEP2 : Bulk, 2 subfifos
2413 + //usb_write(OUT3CON, 0x89); // OutEP3 : Bulk, 2 subfifo
2414 + //usb_write(OUT4CON, 0x89); // OutEP4 : Bulk. 2 subfifo
2415 +#elif defined (CONFIG_RALINK_RT5350)
2416 + // Access by CPU
2417 + usb_write(IN1CON, 0x89); // InEP1 : Bulk, 2 subfifos
2418 + usb_write(OUT1CON, 0x89); // OutEP1 : Bulk, 2 subfifos
2419 +#else
2420 +#error "define a platform"
2421 +#endif
2422 + }else{
2423 + // Access by CPU
2424 +#if defined (CONFIG_RALINK_RT3883) || defined (CONFIG_RALINK_RT3352) || defined (CONFIG_RALINK_MT7620)
2425 + usb_write(IN1CON, 0x8C); // InEP1 : Int , 1 subfifos
2426 + usb_write(IN2CON, 0x88); // InEP2 : Bulk, 1 subfifo
2427 +
2428 + usb_write(OUT1CON, 0x8C); // OutEP1 : Int, 1 subfifos
2429 + usb_write(OUT2CON, 0x88); // OutEP2 : Bulk, 1 subfifos
2430 + //usb_write(OUT3CON, 0x88); // OutEP3 : Bulk, 1 subfifo
2431 + //usb_write(OUT4CON, 0x88); // OutEP4 : Bulk. 1 subfifo
2432 +#elif defined (CONFIG_RALINK_RT5350)
2433 + // Access by CPU
2434 + usb_write(IN1CON, 0x88); // InEP1 : Bulk , 1 subfifos
2435 + usb_write(OUT1CON, 0x88); // OutEP1 : Bulk, 1 subfifos
2436 +#else
2437 +#error "define a platform"
2438 +#endif
2439 +
2440 + }
2441 + // clear all pending interrupts
2442 + usb_write(IN07IRQ, 0xFF);
2443 + usb_write(OUT07IRQ, 0xFF);
2444 +
2445 + rt_usb->gadget.speed = USB_SPEED_HIGH;
2446 +
2447 + // reset ALL endpoints
2448 + rt_all_eps_reset();
2449 +
2450 + // Enable ep0 interrupt.
2451 + // (EPx interrupt is enabled in EPx_enable(). )
2452 + rt_ep_irq_enable(&rt_usb->rt_ep[0]);
2453 +}
2454 +
2455 +static void handle_reset(struct rt_udc_struct *rt_usb)
2456 +{
2457 + struct rt_ep_struct *rt_ep;
2458 + int i;
2459 +
2460 + eps_change_to_fs(rt_usb);
2461 +
2462 + // remove all EPs' usb request
2463 + for (i = 0; i < RT_USB_NB_EP; i++) {
2464 + rt_ep = &rt_usb->rt_ep[i];
2465 + if(i != 0){ /* don't have to flush EP[0]. */
2466 + rt_flush(rt_ep);
2467 + rt_ep->stopped = 1;
2468 + rt_ep_irq_disable(rt_ep);
2469 + }
2470 + nuke(rt_ep, -ESHUTDOWN);
2471 + }
2472 +
2473 + rt_usb->cfg = 0;
2474 + rt_usb->intf = 0;
2475 + rt_usb->alt = 0;
2476 +
2477 + if(dma){
2478 + // clear all PDMA interrupts
2479 + udc_dma_all_int_clear();
2480 + // reset PDMA
2481 + udc_dma_rst();
2482 + }
2483 +
2484 + // clear all pending interrupts
2485 + usb_write(IN07IRQ, 0xFF);
2486 + usb_write(OUT07IRQ, 0xFF);
2487 +
2488 + // flush all EP's fifo
2489 + rt_all_eps_reset();
2490 +}
2491 +
2492 +static void handle_usbirq(struct rt_udc_struct *rt_usb, u8 usbirq)
2493 +{
2494 + if(usbirq & USB_INTR_SETUP_TOKEN_VALID){
2495 + // Setup token is arrival.
2496 + // get setup data and pass it to gadget driver.
2497 + handle_setup(rt_usb);
2498 + }
2499 +
2500 + if(usbirq & USB_INTR_RESET)
2501 + handle_reset(rt_usb);
2502 +
2503 + if(usbirq & USB_INTR_HSPEED)
2504 + handle_highspeed(rt_usb);
2505 +
2506 + /*
2507 + * DO NOT try to clear SoF and token Interrupt!
2508 + */
2509 + if( (usbirq & USB_INTR_SETUP_TOKEN_VALID) ||
2510 + (usbirq & USB_INTR_HSPEED) ||
2511 + (usbirq & USB_INTR_RESET))
2512 + usb_write(USBIRQ, usbirq);
2513 +}
2514 +
2515 +static int irq_count = 100; /* for debug */
2516 +/*
2517 + * Interrupt handler
2518 + */
2519 +irqreturn_t rt_irq_handler(int irq, void *_dev)
2520 +{
2521 + u32 usbirq,epin07irq,epin07ien,epout07irq,epout07ien;
2522 + struct rt_udc_struct *rt_usb = _dev;
2523 +#ifdef DEBUG
2524 + u32 count_tmp = irq_count;
2525 +#endif
2526 +
2527 +
2528 + DBG;
2529 + irq_count++;
2530 +
2531 + usbirq = usb_read(USBIRQ);
2532 + epin07irq = usb_read(IN07IRQ);
2533 + epin07ien = usb_read(IN07IEN);
2534 + epout07irq = usb_read(OUT07IRQ);
2535 + epout07ien = usb_read(OUT07IEN);
2536 +
2537 + //epin07irq = epin07irq & epin07ien;
2538 + //epout07irq = epout07irq & epout07ien;
2539 +
2540 + xprintk(">%x\n", count_tmp);
2541 + dump_usbirq(usbirq);
2542 + dump_epirq(epin07irq, epin07ien, 1);
2543 + dump_epirq(epout07irq, epout07ien, 0);
2544 +
2545 + if(dma){
2546 + u32 dma_irq = reg_read(RTUSB_INT_STATUS);
2547 + if(epin07irq & 0x1) // INEP0
2548 + handle_epinirq(rt_usb, 0);
2549 +
2550 + if(usbirq) // HS, Reset, SetupValid
2551 + handle_usbirq(rt_usb, usbirq);
2552 +
2553 + if(epout07irq & 0x1) // OUTEP0
2554 + handle_epoutirq(rt_usb, 0);
2555 +
2556 + if(dma_irq)
2557 + handle_dmairq(rt_usb, dma_irq);
2558 +
2559 + }else{
2560 + if(epin07irq & 0x1) // INEP0
2561 + handle_epinirq(rt_usb, 0);
2562 +
2563 + if(usbirq) // HS, Reset, SetupValid
2564 + handle_usbirq(rt_usb, usbirq);
2565 +
2566 + if(epout07irq & 0x1) // OUTEP0
2567 + handle_epoutirq(rt_usb, 0);
2568 +
2569 + if(epout07irq & 0x2) // OUTEP1
2570 + handle_epoutirq(rt_usb, 1);
2571 +
2572 + if(epin07irq & 0x2) // INEP1
2573 + handle_epinirq(rt_usb, 1);
2574 +
2575 + if(epout07irq & 0x4) // OUTEP2
2576 + handle_epoutirq(rt_usb, 2);
2577 +
2578 + if(epin07irq & 0x4) // INEP2
2579 + handle_epinirq(rt_usb, 2);
2580 +
2581 + //if(epout07irq & 0x8) // OUTEP3
2582 + // handle_epoutirq(rt_usb, 3);
2583 +
2584 + //if(epout07irq & 0x10) // OUTEP4
2585 + // handle_epoutirq(rt_usb, 4);
2586 + }
2587 + xprintk("<%x\n", count_tmp);
2588 + return IRQ_HANDLED;
2589 +}
2590 +
2591 +/*
2592 + ******************************************************************************
2593 + * Static defined Ralink UDC structure
2594 + *******************************************************************************
2595 + */
2596 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36)
2597 +static void nop_release(struct device *dev)
2598 +{
2599 + return;
2600 +}
2601 +#endif
2602 +
2603 +static const struct usb_gadget_ops rt_udc_ops = {
2604 + .get_frame = rt_udc_get_frame,
2605 + .wakeup = rt_udc_wakeup,
2606 +};
2607 +
2608 +static struct rt_udc_struct controller = {
2609 + .gadget = {
2610 + .ops = &rt_udc_ops,
2611 + .ep0 = &controller.rt_ep[0].ep,
2612 + .name = driver_name,
2613 + .dev = {
2614 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36)
2615 + .init_name = "gadget",
2616 + .release = nop_release,
2617 +#else
2618 + .bus_id = "gadget",
2619 +#endif
2620 + },
2621 + },
2622 + .rt_ep[0] = {
2623 + .ep = {
2624 + .name = ep0name,
2625 + .ops = &rt_ep_ops,
2626 + .maxpacket = 64,
2627 + },
2628 + .rt_usb = &controller,
2629 + .bEndpointAddress = 0,
2630 + .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
2631 + .pending = 0,
2632 + },
2633 +#if defined (CONFIG_RALINK_RT3883) || defined (CONFIG_RALINK_RT3352) || defined (CONFIG_RALINK_MT7620)
2634 + .rt_ep[1] = {
2635 + .ep = {
2636 + .name = "ep1in-int",
2637 + .ops = &rt_ep_ops,
2638 + .maxpacket = 64,
2639 + },
2640 + .rt_usb = &controller,
2641 + .bEndpointAddress = USB_DIR_IN | 1,
2642 + .bmAttributes = USB_ENDPOINT_XFER_INT,
2643 + .pending = 0,
2644 + },
2645 + .rt_ep[2] = {
2646 + .ep = {
2647 + .name = "ep2in-bulk",
2648 + .ops = &rt_ep_ops,
2649 + .maxpacket = 64,
2650 + },
2651 + .rt_usb = &controller,
2652 + .bEndpointAddress = USB_DIR_IN | 2,
2653 + .bmAttributes = USB_ENDPOINT_XFER_BULK,
2654 + .pending = 0,
2655 + },
2656 + .rt_ep[3] = {
2657 + .ep = {
2658 + .name = "ep1out-int",
2659 + .ops = &rt_ep_ops,
2660 + .maxpacket = 64,
2661 + },
2662 + .rt_usb = &controller,
2663 + .bEndpointAddress = USB_DIR_OUT | 1,
2664 + .bmAttributes = USB_ENDPOINT_XFER_INT,
2665 + .pending = 0,
2666 + },
2667 + .rt_ep[4] = {
2668 + .ep = {
2669 + .name = "ep2out-bulk",
2670 + .ops = &rt_ep_ops,
2671 + .maxpacket = 64,
2672 + },
2673 + .rt_usb = &controller,
2674 + .bEndpointAddress = USB_DIR_OUT | 2,
2675 + .bmAttributes = USB_ENDPOINT_XFER_BULK,
2676 + .pending = 0,
2677 + },
2678 + /*
2679 + .rt_ep[5] = {
2680 + .ep = {
2681 + .name = "ep3out-bulk",
2682 + .ops = &rt_ep_ops,
2683 + .maxpacket = 64,
2684 + },
2685 + .rt_usb = &controller,
2686 + .bEndpointAddress = USB_DIR_OUT | 3,
2687 + .bmAttributes = USB_ENDPOINT_XFER_BULK,
2688 + .pending = 0,
2689 + },
2690 + .rt_ep[6] = {
2691 + .ep = {
2692 + .name = "ep4out-bulk",
2693 + .ops = &rt_ep_ops,
2694 + .maxpacket = 64,
2695 + },
2696 + .rt_usb = &controller,
2697 + .bEndpointAddress = USB_DIR_OUT | 4,
2698 + .bmAttributes = USB_ENDPOINT_XFER_BULK,
2699 + .pending = 0,
2700 + },
2701 + */
2702 +
2703 +#elif defined (CONFIG_RALINK_RT5350)
2704 + .rt_ep[1] = {
2705 + .ep = {
2706 + .name = "ep1in-bulk",
2707 + .ops = &rt_ep_ops,
2708 + .maxpacket = 64,
2709 + },
2710 + .rt_usb = &controller,
2711 + .bEndpointAddress = USB_DIR_IN | 1,
2712 + .bmAttributes = USB_ENDPOINT_XFER_BULK,
2713 + .pending = 0,
2714 + },
2715 + .rt_ep[2] = {
2716 + .ep = {
2717 + .name = "ep1out-bulk",
2718 + .ops = &rt_ep_ops,
2719 + .maxpacket = 64,
2720 + },
2721 + .rt_usb = &controller,
2722 + .bEndpointAddress = USB_DIR_OUT | 1,
2723 + .bmAttributes = USB_ENDPOINT_XFER_BULK,
2724 + .pending = 0,
2725 + },
2726 +#else
2727 +#error "define a platform"
2728 +#endif
2729 +};
2730 +
2731 +/*
2732 + *******************************************************************************
2733 + * USB gadged driver functions
2734 + *******************************************************************************
2735 + */
2736 +
2737 +static void rt_udc_enable(struct rt_udc_struct *rt_usb)
2738 +{
2739 + DBG;
2740 + rt_usb->gadget.speed = USB_SPEED_FULL;
2741 + if(dma){
2742 + // enable dma interrupts
2743 + udc_dma_all_int_clear();
2744 + udc_dma_int_enable(true);
2745 +
2746 + udc_dma_rst();
2747 +
2748 + // enable dma
2749 + udc_dma_enable(true);
2750 + }
2751 +}
2752 +
2753 +static void rt_udc_disable(struct rt_udc_struct *rt_usb)
2754 +{
2755 + DBG;
2756 + ep0_chg_stat(__func__, rt_usb, EP0_IDLE);
2757 + rt_usb->gadget.speed = USB_SPEED_UNKNOWN;
2758 + if(dma){
2759 + // disable dma interrupts
2760 + udc_dma_all_int_clear();
2761 + udc_dma_int_enable(false);
2762 +
2763 + udc_dma_rst();
2764 +
2765 + // disable dma
2766 + udc_dma_enable(false);
2767 + }
2768 +}
2769 +
2770 +int usb_gadget_register_driver(struct usb_gadget_driver *driver)
2771 +{
2772 + struct rt_udc_struct *rt_usb = &controller;
2773 + int retval;
2774 +
2775 + DBG;
2776 + if (!driver || driver->speed < USB_SPEED_FULL || !driver->bind || !driver->disconnect || !driver->setup)
2777 + return -EINVAL;
2778 + if (!rt_usb)
2779 + return -ENODEV;
2780 + if (rt_usb->driver)
2781 + return -EBUSY;
2782 +
2783 + /* first hook up the driver ... */
2784 + rt_usb->driver = driver;
2785 + rt_usb->gadget.dev.driver = &driver->driver;
2786 + retval = device_add(&rt_usb->gadget.dev);
2787 + if (retval)
2788 + goto fail;
2789 +
2790 + retval = driver->bind(&rt_usb->gadget);
2791 + if (retval) {
2792 + D_ERR(rt_usb->dev, "<%s> bind to driver --> error %d\n", __func__, retval);
2793 + device_del(&rt_usb->gadget.dev);
2794 + goto fail;
2795 + }
2796 +
2797 + D_INI(rt_usb->dev, "<%s> registered gadget driver '%s'\n", __func__, driver->driver.name);
2798 + rt_udc_enable(rt_usb);
2799 + return 0;
2800 +
2801 +fail:
2802 + rt_usb->driver = NULL;
2803 + rt_usb->gadget.dev.driver = NULL;
2804 + return retval;
2805 +}
2806 +EXPORT_SYMBOL(usb_gadget_register_driver);
2807 +
2808 +int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
2809 +{
2810 + struct rt_udc_struct *rt_usb = &controller;
2811 +
2812 +DBG;
2813 + if (!rt_usb)
2814 + return -ENODEV;
2815 + if (!driver || driver != rt_usb->driver || !driver->unbind)
2816 + return -EINVAL;
2817 +
2818 + udc_stop_activity(rt_usb, driver);
2819 + rt_udc_disable(rt_usb);
2820 + del_timer(&rt_usb->timer);
2821 +
2822 + driver->unbind(&rt_usb->gadget);
2823 + rt_usb->gadget.dev.driver = NULL;
2824 + rt_usb->driver = NULL;
2825 +
2826 + device_del(&rt_usb->gadget.dev);
2827 +
2828 + D_INI(rt_usb->dev, "<%s> unregistered gadget driver '%s'\n", __func__, driver->driver.name);
2829 +
2830 + return 0;
2831 +}
2832 +EXPORT_SYMBOL(usb_gadget_unregister_driver);
2833 +
2834 +/*******************************************************************************
2835 + * Module functions
2836 + *******************************************************************************
2837 + */
2838 +static int __init rt_udc_probe(struct platform_device *pdev)
2839 +{
2840 + struct rt_udc_struct *rt_usb = &controller;
2841 + struct resource *res_mem, *res_irq;
2842 + void __iomem *base;
2843 + int ret = 0, res_mem_size;
2844 +
2845 +DBG;
2846 + res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2847 + if (!res_mem) {
2848 + dev_err(&pdev->dev, "can't get device resources\n");
2849 + return -ENODEV;
2850 + }
2851 +
2852 + res_mem_size = res_mem->end - res_mem->start + 1;
2853 + if (!request_mem_region(res_mem->start, res_mem_size, res_mem->name)) {
2854 + dev_err(&pdev->dev, "can't allocate %d bytes at %d address\n", res_mem_size, res_mem->start);
2855 + return -ENOMEM;
2856 + }
2857 +
2858 + base = ioremap(res_mem->start, res_mem_size);
2859 + if (!base) {
2860 + dev_err(&pdev->dev, "ioremap failed\n");
2861 + ret = -EIO;
2862 + goto fail1;
2863 + }
2864 +
2865 + res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
2866 + if (!res_irq) {
2867 + dev_err(&pdev->dev, "can't get irq number\n");
2868 + ret = -ENODEV;
2869 + goto fail3;
2870 + }
2871 + rt_usb->interrupt = res_irq->start;
2872 +
2873 + ret = request_irq(rt_usb->interrupt, rt_irq_handler, IRQF_DISABLED, driver_name, rt_usb);
2874 + if (ret) {
2875 + dev_err(&pdev->dev, "can't get irq %i, err %d\n", rt_usb->interrupt, ret);
2876 + goto fail3;
2877 + }
2878 +
2879 + rt_usb->res = res_mem;
2880 + rt_usb->base = base;
2881 + rt_usb->dev = &pdev->dev;
2882 +
2883 + device_initialize(&rt_usb->gadget.dev);
2884 +
2885 + rt_usb->gadget.dev.parent = &pdev->dev;
2886 + rt_usb->gadget.dev.dma_mask = pdev->dev.dma_mask;
2887 +
2888 + platform_set_drvdata(pdev, rt_usb);
2889 +
2890 + usb_init_data(rt_usb);
2891 +
2892 + if(dma){
2893 + if(rt_udc_dma_init())
2894 + goto fail4;
2895 + }
2896 +
2897 + rt_udc_init(rt_usb);
2898 +
2899 + init_timer(&rt_usb->timer);
2900 + rt_usb->timer.function = handle_config;
2901 + rt_usb->timer.data = (unsigned long)rt_usb;
2902 +
2903 + return 0;
2904 +fail4:
2905 + free_irq(rt_usb->interrupt, rt_usb);
2906 +fail3:
2907 + iounmap(base);
2908 +fail1:
2909 + release_mem_region(res_mem->start, res_mem_size);
2910 + return ret;
2911 +}
2912 +
2913 +static int __exit rt_udc_remove(struct platform_device *pdev)
2914 +{
2915 + struct rt_udc_struct *rt_usb = platform_get_drvdata(pdev);
2916 +
2917 + DBG;
2918 + rt_udc_disable(rt_usb);
2919 + del_timer(&rt_usb->timer);
2920 +
2921 + free_irq(rt_usb->interrupt, rt_usb);
2922 +
2923 + iounmap(rt_usb->base);
2924 + release_mem_region(rt_usb->res->start, rt_usb->res->end - rt_usb->res->start + 1);
2925 +
2926 + //if (pdata->exit)
2927 + // pdata->exit(&pdev->dev);
2928 + platform_set_drvdata(pdev, NULL);
2929 +
2930 + return 0;
2931 +}
2932 +
2933 +static void set_device_mode(void)
2934 +{
2935 + u32 val;
2936 + val = le32_to_cpu(*(volatile u_long *)(SYSCFG1));
2937 + val = val & ~(USB0_HOST_MODE);
2938 + *(volatile u_long *)(SYSCFG1) = cpu_to_le32(val);
2939 + udelay(10000);
2940 +}
2941 +
2942 +/*----------------------------------------------------------------------------*/
2943 +static struct platform_driver udc_driver = {
2944 +
2945 + .driver = {
2946 + .name = driver_name,
2947 + .owner = THIS_MODULE,
2948 + },
2949 + .probe = rt_udc_probe,
2950 + .remove = __exit_p(rt_udc_remove),
2951 + .suspend = NULL,
2952 + .resume = NULL,
2953 +};
2954 +
2955 +static int udc_create_proc(void)
2956 +{
2957 + pProcDir = proc_mkdir(PROC_DIR, NULL);
2958 + if ((pProcDebugLevel = create_proc_entry(DEBUGLEVEL_PROCFILE, 0, pProcDir))){
2959 + pProcDebugLevel->read_proc = (read_proc_t*)&debuglevel_read;
2960 + pProcDebugLevel->write_proc = (write_proc_t*)&debuglevel_write;
2961 + }
2962 + return 0;
2963 +}
2964 +
2965 +static int udc_remove_proc(void)
2966 +{
2967 + if (pProcDebugLevel)
2968 + remove_proc_entry(DEBUGLEVEL_PROCFILE, pProcDir);
2969 + if (pProcDir)
2970 + remove_proc_entry(PROC_DIR, 0);
2971 +
2972 + return 0;
2973 +}
2974 +
2975 +static int __init udc_init(void)
2976 +{
2977 + int ret;
2978 + udc_create_proc();
2979 +
2980 + try_wake_up();
2981 + set_device_mode();
2982 +
2983 + ret = platform_driver_register(&udc_driver);
2984 +
2985 + tasklet_init(&rx_tasklet, rx_do_tasklet, 0);
2986 + tasklet_init(&tx_tasklet, tx_do_tasklet, 0);
2987 +
2988 + if(dma){
2989 + printk("DMA TXMAXCAP=%d\n", TXMAXCAP);
2990 + tasklet_init(&rx_dma_tasklet, rx_dma_done_do_tasklet, 0);
2991 + tasklet_init(&tx_dma_tasklet, tx_dma_done_do_tasklet, 0);
2992 + }
2993 +
2994 + return ret; //platform_driver_probe(&udc_driver, rt_udc_probe);
2995 +}
2996 +module_init(udc_init);
2997 +
2998 +static void __exit udc_exit(void)
2999 +{
3000 + DBG;
3001 + udc_remove_proc();
3002 + if(dma)
3003 + udc_dma_fini();
3004 + platform_driver_unregister(&udc_driver);
3005 +}
3006 +module_exit(udc_exit);
3007 +
3008 +MODULE_DESCRIPTION("Ralink USB Device Controller driver");
3009 +MODULE_AUTHOR("Ying Yuan Huang <yy_huang@ralinktech.com>");
3010 +MODULE_LICENSE("GPL");
3011 +MODULE_ALIAS("platform:rt_udc");
3012 +
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