1 From 9c2487f148ee38807d86beaf12dc2b818a764a99 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Tue, 17 Nov 2015 00:20:07 +0100
4 Subject: [PATCH 500/513] Documentation: DT: net: add docs for ralink/mediatek
7 Add three files. ralink,rt2880-net.txt descibes the actual frame engine
8 and the other two describe the switch forntend bindings.
10 Signed-off-by: John Crispin <blogic@openwrt.org>
11 Signed-off-by: Felix Fietkau <nbd@openwrt.org>
12 Signed-off-by: Michael Lee <igvtee@gmail.com>
13 Cc: devicetree@vger.kernel.org
15 .../bindings/net/mediatek,mt7620-gsw.txt | 26 +++++++++
16 .../devicetree/bindings/net/ralink,rt2880-net.txt | 61 ++++++++++++++++++++
17 .../devicetree/bindings/net/ralink,rt3050-esw.txt | 32 ++++++++++
18 3 files changed, 119 insertions(+)
19 create mode 100644 Documentation/devicetree/bindings/net/mediatek,mt7620-gsw.txt
20 create mode 100644 Documentation/devicetree/bindings/net/ralink,rt2880-net.txt
21 create mode 100644 Documentation/devicetree/bindings/net/ralink,rt3050-esw.txt
23 diff --git a/Documentation/devicetree/bindings/net/mediatek,mt7620-gsw.txt b/Documentation/devicetree/bindings/net/mediatek,mt7620-gsw.txt
25 index 0000000..fb47d8e
27 +++ b/Documentation/devicetree/bindings/net/mediatek,mt7620-gsw.txt
29 +Mediatek Gigabit Switch
30 +=======================
32 +The mediatek gigabit switch can be found on Mediatek SoCs (mt7620, mt7621).
35 +- compatible: Should be "mediatek,mt7620-gsw"
36 +- reg: Address and length of the register set for the device
37 +- interrupt-parent: Should be the phandle for the interrupt controller
38 + that services interrupts for this device
39 +- interrupts: Should contain the gigabit switches interrupt
40 +- resets: Should contain the gigabit switches resets
41 +- reset-names: Should contain the reset names "gsw"
46 + compatible = "ralink,mt7620-gsw";
47 + reg = <0x10110000 8000>;
49 + resets = <&rstctrl 23>;
50 + reset-names = "gsw";
52 + interrupt-parent = <&intc>;
55 diff --git a/Documentation/devicetree/bindings/net/ralink,rt2880-net.txt b/Documentation/devicetree/bindings/net/ralink,rt2880-net.txt
57 index 0000000..88b095d
59 +++ b/Documentation/devicetree/bindings/net/ralink,rt2880-net.txt
61 +Ralink Frame Engine Ethernet controller
62 +=======================================
64 +The Ralink frame engine ethernet controller can be found on Ralink and
65 +Mediatek SoCs (RT288x, RT3x5x, RT366x, RT388x, rt5350, mt7620, mt7621, mt76x8).
67 +Depending on the SoC, there is a number of ports connected to the CPU port
68 +directly and/or via a (gigabit-)switch.
70 +* Ethernet controller node
73 +- compatible: Should be one of "ralink,rt2880-eth", "ralink,rt3050-eth",
74 + "ralink,rt3050-eth", "ralink,rt3883-eth", "ralink,rt5350-eth",
75 + "mediatek,mt7620-eth", "mediatek,mt7621-eth"
76 +- reg: Address and length of the register set for the device
77 +- interrupt-parent: Should be the phandle for the interrupt controller
78 + that services interrupts for this device
79 +- interrupts: Should contain the frame engines interrupt
80 +- resets: Should contain the frame engines resets
81 +- reset-names: Should contain the reset names "fe". If a switch is present
82 + "esw" is also required.
88 +- compatible: Should be "ralink,eth-port"
89 +- reg: The number of the physical port
90 +- phy-handle: reference to the node describing the phy
96 + phy0: ethernet-phy@0 {
103 + compatible = "ralink,rt2880-eth";
104 + reg = <0x00400000 10000>;
106 + #address-cells = <1>;
109 + resets = <&rstctrl 18>;
110 + reset-names = "fe";
112 + interrupt-parent = <&cpuintc>;
116 + compatible = "ralink,eth-port";
118 + phy-handle = <&phy0>;
122 diff --git a/Documentation/devicetree/bindings/net/ralink,rt3050-esw.txt b/Documentation/devicetree/bindings/net/ralink,rt3050-esw.txt
124 index 0000000..ed32e21
126 +++ b/Documentation/devicetree/bindings/net/ralink,rt3050-esw.txt
128 +Ralink Fast Ethernet Embedded Switch
129 +====================================
131 +The ralink fast ethernet embedded switch can be found on Ralink and Mediatek
132 +SoCs (RT3x5x, rt5350, mt76x8).
134 +Required properties:
135 +- compatible: Should be "ralink,rt3050-esw"
136 +- reg: Address and length of the register set for the device
137 +- interrupt-parent: Should be the phandle for the interrupt controller
138 + that services interrupts for this device
139 +- interrupts: Should contain the embedded switches interrupt
140 +- resets: Should contain the embedded switches resets
141 +- reset-names: Should contain the reset names "esw"
143 +Optional properties:
144 +- ralink,portmap: can be used to choose if the default switch setup is
146 +- ralink,led_polarity: override the active high/low settings of the leds
151 + compatible = "ralink,rt3050-esw";
152 + reg = <0x10110000 8000>;
154 + resets = <&rstctrl 23>;
155 + reset-names = "esw";
157 + interrupt-parent = <&intc>;