target/linux/ramips/patches-4.3/0902-mt7621-use-gic-timer.patch

   1 --- a/arch/mips/ralink/Kconfig
   2 +++ b/arch/mips/ralink/Kconfig
   3 @@ -52,6 +52,8 @@
   4                 select SYS_SUPPORTS_SMP
   5                 select SYS_SUPPORTS_MIPS_CPS
   6                 select MIPS_GIC
   7 +               select COMMON_CLK
   8 +               select CLKSRC_MIPS_GIC
   9                 select HW_HAS_PCI
  10  endchoice
  11
  12 --- a/arch/mips/ralink/Makefile
  13 +++ b/arch/mips/ralink/Makefile
  14 @@ -6,14 +6,18 @@
  15  # Copyright (C) 2009-2011 Gabor Juhos <juhosg@openwrt.org>
  16  # Copyright (C) 2013 John Crispin <blogic@openwrt.org>
  17
  18 -obj-y := prom.o of.o reset.o clk.o timer.o
  19 +obj-y := prom.o of.o reset.o
  20 +
  21 +ifndef CONFIG_MIPS_GIC
  22 +       obj-y += clk.o timer.o
  23 +endif
  24
  25  obj-$(CONFIG_CLKEVT_RT3352) += cevt-rt3352.o
  26
  27  obj-$(CONFIG_RALINK_ILL_ACC) += ill_acc.o
  28
  29  obj-$(CONFIG_IRQ_INTC) += irq.o
  30 -obj-$(CONFIG_MIPS_GIC) += irq-gic.o
  31 +obj-$(CONFIG_MIPS_GIC) += irq-gic.o timer-gic.o
  32
  33  obj-$(CONFIG_SOC_RT288X) += rt288x.o
  34  obj-$(CONFIG_SOC_RT305X) += rt305x.o
  35 --- a/arch/mips/ralink/irq-gic.c
  36 +++ b/arch/mips/ralink/irq-gic.c
  37 @@ -3,13 +3,6 @@
  38  #include <linux/of.h>
  39  #include <linux/irqchip.h>
  40
  41 -#include <linux/irqchip/mips-gic.h>
  42 -
  43 -unsigned int get_c0_compare_int(void)
  44 -{
  45 -       return gic_get_c0_compare_int();
  46 -}
  47 -
  48  void __init
  49  arch_init_irq(void)
  50  {
  51 --- /dev/null
  52 +++ b/arch/mips/ralink/timer-gic.c
  53 @@ -0,0 +1,15 @@
  54 +#include <linux/init.h>
  55 +
  56 +#include <linux/of.h>
  57 +#include <linux/clk-provider.h>
  58 +#include <linux/clocksource.h>
  59 +
  60 +#include "common.h"
  61 +
  62 +void __init plat_time_init(void)
  63 +{
  64 +       ralink_of_remap();
  65 +
  66 +       of_clk_init(NULL);
  67 +       clocksource_of_init();
  68 +}
  69 --- a/arch/mips/ralink/mt7621.c
  70 +++ b/arch/mips/ralink/mt7621.c
  71 @@ -152,11 +152,6 @@
  72                 }
  73                 break;
  74         }
  75 -       cpu_clk = 880000000;
  76 -       ralink_clk_add("cpu", cpu_clk);
  77 -       ralink_clk_add("1e000b00.spi", 50000000);
  78 -       ralink_clk_add("1e000c00.uartlite", 50000000);
  79 -       ralink_clk_add("1e000d00.uart", 50000000);
  80  }
  81
  82  void __init ralink_of_remap(void)