target/linux/ramips/patches-5.10/710-at803x.patch

   1 From 924453aa9d2324e5611f8e2b71df746d8f0c79f1 Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?Ren=C3=A9=20van=20Dorst?= <opensource@vdorst.com>
   3 Date: Fri, 13 Nov 2020 16:11:32 +0100
   4 Subject: [PATCH] net: phy: at803x: add support for SFP module in
   5  RGMII-to-x-base mode
   6 MIME-Version: 1.0
   7 Content-Type: text/plain; charset=UTF-8
   8 Content-Transfer-Encoding: 8bit
   9
  10 Signed-off-by: René van Dorst <opensource@vdorst.com>
  11 ---
  12  drivers/net/phy/at803x.c | 91 ++++++++++++++++++++++++++++++++++++++++
  13  1 file changed, 91 insertions(+)
  14
  15 --- a/drivers/net/phy/at803x.c
  16 +++ b/drivers/net/phy/at803x.c
  17 @@ -20,6 +20,8 @@
  18  #include <linux/regulator/driver.h>
  19  #include <linux/regulator/consumer.h>
  20  #include <dt-bindings/net/qca-ar803x.h>
  21 +#include <linux/sfp.h>
  22 +#include <linux/phylink.h>
  23
  24  #define AT803X_SPECIFIC_FUNCTION_CONTROL       0x10
  25  #define AT803X_SFC_ASSERT_CRS                  BIT(11)
  26 @@ -82,9 +84,18 @@
  27
  28  #define AT803X_MODE_CFG_MASK                   0x0F
  29  #define AT803X_MODE_CFG_SGMII                  0x01
  30 +#define AT803X_MODE_CFG_BX1000_RGMII_50                0x02
  31 +#define AT803X_MODE_CFG_BX1000_RGMII_75                0x03
  32 +#define AT803X_MODE_FIBER                      0x01
  33 +#define AT803X_MODE_COPPER                     0x00
  34
  35  #define AT803X_PSSR                    0x11    /*PHY-Specific Status Register*/
  36  #define AT803X_PSSR_MR_AN_COMPLETE     0x0200
  37 +#define         PSSR_LINK                      BIT(10)
  38 +#define         PSSR_SYNC_STATUS               BIT(8)
  39 +#define         PSSR_DUPLEX                    BIT(13)
  40 +#define         PSSR_SPEED_1000                BIT(15)
  41 +#define         PSSR_SPEED_100                 BIT(14)
  42
  43  #define AT803X_DEBUG_REG_0                     0x00
  44  #define AT803X_DEBUG_RX_CLK_DLY_EN             BIT(15)
  45 @@ -532,12 +543,75 @@ static int at803x_parse_dt(struct phy_de
  46         return 0;
  47  }
  48
  49 +static int at803x_mode(struct phy_device *phydev)
  50 +{
  51 +       int mode;
  52 +
  53 +       mode = phy_read(phydev, AT803X_REG_CHIP_CONFIG) & AT803X_MODE_CFG_MASK;
  54 +
  55 +       if (mode == AT803X_MODE_CFG_BX1000_RGMII_50 ||
  56 +           mode == AT803X_MODE_CFG_BX1000_RGMII_75)
  57 +               return AT803X_MODE_FIBER;
  58 +       return AT803X_MODE_COPPER;
  59 +}
  60 +
  61 +static int at803x_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)
  62 +{
  63 +       __ETHTOOL_DECLARE_LINK_MODE_MASK(at803x_support) = { 0, };
  64 +       __ETHTOOL_DECLARE_LINK_MODE_MASK(support) = { 0, };
  65 +       struct phy_device *phydev = upstream;
  66 +       phy_interface_t iface;
  67 +
  68 +       phylink_set(at803x_support, 1000baseX_Full);
  69 +       /* AT803x only support 1000baseX but SGMII works fine when module runs
  70 +        * at 1Gbit.
  71 +        */
  72 +       phylink_set(at803x_support, 1000baseT_Full);
  73 +
  74 +       sfp_parse_support(phydev->sfp_bus, id, support);
  75 +
  76 +       // Limit to interfaces that both sides support
  77 +       linkmode_and(support, support, at803x_support);
  78 +
  79 +       if (linkmode_empty(support))
  80 +               goto unsupported_mode;
  81 +
  82 +       iface = sfp_select_interface(phydev->sfp_bus, support);
  83 +
  84 +       if (iface != PHY_INTERFACE_MODE_SGMII &&
  85 +           iface != PHY_INTERFACE_MODE_1000BASEX)
  86 +               goto unsupported_mode;
  87 +
  88 +       dev_info(&phydev->mdio.dev, "SFP interface %s", phy_modes(iface));
  89 +
  90 +       return 0;
  91 +
  92 +unsupported_mode:
  93 +       dev_info(&phydev->mdio.dev, "incompatible SFP module inserted;"
  94 +                "Only SGMII at 1Gbit/1000BASEX are supported!\n");
  95 +       return -EINVAL;
  96 +}
  97 +
  98 +static const struct sfp_upstream_ops at803x_sfp_ops = {
  99 +       .attach = phy_sfp_attach,
 100 +       .detach = phy_sfp_detach,
 101 +       .module_insert = at803x_sfp_insert,
 102 +};
 103 +
 104 +
 105  static int at803x_probe(struct phy_device *phydev)
 106  {
 107         struct device *dev = &phydev->mdio.dev;
 108         struct at803x_priv *priv;
 109         int ret;
 110
 111 +
 112 +       if (at803x_mode(phydev) == AT803X_MODE_FIBER) {
 113 +               ret = phy_sfp_probe(phydev, &at803x_sfp_ops);
 114 +               if (ret < 0)
 115 +                       return ret;
 116 +       }
 117 +
 118         priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
 119         if (!priv)
 120                 return -ENOMEM;
 121 @@ -744,6 +818,10 @@ static int at803x_read_status(struct phy
 122  {
 123         int ss, err, old_link = phydev->link;
 124
 125 +       /* Handle (Fiber) SGMII to RGMII mode */
 126 +       if (at803x_mode(phydev) == AT803X_MODE_FIBER)
 127 +               return genphy_c37_read_status(phydev);
 128 +
 129         /* Update the link, but return if there was an error */
 130         err = genphy_update_link(phydev);
 131         if (err)
 132 @@ -844,6 +922,12 @@ static int at803x_config_aneg(struct phy
 133  {
 134         int ret;
 135
 136 +       /* Handle (Fiber) SerDes to RGMII mode */
 137 +       if (at803x_mode(phydev) == AT803X_MODE_FIBER) {
 138 +               pr_warn("%s: fiber\n", __func__);
 139 +               return genphy_c37_config_aneg(phydev);
 140 +       }
 141 +
 142         ret = at803x_config_mdix(phydev, phydev->mdix_ctrl);
 143         if (ret < 0)
 144                 return ret;
 145 @@ -1145,6 +1229,7 @@ static struct phy_driver at803x_driver[]
 146         /* Qualcomm Atheros AR8031/AR8033 */
 147         PHY_ID_MATCH_EXACT(ATH8031_PHY_ID),
 148         .name                   = "Qualcomm Atheros AR8031/AR8033",
 149 +       .config_aneg            = at803x_config_aneg,
 150         .flags                  = PHY_POLL_CABLE_TEST,
 151         .probe                  = at803x_probe,
 152         .remove                 = at803x_remove,