1 From 3d5f4da8296b23eb3abf8b13122b0d06a215e79c Mon Sep 17 00:00:00 2001
2 From: Weijie Gao <weijie.gao@mediatek.com>
3 Date: Wed, 1 Apr 2020 02:07:59 +0800
4 Subject: [PATCH 2/2] dt-bindings: add documentation for mt7621-nand driver
6 This patch adds documentation for MediaTek MT7621 NAND flash controller
9 Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
11 .../bindings/mtd/mediatek,mt7621-nfc.yaml | 68 ++++++++++++++++++++++
12 1 file changed, 68 insertions(+)
13 create mode 100644 Documentation/devicetree/bindings/mtd/mediatek,mt7621-nfc.yaml
16 +++ b/Documentation/devicetree/bindings/mtd/mediatek,mt7621-nfc.yaml
18 +# SPDX-License-Identifier: GPL-2.0
21 +$id: http://devicetree.org/schemas/mtd/mediatek,mt7621-nfc.yaml#
22 +$schema: http://devicetree.org/meta-schemas/core.yaml#
24 +title: MediaTek MT7621 SoC NAND Flash Controller (NFC) DT binding
27 + - Weijie Gao <weijie.gao@mediatek.com>
30 + This driver uses a single node to describe both NAND Flash controller
31 + interface (NFI) and ECC engine for MT7621 SoC.
32 + MT7621 supports only one chip select.
35 + "#address-cells": false
36 + "#size-cells": false
40 + - mediatek,mt7621-nfc
44 + - description: Register base of NFI core
45 + - description: Register base of ECC engine
54 + - description: Source clock for NFI core, fixed 125MHz
69 + nficlock: nficlock {
71 + compatible = "fixed-clock";
73 + clock-frequency = <125000000>;
77 + compatible = "mediatek,mt7621-nfc";
79 + reg = <0x1e003000 0x800
81 + reg-names = "nfi", "ecc";
83 + clocks = <&nficlock>;
84 + clock-names = "nfi_clk";