realtek: enable uart1 on the devices with PoE support in 5.10
[openwrt/staging/hauke.git] / target / linux / realtek / dts-5.10 / rtl8382_d-link_dgs-1210-10p.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "rtl838x.dtsi"
4
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/gpio/gpio.h>
7
8 / {
9 compatible = "d-link,dgs-1210-10p", "realtek,rtl838x-soc";
10 model = "D-Link DGS-1210-10P";
11
12 aliases {
13 led-boot = &led_power;
14 led-failsafe = &led_power;
15 led-running = &led_power;
16 led-upgrade = &led_power;
17 };
18
19 chosen {
20 bootargs = "console=ttyS0,115200";
21 };
22
23 memory@0 {
24 device_type = "memory";
25 reg = <0x0 0x8000000>;
26 };
27
28 leds {
29 pinctrl-names = "default";
30 pinctrl-0 = <&pinmux_disable_sys_led>;
31 compatible = "gpio-leds";
32
33 led_power: power {
34 // GPIO 0 seems to provide power to the leds
35 label = "green:power";
36 gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
37 };
38 };
39
40 keys {
41 compatible = "gpio-keys-polled";
42 poll-interval = <20>;
43
44 /* is this pin 30 on the external RTL8231 (&gpio1)? */
45 /*mode {
46 label = "reset";
47 gpios = <&gpio0 94 GPIO_ACTIVE_LOW>;
48 linux,code = <KEY_RESTART>;
49 };*/
50 };
51 };
52
53
54 &spi0 {
55 status = "okay";
56 flash@0 {
57 compatible = "jedec,spi-nor";
58 reg = <0>;
59 spi-max-frequency = <10000000>;
60
61 partitions {
62 compatible = "fixed-partitions";
63 #address-cells = <1>;
64 #size-cells = <1>;
65
66 partition@0 {
67 label = "u-boot";
68 reg = <0x00000000 0x80000>;
69 read-only;
70 };
71 partition@80000 {
72 label = "u-boot-env";
73 reg = <0x00080000 0x40000>;
74 read-only;
75 };
76 partition@c0000 {
77 label = "u-boot-env2";
78 reg = <0x000c0000 0x40000>;
79 };
80 partition@280000 {
81 label = "firmware";
82 compatible = "denx,uimage";
83 reg = <0x00100000 0xd80000>;
84 };
85 partition@be80000 {
86 label = "kernel2";
87 reg = <0x00e80000 0x180000>;
88 };
89 partition@1000000 {
90 label = "sysinfo";
91 reg = <0x01000000 0x40000>;
92 };
93 partition@1040000 {
94 label = "rootfs2";
95 reg = <0x01040000 0xc00000>;
96 };
97 partition@1c40000 {
98 label = "jffs2";
99 reg = <0x01c40000 0x3c0000>;
100 };
101 };
102 };
103 };
104
105 &uart1 {
106 status = "okay";
107 };
108
109 &ethernet0 {
110 mdio: mdio-bus {
111 compatible = "realtek,rtl838x-mdio";
112 regmap = <&ethernet0>;
113 #address-cells = <1>;
114 #size-cells = <0>;
115
116 INTERNAL_PHY(8)
117 INTERNAL_PHY(9)
118 INTERNAL_PHY(10)
119 INTERNAL_PHY(11)
120 INTERNAL_PHY(12)
121 INTERNAL_PHY(13)
122 INTERNAL_PHY(14)
123 INTERNAL_PHY(15)
124 INTERNAL_PHY(24)
125 INTERNAL_PHY(26)
126 };
127 };
128
129 &switch0 {
130 ports {
131 #address-cells = <1>;
132 #size-cells = <0>;
133
134 SWITCH_PORT(8, 1, internal)
135 SWITCH_PORT(9, 2, internal)
136 SWITCH_PORT(10, 3, internal)
137 SWITCH_PORT(11, 4, internal)
138 SWITCH_PORT(12, 5, internal)
139 SWITCH_PORT(13, 6, internal)
140 SWITCH_PORT(14, 7, internal)
141 SWITCH_PORT(15, 8, internal)
142 SWITCH_SFP_PORT(24, 9, rgmii-id)
143 SWITCH_SFP_PORT(26, 10, rgmii-id)
144
145 port@28 {
146 ethernet = <&ethernet0>;
147 reg = <28>;
148 phy-mode = "internal";
149 fixed-link {
150 speed = <1000>;
151 full-duplex;
152 };
153 };
154 };
155 };