realtek: Update RTL838X DTS to new Realtek IRQ controller notation
[openwrt/staging/chunkeey.git] / target / linux / realtek / dts-5.10 / rtl838x.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 /dts-v1/;
4
5 #define STRINGIZE(s) #s
6 #define LAN_LABEL(p, s) STRINGIZE(p ## s)
7 #define SWITCH_PORT_LABEL(n) LAN_LABEL(lan, n)
8
9 #define INTERNAL_PHY(n) \
10 phy##n: ethernet-phy@##n { \
11 reg = <##n>; \
12 compatible = "ethernet-phy-ieee802.3-c22"; \
13 phy-is-integrated; \
14 };
15
16 #define EXTERNAL_PHY(n) \
17 phy##n: ethernet-phy@##n { \
18 reg = <##n>; \
19 compatible = "ethernet-phy-ieee802.3-c22"; \
20 };
21
22 #define EXTERNAL_SFP_PHY(n) \
23 phy##n: ethernet-phy@##n { \
24 compatible = "ethernet-phy-ieee802.3-c22"; \
25 sfp; \
26 media = "fibre"; \
27 reg = <##n>; \
28 };
29
30 #define SWITCH_PORT(n, s, m) \
31 port@##n { \
32 reg = <##n>; \
33 label = SWITCH_PORT_LABEL(s) ; \
34 phy-handle = <&phy##n>; \
35 phy-mode = #m ; \
36 };
37
38 #define SWITCH_SFP_PORT(n, s, m) \
39 port@##n { \
40 reg = <##n>; \
41 label = SWITCH_PORT_LABEL(s) ; \
42 phy-handle = <&phy##n>; \
43 phy-mode = #m ; \
44 fixed-link { \
45 speed = <1000>; \
46 full-duplex; \
47 }; \
48 };
49
50 / {
51 #address-cells = <1>;
52 #size-cells = <1>;
53
54 compatible = "realtek,rtl838x-soc";
55
56 cpus {
57 #address-cells = <1>;
58 #size-cells = <0>;
59 frequency = <500000000>;
60
61 cpu@0 {
62 compatible = "mips,mips4KEc";
63 reg = <0>;
64 };
65 };
66
67 chosen {
68 bootargs = "console=ttyS0,115200";
69 };
70
71 lx_clk: lx_clk {
72 compatible = "fixed-clock";
73 #clock-cells = <0>;
74 clock-frequency = <200000000>;
75 };
76
77 cpuintc: cpuintc {
78 compatible = "mti,cpu-interrupt-controller";
79 #address-cells = <0>;
80 #interrupt-cells = <1>;
81 interrupt-controller;
82 };
83
84 soc: soc {
85 compatible = "simple-bus";
86 #address-cells = <1>;
87 #size-cells = <1>;
88 ranges = <0x0 0x18000000 0x10000>;
89
90 intc: interrupt-controller@3000 {
91 compatible = "realtek,rtl8380-intc", "realtek,rtl-intc";
92 reg = <0x3000 0x18>;
93 interrupt-controller;
94 #interrupt-cells = <2>;
95
96 interrupt-parent = <&cpuintc>;
97 interrupts = <2>, <3>, <4>, <5>, <6>;
98 };
99
100 spi0: spi@1200 {
101 compatible = "realtek,rtl8380-spi";
102 reg = <0x1200 0x100>;
103
104 #address-cells = <1>;
105 #size-cells = <0>;
106 };
107
108 uart0: uart@2000 {
109 compatible = "ns16550a";
110 reg = <0x2000 0x100>;
111
112 clocks = <&lx_clk>;
113
114 interrupt-parent = <&intc>;
115 interrupts = <31 1>;
116
117 reg-io-width = <1>;
118 reg-shift = <2>;
119 fifo-size = <1>;
120 no-loopback-test;
121 };
122
123 uart1: uart@2100 {
124 pinctrl-names = "default";
125 pinctrl-0 = <&enable_uart1>;
126
127 compatible = "ns16550a";
128 reg = <0x2100 0x100>;
129
130 clocks = <&lx_clk>;
131
132 interrupt-parent = <&intc>;
133 interrupts = <30 0>;
134
135 reg-io-width = <1>;
136 reg-shift = <2>;
137 fifo-size = <1>;
138 no-loopback-test;
139
140 status = "disabled";
141 };
142
143 watchdog0: watchdog@3150 {
144 compatible = "realtek,rtl8380-wdt";
145 reg = <0x3150 0xc>;
146
147 realtek,reset-mode = "soc";
148
149 clocks = <&lx_clk>;
150 timeout-sec = <30>;
151
152 interrupt-parent = <&intc>;
153 interrupt-names = "phase1", "phase2";
154 interrupts = <19 3>, <18 4>;
155 };
156
157 gpio0: gpio-controller@3500 {
158 compatible = "realtek,rtl8380-gpio", "realtek,otto-gpio";
159 reg = <0x3500 0x20>;
160
161 gpio-controller;
162 #gpio-cells = <2>;
163 ngpios = <24>;
164
165 interrupt-controller;
166 #interrupt-cells = <2>;
167 interrupt-parent = <&intc>;
168 interrupts = <23 3>;
169 };
170 };
171
172 gpio1: rtl8231-gpio {
173 compatible = "realtek,rtl8231-gpio";
174 #gpio-cells = <2>;
175 indirect-access-bus-id = <0>;
176 gpio-controller;
177
178 status = "disabled";
179 };
180
181 pinmux: pinmux@1b001000 {
182 compatible = "pinctrl-single";
183 reg = <0x1b001000 0x4>;
184
185 pinctrl-single,bit-per-mux;
186 pinctrl-single,register-width = <32>;
187 pinctrl-single,function-mask = <0x1>;
188 #pinctrl-cells = <2>;
189
190 enable_uart1: pinmux_enable_uart1 {
191 pinctrl-single,bits = <0x0 0x10 0x10>;
192 };
193 };
194
195 /* LED_GLB_CTRL */
196 pinmux_led: pinmux@1b00a000 {
197 compatible = "pinctrl-single";
198 reg = <0x1b00a000 0x4>;
199
200 pinctrl-single,bit-per-mux;
201 pinctrl-single,register-width = <32>;
202 pinctrl-single,function-mask = <0x1>;
203 #pinctrl-cells = <2>;
204
205 /* enable GPIO 0 */
206 pinmux_disable_sys_led: disable_sys_led {
207 pinctrl-single,bits = <0x0 0x0 0x8000>;
208 };
209 };
210
211 ethernet0: ethernet@1b00a300 {
212 compatible = "realtek,rtl838x-eth";
213 reg = <0x1b00a300 0x100>;
214 interrupt-parent = <&intc>;
215 interrupts = <24 3>;
216 #interrupt-cells = <1>;
217 phy-mode = "internal";
218
219 fixed-link {
220 speed = <1000>;
221 full-duplex;
222 };
223 };
224
225 switch0: switch@1b000000 {
226 compatible = "realtek,rtl83xx-switch";
227
228 interrupt-parent = <&intc>;
229 interrupts = <20 2>;
230 };
231 };