target/linux/realtek/dts-5.10/rtl838x.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include <dt-bindings/clock/rtl83xx-clk.h>
   4
   5 /dts-v1/;
   6
   7 #define STRINGIZE(s) #s
   8 #define LAN_LABEL(p, s) STRINGIZE(p ## s)
   9 #define SWITCH_PORT_LABEL(n) LAN_LABEL(lan, n)
  10
  11 #define INTERNAL_PHY(n) \
  12         phy##n: ethernet-phy@##n { \
  13                 reg = <##n>; \
  14                 compatible = "ethernet-phy-ieee802.3-c22"; \
  15                 phy-is-integrated; \
  16         };
  17
  18 #define EXTERNAL_PHY(n) \
  19         phy##n: ethernet-phy@##n { \
  20                 reg = <##n>; \
  21                 compatible = "ethernet-phy-ieee802.3-c22"; \
  22         };
  23
  24 #define EXTERNAL_SFP_PHY(n) \
  25         phy##n: ethernet-phy@##n { \
  26                 compatible = "ethernet-phy-ieee802.3-c22"; \
  27                 sfp; \
  28                 media = "fibre"; \
  29                 reg = <##n>; \
  30         };
  31
  32 #define EXTERNAL_SFP_PHY_FULL(n, s) \
  33         phy##n: ethernet-phy@##n { \
  34                 compatible = "ethernet-phy-ieee802.3-c22"; \
  35                 sfp = <&sfp##s>; \
  36                 reg = <##n>; \
  37         };
  38
  39 #define SWITCH_PORT(n, s, m) \
  40         port##n: port@##n { \
  41                 reg = <##n>; \
  42                 label = SWITCH_PORT_LABEL(s) ; \
  43                 phy-handle = <&phy##n>; \
  44                 phy-mode = #m ; \
  45         };
  46
  47 #define SWITCH_SFP_PORT(n, s, m) \
  48         port##n: port@##n { \
  49                 reg = <##n>; \
  50                 label = SWITCH_PORT_LABEL(s) ; \
  51                 phy-handle = <&phy##n>; \
  52                 phy-mode = #m ; \
  53                 fixed-link { \
  54                         speed = <1000>; \
  55                         full-duplex; \
  56                 }; \
  57         };
  58
  59 / {
  60         #address-cells = <1>;
  61         #size-cells = <1>;
  62
  63         compatible = "realtek,rtl838x-soc";
  64
  65         ccu: clock-controller {
  66                 compatible = "realtek,rtl8380-clock";
  67                 #clock-cells = <1>;
  68         };
  69
  70         cpus {
  71                 #address-cells = <1>;
  72                 #size-cells = <0>;
  73
  74                 cpu@0 {
  75                         compatible = "mips,mips4KEc";
  76                         reg = <0>;
  77                         clocks = <&ccu CLK_CPU>;
  78                         operating-points-v2 = <&cpu_opp_table>;
  79                 };
  80         };
  81
  82         cpu_opp_table: opp-table-0 {
  83                 compatible = "operating-points-v2";
  84                 opp-shared;
  85
  86                 opp00 {
  87                         opp-hz = /bits/ 64 <325000000>;
  88                 };
  89                 opp01 {
  90                         opp-hz = /bits/ 64 <350000000>;
  91                 };
  92                 opp02 {
  93                         opp-hz = /bits/ 64 <375000000>;
  94                 };
  95                 opp03 {
  96                         opp-hz = /bits/ 64 <400000000>;
  97                 };
  98                 opp04 {
  99                         opp-hz = /bits/ 64 <425000000>;
 100                 };
 101                 opp05 {
 102                         opp-hz = /bits/ 64 <450000000>;
 103                 };
 104                 opp06 {
 105                         opp-hz = /bits/ 64 <475000000>;
 106                 };
 107                 opp07 {
 108                         opp-hz = /bits/ 64 <500000000>;
 109                 };
 110         };
 111
 112         chosen {
 113                 bootargs = "console=ttyS0,115200";
 114         };
 115
 116         cpuintc: cpuintc {
 117                 compatible = "mti,cpu-interrupt-controller";
 118                 #address-cells = <0>;
 119                 #interrupt-cells = <1>;
 120                 interrupt-controller;
 121         };
 122
 123         soc: soc {
 124                 compatible = "simple-bus";
 125                 #address-cells = <1>;
 126                 #size-cells = <1>;
 127                 ranges = <0x0 0x18000000 0x10000>;
 128
 129                 intc: interrupt-controller@3000 {
 130                         compatible = "realtek,rtl8380-intc", "realtek,rtl-intc";
 131                         reg = <0x3000 0x18>;
 132                         interrupt-controller;
 133                         #interrupt-cells = <2>;
 134
 135                         interrupt-parent = <&cpuintc>;
 136                         interrupts = <2>, <3>, <4>, <5>, <6>;
 137                 };
 138
 139                 spi0: spi@1200 {
 140                         compatible = "realtek,rtl8380-spi";
 141                         reg = <0x1200 0x100>;
 142
 143                         #address-cells = <1>;
 144                         #size-cells = <0>;
 145                 };
 146
 147                 timer0: timer@3100 {
 148                         compatible = "realtek,rtl8380-timer", "realtek,otto-timer";
 149                         reg = <0x3100 0x10>, <0x3110 0x10>, <0x3120 0x10>,
 150                               <0x3130 0x10>, <0x3140 0x10>;
 151
 152                         interrupt-parent = <&intc>;
 153                         interrupts = <29 4>, <28 4>, <17 4>, <16 4>, <15 4>;
 154                         clocks = <&ccu CLK_LXB>;
 155                 };
 156
 157                 uart0: uart@2000 {
 158                         compatible = "ns16550a";
 159                         reg = <0x2000 0x100>;
 160
 161                         clocks = <&ccu CLK_LXB>;
 162
 163                         interrupt-parent = <&intc>;
 164                         interrupts = <31 1>;
 165
 166                         reg-io-width = <1>;
 167                         reg-shift = <2>;
 168                         fifo-size = <1>;
 169                         no-loopback-test;
 170                 };
 171
 172                 uart1: uart@2100 {
 173                         pinctrl-names = "default";
 174                         pinctrl-0 = <&enable_uart1>;
 175
 176                         compatible = "ns16550a";
 177                         reg = <0x2100 0x100>;
 178
 179                         clocks = <&ccu CLK_LXB>;
 180
 181                         interrupt-parent = <&intc>;
 182                         interrupts = <30 0>;
 183
 184                         reg-io-width = <1>;
 185                         reg-shift = <2>;
 186                         fifo-size = <1>;
 187                         no-loopback-test;
 188
 189                         status = "disabled";
 190                 };
 191
 192                 watchdog0: watchdog@3150 {
 193                         compatible = "realtek,rtl8380-wdt";
 194                         reg = <0x3150 0xc>;
 195
 196                         realtek,reset-mode = "soc";
 197
 198                         clocks = <&ccu CLK_LXB>;
 199                         timeout-sec = <30>;
 200
 201                         interrupt-parent = <&intc>;
 202                         interrupt-names = "phase1", "phase2";
 203                         interrupts = <19 3>, <18 4>;
 204                 };
 205
 206                 gpio0: gpio-controller@3500 {
 207                         compatible = "realtek,rtl8380-gpio", "realtek,otto-gpio";
 208                         reg = <0x3500 0x20>;
 209
 210                         gpio-controller;
 211                         #gpio-cells = <2>;
 212                         ngpios = <24>;
 213
 214                         interrupt-controller;
 215                         #interrupt-cells = <2>;
 216                         interrupt-parent = <&intc>;
 217                         interrupts = <23 3>;
 218                 };
 219         };
 220
 221         pinmux: pinmux@1b001000 {
 222                 compatible = "pinctrl-single";
 223                 reg = <0x1b001000 0x4>;
 224
 225                 pinctrl-single,bit-per-mux;
 226                 pinctrl-single,register-width = <32>;
 227                 pinctrl-single,function-mask = <0x1>;
 228                 #pinctrl-cells = <2>;
 229
 230                 enable_uart1: pinmux_enable_uart1 {
 231                         pinctrl-single,bits = <0x0 0x10 0x10>;
 232                 };
 233         };
 234
 235         /* LED_GLB_CTRL */
 236         pinmux_led: pinmux@1b00a000 {
 237                 compatible = "pinctrl-single";
 238                 reg = <0x1b00a000 0x4>;
 239
 240                 pinctrl-single,bit-per-mux;
 241                 pinctrl-single,register-width = <32>;
 242                 pinctrl-single,function-mask = <0x1>;
 243                 #pinctrl-cells = <2>;
 244
 245                 /* enable GPIO 0 */
 246                 pinmux_disable_sys_led: disable_sys_led {
 247                         pinctrl-single,bits = <0x0 0x0 0x8000>;
 248                 };
 249         };
 250
 251         ethernet0: ethernet@1b00a300 {
 252                 compatible = "realtek,rtl838x-eth";
 253                 reg = <0x1b00a300 0x100>;
 254                 interrupt-parent = <&intc>;
 255                 interrupts = <24 3>;
 256                 #interrupt-cells = <1>;
 257                 phy-mode = "internal";
 258
 259                 fixed-link {
 260                         speed = <1000>;
 261                         full-duplex;
 262                 };
 263         };
 264
 265         sram0: sram@9f000000 {
 266                 compatible = "mmio-sram";
 267                 reg = <0x9f000000 0x20000>;
 268                 #address-cells = <1>;
 269                 #size-cells = <1>;
 270                 ranges = <0 0x9f000000 0x20000>;
 271         };
 272
 273         switch0: switch@1b000000 {
 274                 compatible = "realtek,rtl83xx-switch";
 275
 276                 interrupt-parent = <&intc>;
 277                 interrupts = <20 2>;
 278         };
 279 };