target/linux/realtek/dts-5.10/rtl8393_tplink_sg2452p-v4.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "rtl839x.dtsi"
   4
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/gpio/gpio.h>
   7 #include <dt-bindings/leds/common.h>
   8
   9 / {
  10         compatible = "tplink,sg2452p-v4", "realtek,rtl8393-soc";
  11         model = "TP-Link SG2452P v4";
  12
  13         memory@0 {
  14                 device_type = "memory";
  15                 reg = <0x0 0x10000000>;
  16         };
  17
  18         aliases {
  19                 led-boot = &led_sys;
  20                 led-failsafe = &led_sys;
  21                 led-running = &led_sys;
  22                 led-upgrade = &led_sys;
  23         };
  24
  25         chosen {
  26                 bootargs = "console=ttyS0,38400";
  27         };
  28
  29         keys {
  30                 compatible = "gpio-keys";
  31
  32                 reset {
  33                         label = "reset";
  34                         gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
  35                         linux,code = <KEY_RESTART>;
  36                 };
  37
  38                 speed {
  39                         label = "speed";
  40                         gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
  41                         linux,code = <BTN_0>;
  42                 };
  43         };
  44
  45         gpio_fan_sys {
  46                 compatible = "gpio-fan";
  47                 alarm-gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
  48         };
  49
  50         gpio_fan_psu_1 {
  51                 pinctrl-names = "default";
  52                 pinctrl-0 = <&disable_jtag>;
  53                 compatible = "gpio-fan";
  54
  55                 alarm-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
  56                 gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
  57                 /* the actual speeds (rpm) are unknown, just use dummy values */
  58                 gpio-fan,speed-map = <1 0>, <2 1>;
  59                 #cooling-cells = <2>;
  60         };
  61
  62         gpio_fan_psu_2 {
  63                 /* This fan runs in parallel to PSU1 fan, but has a separate
  64                  * alarm GPIO. This is not (yet) supported by the gpio-fan driver,
  65                  * so a separate instance is added
  66                  */
  67                 compatible = "gpio-fan";
  68                 alarm-gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
  69         };
  70
  71         leds {
  72                 pinctrl-names = "default";
  73                 compatible = "gpio-leds";
  74
  75                 led-0 {
  76                         label = "green:speed";
  77                         gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
  78                         color = <LED_COLOR_ID_GREEN>;
  79                         function = LED_FUNCTION_INDICATOR;
  80                 };
  81
  82                 led-1 {
  83                         label = "green:poe";
  84                         gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
  85                         color = <LED_COLOR_ID_GREEN>;
  86                         function = LED_FUNCTION_INDICATOR;
  87                 };
  88
  89                 led_sys: led-2 {
  90                         label = "green:sys";
  91                         gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
  92                         color = <LED_COLOR_ID_GREEN>;
  93                         function = LED_FUNCTION_STATUS;
  94                 };
  95
  96                 led-3 {
  97                         label = "green:fan";
  98                         gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
  99                         color = <LED_COLOR_ID_GREEN>;
 100                         function = LED_FUNCTION_STATUS;
 101                 };
 102
 103                 led-4 {
 104                         label = "amber:fan";
 105                         gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
 106                         color = <LED_COLOR_ID_AMBER>;
 107                         function = "fault-fan";
 108                 };
 109
 110                 led-5 {
 111                         label = "green:poe-max";
 112                         gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
 113                         color = <LED_COLOR_ID_GREEN>;
 114                         function = "alarm-poe";
 115                 };
 116         };
 117
 118         i2c-gpio-0 {
 119                 compatible = "i2c-gpio";
 120                 sda-gpios = <&gpio0 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 121                 scl-gpios = <&gpio0 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 122                 i2c-gpio,delay-us = <2>;
 123                 #address-cells = <1>;
 124                 #size-cells = <0>;
 125
 126                 /* LAN9 - LAN12 */
 127                 tps23861@5 {
 128                         compatible = "ti,tps23861";
 129                         reg = <0x05>;
 130                 };
 131
 132                 /* LAN17 - LAN20 */
 133                 tps23861@6 {
 134                         compatible = "ti,tps23861";
 135                         reg = <0x06>;
 136                 };
 137
 138                 /* LAN45 - LAN48 */
 139                 tps23861@9 {
 140                         compatible = "ti,tps23861";
 141                         reg = <0x09>;
 142                 };
 143
 144                 /* LAN37 - LAN40 */
 145                 tps23861@a {
 146                         compatible = "ti,tps23861";
 147                         reg = <0x0a>;
 148                 };
 149
 150                 /* LAN1 - LAN4 */
 151                 tps23861@14 {
 152                         compatible = "ti,tps23861";
 153                         reg = <0x14>;
 154                 };
 155
 156                 /* LAN25 - LAN28 */
 157                 tps23861@24 {
 158                         compatible = "ti,tps23861";
 159                         reg = <0x24>;
 160                 };
 161
 162                 /* LAN33 - LAN 36 */
 163                 tps23861@25 {
 164                         compatible = "ti,tps23861";
 165                         reg = <0x25>;
 166                 };
 167
 168                 /* LAN41 - LAN44 */
 169                 tps23861@26 {
 170                         compatible = "ti,tps23861";
 171                         reg = <0x26>;
 172                 };
 173
 174                 /* LAN13 - LAN16 */
 175                 tps23861@29 {
 176                         compatible = "ti,tps23861";
 177                         reg = <0x29>;
 178                 };
 179
 180                 /* LAN29 - LAN32 */
 181                 tps23861@2c {
 182                         compatible = "ti,tps23861";
 183                         reg = <0x2c>;
 184                 };
 185
 186                 /* LAN5 - LAN8 */
 187                 tps23861@48 {
 188                         compatible = "ti,tps23861";
 189                         reg = <0x48>;
 190                 };
 191
 192                 /* LAN21 - LAN24 */
 193                 tps23861@49 {
 194                         compatible = "ti,tps23861";
 195                         reg = <0x49>;
 196                 };
 197         };
 198
 199         gpio-restart {
 200                 compatible = "gpio-restart";
 201                 gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
 202         };
 203 };
 204
 205 &gpio0 {
 206         poe-enable {
 207                 gpio-hog;
 208                 gpios = <23 GPIO_ACTIVE_HIGH>;
 209                 output-high;
 210                 line-name = "poe-enable";
 211         };
 212 };
 213
 214 &spi0 {
 215         status = "okay";
 216         flash@0 {
 217                 compatible = "jedec,spi-nor";
 218                 reg = <0>;
 219                 spi-max-frequency = <10000000>;
 220
 221                 partitions {
 222                         compatible = "fixed-partitions";
 223                         #address-cells = <1>;
 224                         #size-cells = <1>;
 225
 226                         partition@0 {
 227                                 label = "u-boot";
 228                                 reg = <0x0 0xe0000>;
 229                                 read-only;
 230                         };
 231                         partition@e0000 {
 232                                 label = "u-boot-env";
 233                                 reg = <0xe0000 0x20000>;
 234                         };
 235
 236                         /* We use the "sys", "usrimg1" and "usrimg2" partitions
 237                          *  as firmware since the kernel needs to be in "sys", but the
 238                          *  partition is too small to hold the "rootfs" as well.
 239                          *  The original partition map contains:
 240                          *
 241                          *   partition@100000 {
 242                          *       label = "sys";
 243                          *       reg = <0x100000 0x600000>;
 244                          *   };
 245                          *   partition@700000 {
 246                          *       label = "usrimg1";
 247                          *       reg = <0x700000 0xa00000>;
 248                          *   };
 249                          *   partition@1100000 {
 250                          *       label = "usrimg2";
 251                          *       reg = <0x1100000 0xa00000>;
 252                          *   };
 253                          */
 254
 255                         partition@100000 {
 256                                 label = "firmware";
 257                                 reg = <0x100000 0x1a00000>;
 258                         };
 259                         partition@1b00000 {
 260                                 label = "usrappfs";
 261                                 reg = <0x1b00000 0x400000>;
 262                         };
 263                         partition@1f00000 {
 264                                 label = "para";
 265                                 reg = <0x1f00000 0x100000>;
 266                                 read-only;
 267                         };
 268                 };
 269         };
 270 };
 271
 272 &ethernet0 {
 273         mdio: mdio-bus {
 274                 compatible = "realtek,rtl838x-mdio";
 275                 #address-cells = <1>;
 276                 #size-cells = <0>;
 277
 278                 /* External phy RTL8218B #1 */
 279                 EXTERNAL_PHY(0)
 280                 EXTERNAL_PHY(1)
 281                 EXTERNAL_PHY(2)
 282                 EXTERNAL_PHY(3)
 283                 EXTERNAL_PHY(4)
 284                 EXTERNAL_PHY(5)
 285                 EXTERNAL_PHY(6)
 286                 EXTERNAL_PHY(7)
 287
 288                 /* External phy RTL8218B #2 */
 289                 EXTERNAL_PHY(8)
 290                 EXTERNAL_PHY(9)
 291                 EXTERNAL_PHY(10)
 292                 EXTERNAL_PHY(11)
 293                 EXTERNAL_PHY(12)
 294                 EXTERNAL_PHY(13)
 295                 EXTERNAL_PHY(14)
 296                 EXTERNAL_PHY(15)
 297
 298                 /* External phy RTL8218B #3 */
 299                 EXTERNAL_PHY(16)
 300                 EXTERNAL_PHY(17)
 301                 EXTERNAL_PHY(18)
 302                 EXTERNAL_PHY(19)
 303                 EXTERNAL_PHY(20)
 304                 EXTERNAL_PHY(21)
 305                 EXTERNAL_PHY(22)
 306                 EXTERNAL_PHY(23)
 307
 308                 /* External phy RTL8218B #4 */
 309                 EXTERNAL_PHY(24)
 310                 EXTERNAL_PHY(25)
 311                 EXTERNAL_PHY(26)
 312                 EXTERNAL_PHY(27)
 313                 EXTERNAL_PHY(28)
 314                 EXTERNAL_PHY(29)
 315                 EXTERNAL_PHY(30)
 316                 EXTERNAL_PHY(31)
 317
 318                 /* External phy RTL8218B #5 */
 319                 EXTERNAL_PHY(32)
 320                 EXTERNAL_PHY(33)
 321                 EXTERNAL_PHY(34)
 322                 EXTERNAL_PHY(35)
 323                 EXTERNAL_PHY(36)
 324                 EXTERNAL_PHY(37)
 325                 EXTERNAL_PHY(38)
 326                 EXTERNAL_PHY(39)
 327
 328                 /* External phy RTL8218B #6 */
 329                 EXTERNAL_PHY(40)
 330                 EXTERNAL_PHY(41)
 331                 EXTERNAL_PHY(42)
 332                 EXTERNAL_PHY(43)
 333                 EXTERNAL_PHY(44)
 334                 EXTERNAL_PHY(45)
 335                 EXTERNAL_PHY(46)
 336                 EXTERNAL_PHY(47)
 337         };
 338 };
 339
 340 &switch0 {
 341         ports {
 342                 #address-cells = <1>;
 343                 #size-cells = <0>;
 344
 345                 SWITCH_PORT(0, 01, qsgmii)
 346                 SWITCH_PORT(1, 02, qsgmii)
 347                 SWITCH_PORT(2, 03, qsgmii)
 348                 SWITCH_PORT(3, 04, qsgmii)
 349                 SWITCH_PORT(4, 05, qsgmii)
 350                 SWITCH_PORT(5, 06, qsgmii)
 351                 SWITCH_PORT(6, 07, qsgmii)
 352                 SWITCH_PORT(7, 08, qsgmii)
 353
 354                 SWITCH_PORT(8, 09, qsgmii)
 355                 SWITCH_PORT(9, 10, qsgmii)
 356                 SWITCH_PORT(10, 11, qsgmii)
 357                 SWITCH_PORT(11, 12, qsgmii)
 358                 SWITCH_PORT(12, 13, qsgmii)
 359                 SWITCH_PORT(13, 14, qsgmii)
 360                 SWITCH_PORT(14, 15, qsgmii)
 361                 SWITCH_PORT(15, 16, qsgmii)
 362
 363                 SWITCH_PORT(16, 17, qsgmii)
 364                 SWITCH_PORT(17, 18, qsgmii)
 365                 SWITCH_PORT(18, 19, qsgmii)
 366                 SWITCH_PORT(19, 20, qsgmii)
 367                 SWITCH_PORT(20, 21, qsgmii)
 368                 SWITCH_PORT(21, 22, qsgmii)
 369                 SWITCH_PORT(22, 23, qsgmii)
 370                 SWITCH_PORT(23, 24, qsgmii)
 371
 372                 SWITCH_PORT(24, 25, qsgmii)
 373                 SWITCH_PORT(25, 26, qsgmii)
 374                 SWITCH_PORT(26, 27, qsgmii)
 375                 SWITCH_PORT(27, 28, qsgmii)
 376                 SWITCH_PORT(28, 29, qsgmii)
 377                 SWITCH_PORT(29, 30, qsgmii)
 378                 SWITCH_PORT(30, 31, qsgmii)
 379                 SWITCH_PORT(31, 32, qsgmii)
 380
 381                 SWITCH_PORT(32, 33, qsgmii)
 382                 SWITCH_PORT(33, 34, qsgmii)
 383                 SWITCH_PORT(34, 35, qsgmii)
 384                 SWITCH_PORT(35, 36, qsgmii)
 385                 SWITCH_PORT(36, 37, qsgmii)
 386                 SWITCH_PORT(37, 38, qsgmii)
 387                 SWITCH_PORT(38, 39, qsgmii)
 388                 SWITCH_PORT(39, 40, qsgmii)
 389
 390                 SWITCH_PORT(40, 41, qsgmii)
 391                 SWITCH_PORT(41, 42, qsgmii)
 392                 SWITCH_PORT(42, 43, qsgmii)
 393                 SWITCH_PORT(43, 44, qsgmii)
 394                 SWITCH_PORT(44, 45, qsgmii)
 395                 SWITCH_PORT(45, 46, qsgmii)
 396                 SWITCH_PORT(46, 47, qsgmii)
 397                 SWITCH_PORT(47, 48, qsgmii)
 398
 399                 /* CPU-Port */
 400                 port@52 {
 401                         ethernet = <&ethernet0>;
 402                         reg = <52>;
 403                         phy-mode = "internal";
 404
 405                         fixed-link {
 406                                 speed = <1000>;
 407                                 full-duplex;
 408                         };
 409                 };
 410         };
 411 };