1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
5 #define STRINGIZE(s) #s
6 #define LAN_LABEL(p, s) STRINGIZE(p ## s)
7 #define SWITCH_PORT_LABEL(n) LAN_LABEL(lan, n)
9 #define INTERNAL_PHY(n) \
10 phy##n: ethernet-phy@##n { \
12 compatible = "ethernet-phy-ieee802.3-c22"; \
16 #define EXTERNAL_PHY(n) \
17 phy##n: ethernet-phy@##n { \
19 compatible = "ethernet-phy-ieee802.3-c22"; \
22 #define EXTERNAL_SFP_PHY(n) \
23 phy##n: ethernet-phy@##n { \
24 compatible = "ethernet-phy-ieee802.3-c22"; \
30 #define SWITCH_PORT(n, s, m) \
33 label = SWITCH_PORT_LABEL(s) ; \
34 phy-handle = <&phy##n>; \
38 #define SWITCH_SFP_PORT(n, s, m) \
41 label = SWITCH_PORT_LABEL(s) ; \
42 phy-handle = <&phy##n>; \
54 compatible = "realtek,rtl838x-soc";
59 frequency = <800000000>;
62 compatible = "mips,mips34Kc";
68 device_type = "memory";
69 reg = <0x0 0x8000000>;
73 bootargs = "console=ttyS0,38400";
77 compatible = "mti,cpu-interrupt-controller";
79 #interrupt-cells = <1>;
84 compatible = "realtek,rtl-intc";
85 reg = <0xb8003000 0x20>;
87 #interrupt-cells = <1>;
90 <31 &cpuintc 1>, /* UART1 */
91 <30 &cpuintc 2>, /* UART0 */
92 <28 &cpuintc 1>, /* USB_H2 */
93 <24 &cpuintc 4>, /* NIC */
94 <23 &cpuintc 3>, /* SWCORE */
95 <13 &cpuintc 4>, /* GPIO_ABCD */
96 <11 &cpuintc 1>, /* TC4 */
97 <10 &cpuintc 1>, /* TC3 */
98 <9 &cpuintc 1>, /* TC2 */
99 <8 &cpuintc 1>, /* TC1 */
100 <7 &cpuintc 5>; /* TC0 */
104 compatible = "fixed-clock";
106 clock-frequency = <175000000>;
107 clock-output-names = "osc";
110 timer: timer@b8003200 {
111 compatible = "realtek,rtl9300-timer";
112 reg = <0xb8003200 0x60>;
113 interrupt-parent = <&intc>;
115 interrupt-names = "ostimer";
120 compatible = "realtek,rtl8380-spi";
121 reg = <0xb8001200 0x100>;
123 #address-cells = <1>;
127 uart0: uart@b8002000 {
128 compatible = "ns16550a";
129 reg = <0xb8002000 0x100>;
131 clock-frequency = <175000000>;
133 interrupt-parent = <&intc>;
142 uart1: uart@b8002100 {
143 compatible = "ns16550a";
144 reg = <0xb8002100 0x100>;
146 clock-frequency = <175000000>;
148 interrupt-parent = <&intc>;
157 gpio0: gpio-controller@b8003500 {
158 compatible = "realtek,rtl8380-gpio", "realtek,otto-gpio";
159 reg = <0xb8003500 0x20>;
163 interrupt-parent = <&intc>;
167 * currently, RTL930x GPIO is not supported in
168 * upstreamed driver (gpio-realtek-otto)
173 ethernet0: ethernet@bb00a300 {
174 compatible = "realtek,rtl838x-eth";
175 reg = <0xbb00a300 0x100>;
176 interrupt-parent = <&intc>;
178 #interrupt-cells = <1>;
179 phy-mode = "internal";
187 switch0: switch@bb000000 {
188 compatible = "realtek,rtl83xx-switch";
190 interrupt-parent = <&intc>;