target/linux/realtek/dts-5.10/rtl930x.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 /dts-v1/;
   4
   5 #define STRINGIZE(s) #s
   6 #define LAN_LABEL(p, s) STRINGIZE(p ## s)
   7 #define SWITCH_PORT_LABEL(n) LAN_LABEL(lan, n)
   8
   9 #define INTERNAL_PHY(n) \
  10         phy##n: ethernet-phy@##n { \
  11                 reg = <##n>; \
  12                 compatible = "ethernet-phy-ieee802.3-c22"; \
  13                 phy-is-integrated; \
  14         };
  15
  16 #define EXTERNAL_PHY(n) \
  17         phy##n: ethernet-phy@##n { \
  18                 reg = <##n>; \
  19                 compatible = "ethernet-phy-ieee802.3-c22"; \
  20         };
  21
  22 #define EXTERNAL_SFP_PHY(n) \
  23         phy##n: ethernet-phy@##n { \
  24                 compatible = "ethernet-phy-ieee802.3-c22"; \
  25                 sfp; \
  26                 media = "fibre"; \
  27                 reg = <##n>; \
  28         };
  29
  30 #define SWITCH_PORT(n, s, m) \
  31         port@##n { \
  32                 reg = <##n>; \
  33                 label = SWITCH_PORT_LABEL(s) ; \
  34                 phy-handle = <&phy##n>; \
  35                 phy-mode = #m ; \
  36         };
  37
  38 #define SWITCH_SFP_PORT(n, s, m) \
  39         port@##n { \
  40                 reg = <##n>; \
  41                 label = SWITCH_PORT_LABEL(s) ; \
  42                 phy-handle = <&phy##n>; \
  43                 phy-mode = #m ; \
  44                 fixed-link { \
  45                         speed = <1000>; \
  46                         full-duplex; \
  47                 }; \
  48         };
  49
  50 / {
  51         #address-cells = <1>;
  52         #size-cells = <1>;
  53
  54         compatible = "realtek,rtl838x-soc";
  55
  56         cpus {
  57                 #address-cells = <1>;
  58                 #size-cells = <0>;
  59                 frequency = <800000000>;
  60
  61                 cpu@0 {
  62                         compatible = "mips,mips34Kc";
  63                         reg = <0>;
  64                 };
  65         };
  66
  67         memory@0 {
  68                 device_type = "memory";
  69                 reg = <0x0 0x8000000>;
  70         };
  71
  72         chosen {
  73                 bootargs = "console=ttyS0,115200";
  74         };
  75
  76         cpuintc: cpuintc {
  77                 compatible = "mti,cpu-interrupt-controller";
  78                 #address-cells = <0>;
  79                 #interrupt-cells = <1>;
  80                 interrupt-controller;
  81         };
  82
  83         lx_clk: lx_clk {
  84                 compatible = "fixed-clock";
  85                 #clock-cells = <0>;
  86                 clock-frequency  = <175000000>;
  87         };
  88
  89         soc: soc {
  90                 compatible = "simple-bus";
  91                 #address-cells = <1>;
  92                 #size-cells = <1>;
  93                 ranges = <0x0 0x18000000 0x10000>;
  94
  95                 intc: rtlintc@3000 {
  96                         compatible = "realtek,rtl-intc";
  97                         reg = <0x3000 0x20>;
  98                         #address-cells = <0>;
  99                         #interrupt-cells = <1>;
 100                         interrupt-controller;
 101                         interrupt-map =
 102                                 <31 &cpuintc 1>, /* UART1 */
 103                                 <30 &cpuintc 2>, /* UART0 */
 104                                 <28 &cpuintc 1>, /* USB_H2 */
 105                                 <24 &cpuintc 4>, /* NIC */
 106                                 <23 &cpuintc 3>, /* SWCORE */
 107                                 <13 &cpuintc 4>, /* GPIO_ABCD */
 108                                 <11 &cpuintc 1>, /* TC4 */
 109                                 <10 &cpuintc 1>, /* TC3 */
 110                                 <9 &cpuintc 1>,  /* TC2 */
 111                                 <8 &cpuintc 1>,  /* TC1 */
 112                                 <7 &cpuintc 5>,  /* TC0 */
 113                                 <6 &cpuintc 5>,  /* WDT_IP2 */
 114                                 <5 &cpuintc 4>;  /* WDT_IP1 */
 115                 };
 116
 117                 timer: timer@3200 {
 118                         compatible = "realtek,rtl9300-timer";
 119                         reg = <0x3200 0x60>;
 120                         interrupt-parent = <&intc>;
 121                         interrupts = <8>;
 122                         interrupt-names = "ostimer";
 123                         clocks = <&lx_clk>;
 124                 };
 125
 126                 spi0: spi@1200 {
 127                         compatible = "realtek,rtl8380-spi";
 128                         reg = <0x1200 0x100>;
 129
 130                         #address-cells = <1>;
 131                         #size-cells = <0>;
 132                 };
 133
 134                 uart0: uart@2000 {
 135                         compatible = "ns16550a";
 136                         reg = <0x2000 0x100>;
 137
 138                         clocks = <&lx_clk>;
 139
 140                         interrupt-parent = <&intc>;
 141                         interrupts = <30>;
 142
 143                         reg-io-width = <1>;
 144                         reg-shift = <2>;
 145                         fifo-size = <1>;
 146                         no-loopback-test;
 147                 };
 148
 149                 uart1: uart@2100 {
 150                         compatible = "ns16550a";
 151                         reg = <0x2100 0x100>;
 152
 153                         clocks = <&lx_clk>;
 154
 155                         interrupt-parent = <&intc>;
 156                         interrupts = <31>;
 157
 158                         reg-io-width = <1>;
 159                         reg-shift = <2>;
 160                         fifo-size = <1>;
 161                         no-loopback-test;
 162
 163                         status = "disabled";
 164                 };
 165
 166                 watchdog0: watchdog@3260 {
 167                         compatible = "realtek,rtl9300-wdt";
 168                         reg = <0x3260 0xc>;
 169
 170                         realtek,reset-mode = "soc";
 171
 172                         clocks = <&lx_clk>;
 173                         timeout-sec = <30>;
 174
 175                         interrupt-parent = <&intc>;
 176                         interrupt-names = "phase1", "phase2";
 177                         interrupts = <5>, <6>;
 178                 };
 179
 180                 gpio0: gpio-controller@3500 {
 181                         compatible = "realtek,rtl8380-gpio", "realtek,otto-gpio";
 182                         reg = <0x3500 0x20>;
 183                         gpio-controller;
 184                         #gpio-cells = <2>;
 185                         ngpios = <32>;
 186                         interrupt-parent = <&intc>;
 187                         interrupts = <31>;
 188
 189                         /*
 190                          * currently, RTL930x GPIO is not supported in
 191                          * upstreamed driver (gpio-realtek-otto)
 192                          */
 193                         status = "disabled";
 194                 };
 195         };
 196
 197         ethernet0: ethernet@1b00a300 {
 198                 compatible = "realtek,rtl838x-eth";
 199                 reg = <0x1b00a300 0x100>;
 200                 interrupt-parent = <&intc>;
 201                 interrupts = <24>;
 202                 #interrupt-cells = <1>;
 203                 phy-mode = "internal";
 204
 205                 fixed-link {
 206                         speed = <1000>;
 207                         full-duplex;
 208                 };
 209         };
 210
 211         switch0: switch@1b000000 {
 212                 compatible = "realtek,rtl83xx-switch";
 213
 214                 interrupt-parent = <&intc>;
 215                 interrupts = <20>;
 216         };
 217 };