realtek: d-link dgs-1210-10p improve sfp support
[openwrt/staging/svanheule.git] / target / linux / realtek / dts-5.15 / rtl8382_d-link_dgs-1210-10p.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "rtl838x.dtsi"
4 #include "rtl83xx_d-link_dgs-1210_common.dtsi"
5
6 / {
7 compatible = "d-link,dgs-1210-10p", "realtek,rtl838x-soc";
8 model = "D-Link DGS-1210-10P";
9
10 /* i2c of the left SFP cage: port 9 */
11 i2c0: i2c-gpio-0 {
12 compatible = "i2c-gpio";
13 sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
14 scl-gpios = <&gpio1 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
15 i2c-gpio,delay-us = <2>;
16 #address-cells = <1>;
17 #size-cells = <0>;
18 };
19
20 sfp0: sfp-p9 {
21 compatible = "sff,sfp";
22 i2c-bus = <&i2c0>;
23 los-gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
24 mod-def0-gpio = <&gpio1 8 GPIO_ACTIVE_LOW>;
25 tx-disable-gpio = <&gpio1 11 GPIO_ACTIVE_HIGH>;
26 };
27
28 /* i2c of the right SFP cage: port 10 */
29 i2c1: i2c-gpio-1 {
30 compatible = "i2c-gpio";
31 sda-gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
32 scl-gpios = <&gpio1 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
33 i2c-gpio,delay-us = <2>;
34 #address-cells = <1>;
35 #size-cells = <0>;
36 };
37
38 sfp1: sfp-p10 {
39 compatible = "sff,sfp";
40 i2c-bus = <&i2c1>;
41 los-gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
42 mod-def0-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
43 tx-disable-gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
44 };
45
46 keys {
47 compatible = "gpio-keys-polled";
48 poll-interval = <20>;
49
50 mode {
51 label = "mode";
52 gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
53 linux,code = <KEY_LIGHTS_TOGGLE>;
54 };
55
56 reset {
57 label = "reset";
58 gpios = <&gpio1 33 GPIO_ACTIVE_LOW>;
59 linux,code = <KEY_RESTART>;
60 };
61 };
62
63 leds {
64 link_act {
65 label = "green:link_act";
66 gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
67 };
68
69 poe {
70 label = "green:poe";
71 gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
72 };
73
74 poe_max {
75 label = "yellow:poe_max";
76 gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
77 };
78 };
79
80 gpio1: rtl8231-gpio {
81 compatible = "realtek,rtl8231-gpio";
82 #gpio-cells = <2>;
83 gpio-controller;
84 indirect-access-bus-id = <0>;
85 };
86 };
87
88 &uart1 {
89 status = "okay";
90 };
91
92 &ethernet0 {
93 mdio: mdio-bus {
94 compatible = "realtek,rtl838x-mdio";
95 regmap = <&ethernet0>;
96 #address-cells = <1>;
97 #size-cells = <0>;
98
99 INTERNAL_PHY(8)
100 INTERNAL_PHY(9)
101 INTERNAL_PHY(10)
102 INTERNAL_PHY(11)
103 INTERNAL_PHY(12)
104 INTERNAL_PHY(13)
105 INTERNAL_PHY(14)
106 INTERNAL_PHY(15)
107 INTERNAL_PHY(24)
108 INTERNAL_PHY(26)
109 };
110 };
111
112 &switch0 {
113 ports {
114 #address-cells = <1>;
115 #size-cells = <0>;
116
117 SWITCH_PORT(8, 1, internal)
118 SWITCH_PORT(9, 2, internal)
119 SWITCH_PORT(10, 3, internal)
120 SWITCH_PORT(11, 4, internal)
121 SWITCH_PORT(12, 5, internal)
122 SWITCH_PORT(13, 6, internal)
123 SWITCH_PORT(14, 7, internal)
124 SWITCH_PORT(15, 8, internal)
125
126 port@24 {
127 reg = <24>;
128 label = "lan9";
129 phy-handle = <&phy24>;
130 phy-mode = "1000base-x";
131 managed = "in-band-status";
132 sfp = <&sfp0>;
133 };
134
135 port@26 {
136 reg = <26>;
137 label = "lan10";
138 phy-handle = <&phy26>;
139 phy-mode = "1000base-x";
140 managed = "in-band-status";
141 sfp = <&sfp1>;
142 };
143
144 port@28 {
145 ethernet = <&ethernet0>;
146 reg = <28>;
147 phy-mode = "internal";
148 fixed-link {
149 speed = <1000>;
150 full-duplex;
151 };
152 };
153 };
154 };