1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include "rtl839x.dtsi"
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/leds/common.h>
10 compatible = "tplink,sg2452p-v4", "realtek,rtl8393-soc";
11 model = "TP-Link SG2452P v4";
14 device_type = "memory";
15 reg = <0x0 0x10000000>;
20 led-failsafe = &led_sys;
21 led-running = &led_sys;
22 led-upgrade = &led_sys;
23 label-mac-device = ðernet0;
27 stdout-path = "serial0:38400n8";
31 compatible = "gpio-keys";
35 gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
36 linux,code = <KEY_RESTART>;
41 gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
47 compatible = "gpio-fan";
48 alarm-gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
52 pinctrl-names = "default";
53 pinctrl-0 = <&disable_jtag>;
54 compatible = "gpio-fan";
56 alarm-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
57 gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
58 /* the actual speeds (rpm) are unknown, just use dummy values */
59 gpio-fan,speed-map = <1 0>, <2 1>;
64 /* This fan runs in parallel to PSU1 fan, but has a separate
65 * alarm GPIO. This is not (yet) supported by the gpio-fan driver,
66 * so a separate instance is added
68 compatible = "gpio-fan";
69 alarm-gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
73 pinctrl-names = "default";
74 compatible = "gpio-leds";
77 gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
78 color = <LED_COLOR_ID_GREEN>;
79 function = LED_FUNCTION_INDICATOR;
83 gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
84 color = <LED_COLOR_ID_GREEN>;
85 function = LED_FUNCTION_INDICATOR;
89 gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
90 color = <LED_COLOR_ID_GREEN>;
91 function = LED_FUNCTION_STATUS;
95 gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
96 color = <LED_COLOR_ID_GREEN>;
97 function = LED_FUNCTION_STATUS;
101 gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
102 color = <LED_COLOR_ID_AMBER>;
103 function = "fault-fan";
107 gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
108 color = <LED_COLOR_ID_GREEN>;
109 function = "alarm-poe";
114 compatible = "i2c-gpio";
115 sda-gpios = <&gpio0 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
116 scl-gpios = <&gpio0 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
117 i2c-gpio,delay-us = <2>;
118 #address-cells = <1>;
123 compatible = "ti,tps23861";
129 compatible = "ti,tps23861";
135 compatible = "ti,tps23861";
141 compatible = "ti,tps23861";
147 compatible = "ti,tps23861";
153 compatible = "ti,tps23861";
159 compatible = "ti,tps23861";
165 compatible = "ti,tps23861";
171 compatible = "ti,tps23861";
177 compatible = "ti,tps23861";
183 compatible = "ti,tps23861";
189 compatible = "ti,tps23861";
195 compatible = "gpio-restart";
196 gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
203 gpios = <23 GPIO_ACTIVE_HIGH>;
205 line-name = "poe-enable";
212 compatible = "jedec,spi-nor";
214 spi-max-frequency = <10000000>;
217 compatible = "fixed-partitions";
218 #address-cells = <1>;
227 label = "u-boot-env";
228 reg = <0xe0000 0x20000>;
231 /* We use the "sys", "usrimg1" and "usrimg2" partitions
232 * as firmware since the kernel needs to be in "sys", but the
233 * partition is too small to hold the "rootfs" as well.
234 * The original partition map contains:
238 * reg = <0x100000 0x600000>;
242 * reg = <0x700000 0xa00000>;
244 * partition@1100000 {
246 * reg = <0x1100000 0xa00000>;
252 reg = <0x100000 0x1a00000>;
256 reg = <0x1b00000 0x400000>;
260 reg = <0x1f00000 0x100000>;
264 compatible = "fixed-layout";
265 #address-cells = <1>;
268 factory_macaddr: macaddr@fdff4 {
278 nvmem-cells = <&factory_macaddr>;
279 nvmem-cell-names = "mac-address";
282 compatible = "realtek,rtl838x-mdio";
283 #address-cells = <1>;
286 /* External phy RTL8218B #1 */
296 /* External phy RTL8218B #2 */
306 /* External phy RTL8218B #3 */
316 /* External phy RTL8218B #4 */
326 /* External phy RTL8218B #5 */
336 /* External phy RTL8218B #6 */
350 #address-cells = <1>;
353 SWITCH_PORT(0, 01, qsgmii)
354 SWITCH_PORT(1, 02, qsgmii)
355 SWITCH_PORT(2, 03, qsgmii)
356 SWITCH_PORT(3, 04, qsgmii)
357 SWITCH_PORT(4, 05, qsgmii)
358 SWITCH_PORT(5, 06, qsgmii)
359 SWITCH_PORT(6, 07, qsgmii)
360 SWITCH_PORT(7, 08, qsgmii)
362 SWITCH_PORT(8, 09, qsgmii)
363 SWITCH_PORT(9, 10, qsgmii)
364 SWITCH_PORT(10, 11, qsgmii)
365 SWITCH_PORT(11, 12, qsgmii)
366 SWITCH_PORT(12, 13, qsgmii)
367 SWITCH_PORT(13, 14, qsgmii)
368 SWITCH_PORT(14, 15, qsgmii)
369 SWITCH_PORT(15, 16, qsgmii)
371 SWITCH_PORT(16, 17, qsgmii)
372 SWITCH_PORT(17, 18, qsgmii)
373 SWITCH_PORT(18, 19, qsgmii)
374 SWITCH_PORT(19, 20, qsgmii)
375 SWITCH_PORT(20, 21, qsgmii)
376 SWITCH_PORT(21, 22, qsgmii)
377 SWITCH_PORT(22, 23, qsgmii)
378 SWITCH_PORT(23, 24, qsgmii)
380 SWITCH_PORT(24, 25, qsgmii)
381 SWITCH_PORT(25, 26, qsgmii)
382 SWITCH_PORT(26, 27, qsgmii)
383 SWITCH_PORT(27, 28, qsgmii)
384 SWITCH_PORT(28, 29, qsgmii)
385 SWITCH_PORT(29, 30, qsgmii)
386 SWITCH_PORT(30, 31, qsgmii)
387 SWITCH_PORT(31, 32, qsgmii)
389 SWITCH_PORT(32, 33, qsgmii)
390 SWITCH_PORT(33, 34, qsgmii)
391 SWITCH_PORT(34, 35, qsgmii)
392 SWITCH_PORT(35, 36, qsgmii)
393 SWITCH_PORT(36, 37, qsgmii)
394 SWITCH_PORT(37, 38, qsgmii)
395 SWITCH_PORT(38, 39, qsgmii)
396 SWITCH_PORT(39, 40, qsgmii)
398 SWITCH_PORT(40, 41, qsgmii)
399 SWITCH_PORT(41, 42, qsgmii)
400 SWITCH_PORT(42, 43, qsgmii)
401 SWITCH_PORT(43, 44, qsgmii)
402 SWITCH_PORT(44, 45, qsgmii)
403 SWITCH_PORT(45, 46, qsgmii)
404 SWITCH_PORT(46, 47, qsgmii)
405 SWITCH_PORT(47, 48, qsgmii)
409 ethernet = <ðernet0>;
411 phy-mode = "internal";