target/linux/realtek/files-5.10/arch/mips/rtl838x/prom.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * prom.c
   4  * Early intialization code for the Realtek RTL838X SoC
   5  *
   6  * based on the original BSP by
   7  * Copyright (C) 2006-2012 Tony Wu (tonywu@realtek.com)
   8  * Copyright (C) 2020 B. Koblitz
   9  *
  10  */
  11
  12 #include <linux/init.h>
  13 #include <linux/kernel.h>
  14 #include <linux/string.h>
  15 #include <linux/of_fdt.h>
  16 #include <linux/libfdt.h>
  17 #include <asm/bootinfo.h>
  18 #include <asm/addrspace.h>
  19 #include <asm/page.h>
  20 #include <asm/cpu.h>
  21 #include <asm/smp-ops.h>
  22 #include <asm/mips-cps.h>
  23
  24 #include <mach-rtl83xx.h>
  25
  26 extern char arcs_cmdline[];
  27 extern const char __appended_dtb;
  28
  29 struct rtl83xx_soc_info soc_info;
  30 const void *fdt;
  31
  32 #ifdef CONFIG_MIPS_MT_SMP
  33 extern const struct plat_smp_ops vsmp_smp_ops;
  34 static struct plat_smp_ops rtl_smp_ops;
  35
  36 static void rtl_init_secondary(void)
  37 {
  38 /*
  39  * MIPS timer interrupt might fire like crazy if not used or initialized
  40  * properly. Silence it by setting the maximum possible interval.
  41  */
  42         write_c0_compare(0);
  43 /*
  44  * Enable all CPU interrupts, as everything is managed by the external
  45  * controller. TODO: Standard vsmp_init_secondary() has special treatment for
  46  * Malta if external GIC is available. Maybe we need this too.
  47  */
  48         if (mips_gic_present())
  49                 pr_warn("%s: GIC present. Maybe interrupt enabling required.\n", __func__);
  50         else
  51                 set_c0_status(ST0_IM);
  52 }
  53 #endif
  54
  55 const char *get_system_type(void)
  56 {
  57         return soc_info.name;
  58 }
  59
  60 void __init prom_free_prom_memory(void)
  61 {
  62
  63 }
  64
  65 void __init device_tree_init(void)
  66 {
  67         if (!fdt_check_header(&__appended_dtb)) {
  68                 fdt = &__appended_dtb;
  69                 pr_info("Using appended Device Tree.\n");
  70         }
  71         initial_boot_params = (void *)fdt;
  72         unflatten_and_copy_device_tree();
  73 }
  74
  75 static void __init prom_init_cmdline(void)
  76 {
  77         int argc = fw_arg0;
  78         char **argv = (char **) KSEG1ADDR(fw_arg1);
  79         int i;
  80
  81         arcs_cmdline[0] = '\0';
  82
  83         for (i = 0; i < argc; i++) {
  84                 char *p = (char *) KSEG1ADDR(argv[i]);
  85
  86                 if (CPHYSADDR(p) && *p) {
  87                         strlcat(arcs_cmdline, p, sizeof(arcs_cmdline));
  88                         strlcat(arcs_cmdline, " ", sizeof(arcs_cmdline));
  89                 }
  90         }
  91         pr_info("Kernel command line: %s\n", arcs_cmdline);
  92 }
  93
  94 void __init identify_rtl9302(void)
  95 {
  96         switch (sw_r32(RTL93XX_MODEL_NAME_INFO) & 0xfffffff0) {
  97         case 0x93020810:
  98                 soc_info.name = "RTL9302A 12x2.5G";
  99                 break;
 100         case 0x93021010:
 101                 soc_info.name = "RTL9302B 8x2.5G";
 102                 break;
 103         case 0x93021810:
 104                 soc_info.name = "RTL9302C 16x2.5G";
 105                 break;
 106         case 0x93022010:
 107                 soc_info.name = "RTL9302D 24x2.5G";
 108                 break;
 109         case 0x93020800:
 110                 soc_info.name = "RTL9302A";
 111                 break;
 112         case 0x93021000:
 113                 soc_info.name = "RTL9302B";
 114                 break;
 115         case 0x93021800:
 116                 soc_info.name = "RTL9302C";
 117                 break;
 118         case 0x93022000:
 119                 soc_info.name = "RTL9302D";
 120                 break;
 121         case 0x93023001:
 122                 soc_info.name = "RTL9302F";
 123                 break;
 124         default:
 125                 soc_info.name = "RTL9302";
 126         }
 127 }
 128
 129 void __init prom_init(void)
 130 {
 131         uint32_t model;
 132
 133         /* uart0 */
 134         setup_8250_early_printk_port(0xb8002000, 2, 0);
 135
 136         model = sw_r32(RTL838X_MODEL_NAME_INFO);
 137         pr_info("RTL838X model is %x\n", model);
 138         model = model >> 16 & 0xFFFF;
 139
 140         if ((model != 0x8328) && (model != 0x8330) && (model != 0x8332)
 141             && (model != 0x8380) && (model != 0x8382)) {
 142                 model = sw_r32(RTL839X_MODEL_NAME_INFO);
 143                 pr_info("RTL839X model is %x\n", model);
 144                 model = model >> 16 & 0xFFFF;
 145         }
 146
 147         if ((model & 0x8390) != 0x8380 && (model & 0x8390) != 0x8390) {
 148                 model = sw_r32(RTL93XX_MODEL_NAME_INFO);
 149                 pr_info("RTL93XX model is %x\n", model);
 150                 model = model >> 16 & 0xFFFF;
 151         }
 152
 153         soc_info.id = model;
 154
 155         switch (model) {
 156         case 0x8328:
 157                 soc_info.name = "RTL8328";
 158                 soc_info.family = RTL8328_FAMILY_ID;
 159                 break;
 160         case 0x8332:
 161                 soc_info.name = "RTL8332";
 162                 soc_info.family = RTL8380_FAMILY_ID;
 163                 break;
 164         case 0x8380:
 165                 soc_info.name = "RTL8380";
 166                 soc_info.family = RTL8380_FAMILY_ID;
 167                 break;
 168         case 0x8382:
 169                 soc_info.name = "RTL8382";
 170                 soc_info.family = RTL8380_FAMILY_ID;
 171                 break;
 172         case 0x8390:
 173                 soc_info.name = "RTL8390";
 174                 soc_info.family = RTL8390_FAMILY_ID;
 175                 break;
 176         case 0x8391:
 177                 soc_info.name = "RTL8391";
 178                 soc_info.family = RTL8390_FAMILY_ID;
 179                 break;
 180         case 0x8392:
 181                 soc_info.name = "RTL8392";
 182                 soc_info.family = RTL8390_FAMILY_ID;
 183                 break;
 184         case 0x8393:
 185                 soc_info.name = "RTL8393";
 186                 soc_info.family = RTL8390_FAMILY_ID;
 187                 break;
 188         case 0x9301:
 189                 soc_info.name = "RTL9301";
 190                 soc_info.family = RTL9300_FAMILY_ID;
 191                 break;
 192         case 0x9302:
 193                 identify_rtl9302();
 194                 soc_info.family = RTL9300_FAMILY_ID;
 195                 break;
 196         case 0x9303:
 197                 soc_info.name = "RTL9303";
 198                 soc_info.family = RTL9300_FAMILY_ID;
 199                 break;
 200         case 0x9313:
 201                 soc_info.name = "RTL9313";
 202                 soc_info.family = RTL9310_FAMILY_ID;
 203                 break;
 204         default:
 205                 soc_info.name = "DEFAULT";
 206                 soc_info.family = 0;
 207         }
 208
 209         pr_info("SoC Type: %s\n", get_system_type());
 210
 211         /* Early detection of CMP support */
 212         if(soc_info.family == RTL9310_FAMILY_ID) {
 213                 mips_cm_probe();
 214                 mips_cpc_probe();
 215         }
 216
 217         prom_init_cmdline();
 218
 219         if (!register_cps_smp_ops())
 220                 return;
 221
 222 #ifdef CONFIG_MIPS_MT_SMP
 223         if (cpu_has_mipsmt) {
 224                 rtl_smp_ops = vsmp_smp_ops;
 225                 rtl_smp_ops.init_secondary = rtl_init_secondary;
 226                 register_smp_ops(&rtl_smp_ops);
 227                 return;
 228         }
 229 #endif
 230
 231         register_up_smp_ops();
 232 }