7a1d6aa136ad979edd20d19423f2d8344a2f48f7
[openwrt/staging/noltari.git] / target / linux / realtek / files-5.10 / drivers / gpio / gpio-rtl8231.c
1 // SPDX-License-Identifier: GPL-2.0-only
2
3 #include <linux/gpio/driver.h>
4 #include <linux/module.h>
5 #include <linux/platform_device.h>
6 #include <linux/delay.h>
7 #include <asm/mach-rtl838x/mach-rtl83xx.h>
8
9 /* RTL8231 registers for LED control */
10 #define RTL8231_LED_FUNC0 0x0000
11 #define RTL8231_LED_FUNC1 0x0001
12 #define RTL8231_READY_MASK 0x03f0
13 #define RTL8231_READY_VALUE 0x0370
14 #define RTL8231_GPIO_PIN_SEL(gpio) ((0x0002) + ((gpio) >> 4))
15 #define RTL8231_GPIO_DIR(gpio) ((0x0005) + ((gpio) >> 4))
16 #define RTL8231_GPIO_DATA(gpio) ((0x001C) + ((gpio) >> 4))
17
18 #define USEC_TIMEOUT 5000
19
20 #define RTL8231_SMI_BUS_ID_MAX 0x1F
21
22 struct rtl8231_gpios {
23 struct gpio_chip gc;
24 struct device *dev;
25 u32 id;
26 u32 smi_bus_id;
27 u16 reg_shadow[0x20];
28 u32 reg_cached;
29 int ext_gpio_indrt_access;
30 };
31
32 extern struct mutex smi_lock;
33 extern struct rtl83xx_soc_info soc_info;
34
35 static u32 rtl8231_read(struct rtl8231_gpios *gpios, u32 reg)
36 {
37 u32 t = 0, n = 0;
38
39 reg &= 0x1f;
40
41 /* Calculate read register address */
42 t = (gpios->smi_bus_id << 2) | (reg << 7);
43
44 /* Set execution bit: cleared when operation completed */
45 t |= 1;
46
47 // Start execution
48 sw_w32(t, gpios->ext_gpio_indrt_access);
49 do {
50 udelay(1);
51 t = sw_r32(gpios->ext_gpio_indrt_access);
52 n++;
53 } while ((t & 1) && (n < USEC_TIMEOUT));
54
55 if (n >= USEC_TIMEOUT)
56 return 0x80000000;
57
58 pr_debug("%s: %x, %x, %x\n", __func__, gpios->smi_bus_id,
59 reg, (t & 0xffff0000) >> 16);
60
61 return (t & 0xffff0000) >> 16;
62 }
63
64 static int rtl8231_write(struct rtl8231_gpios *gpios, u32 reg, u32 data)
65 {
66 u32 t = 0, n = 0;
67
68 pr_debug("%s: %x, %x, %x\n", __func__, gpios->smi_bus_id, reg, data);
69 reg &= 0x1f;
70
71 t = (gpios->smi_bus_id << 2) | (reg << 7) | (data << 16);
72 /* Set write bit */
73 t |= 2;
74
75 /* Set execution bit: cleared when operation completed */
76 t |= 1;
77
78 // Start execution
79 sw_w32(t, gpios->ext_gpio_indrt_access);
80 do {
81 udelay(1);
82 t = sw_r32(gpios->ext_gpio_indrt_access);
83 } while ((t & 1) && (n < USEC_TIMEOUT));
84
85 if (n >= USEC_TIMEOUT)
86 return -1;
87
88 return 0;
89 }
90
91 static u32 rtl8231_read_cached(struct rtl8231_gpios *gpios, u32 reg)
92 {
93 if (reg > 0x1f)
94 return 0;
95
96 if (gpios->reg_cached & (1 << reg))
97 return gpios->reg_shadow[reg];
98
99 return rtl8231_read(gpios, reg);
100 }
101
102 /* Set Direction of the RTL8231 pin:
103 * dir 1: input
104 * dir 0: output
105 */
106 static int rtl8231_pin_dir(struct rtl8231_gpios *gpios, u32 gpio, u32 dir)
107 {
108 u32 v;
109 int pin_sel_addr = RTL8231_GPIO_PIN_SEL(gpio);
110 int pin_dir_addr = RTL8231_GPIO_DIR(gpio);
111 int dpin = gpio % 16;
112
113 if (gpio > 31) {
114 pr_debug("WARNING: HIGH pin\n");
115 dpin += 5;
116 pin_dir_addr = pin_sel_addr;
117 }
118
119 v = rtl8231_read_cached(gpios, pin_dir_addr);
120 if (v & 0x80000000) {
121 pr_err("Error reading RTL8231\n");
122 return -1;
123 }
124
125 v = (v & ~(1 << dpin)) | (dir << dpin);
126 rtl8231_write(gpios, pin_dir_addr, v);
127 gpios->reg_shadow[pin_dir_addr] = v;
128 gpios->reg_cached |= 1 << pin_dir_addr;
129 return 0;
130 }
131
132 static int rtl8231_pin_dir_get(struct rtl8231_gpios *gpios, u32 gpio, u32 *dir)
133 {
134 /* dir 1: input
135 * dir 0: output
136 */
137
138 u32 v;
139 int pin_dir_addr = RTL8231_GPIO_DIR(gpio);
140 int pin = gpio % 16;
141
142 if (gpio > 31) {
143 pin_dir_addr = RTL8231_GPIO_PIN_SEL(gpio);
144 pin += 5;
145 }
146
147 v = rtl8231_read(gpios, pin_dir_addr);
148 if (v & (1 << pin))
149 *dir = 1;
150 else
151 *dir = 0;
152 return 0;
153 }
154
155 static int rtl8231_pin_set(struct rtl8231_gpios *gpios, u32 gpio, u32 data)
156 {
157 u32 v = rtl8231_read(gpios, RTL8231_GPIO_DATA(gpio));
158
159 pr_debug("%s: %d to %d\n", __func__, gpio, data);
160 if (v & 0x80000000) {
161 pr_err("Error reading RTL8231\n");
162 return -1;
163 }
164 v = (v & ~(1 << (gpio % 16))) | (data << (gpio % 16));
165 rtl8231_write(gpios, RTL8231_GPIO_DATA(gpio), v);
166 gpios->reg_shadow[RTL8231_GPIO_DATA(gpio)] = v;
167 gpios->reg_cached |= 1 << RTL8231_GPIO_DATA(gpio);
168 return 0;
169 }
170
171 static int rtl8231_pin_get(struct rtl8231_gpios *gpios, u32 gpio, u16 *state)
172 {
173 u32 v = rtl8231_read(gpios, RTL8231_GPIO_DATA(gpio));
174
175 if (v & 0x80000000) {
176 pr_err("Error reading RTL8231\n");
177 return -1;
178 }
179
180 *state = v & 0xffff;
181 return 0;
182 }
183
184 static int rtl8231_direction_input(struct gpio_chip *gc, unsigned int offset)
185 {
186 int err;
187 struct rtl8231_gpios *gpios = gpiochip_get_data(gc);
188
189 pr_debug("%s: %d\n", __func__, offset);
190 mutex_lock(&smi_lock);
191 err = rtl8231_pin_dir(gpios, offset, 1);
192 mutex_unlock(&smi_lock);
193 return err;
194 }
195
196 static int rtl8231_direction_output(struct gpio_chip *gc, unsigned int offset, int value)
197 {
198 int err;
199 struct rtl8231_gpios *gpios = gpiochip_get_data(gc);
200
201 pr_debug("%s: %d\n", __func__, offset);
202 mutex_lock(&smi_lock);
203 err = rtl8231_pin_dir(gpios, offset, 0);
204 mutex_unlock(&smi_lock);
205 if (!err)
206 err = rtl8231_pin_set(gpios, offset, value);
207 return err;
208 }
209
210 static int rtl8231_get_direction(struct gpio_chip *gc, unsigned int offset)
211 {
212 u32 v = 0;
213 struct rtl8231_gpios *gpios = gpiochip_get_data(gc);
214
215 pr_debug("%s: %d\n", __func__, offset);
216 mutex_lock(&smi_lock);
217 rtl8231_pin_dir_get(gpios, offset, &v);
218 mutex_unlock(&smi_lock);
219 return v;
220 }
221
222 static int rtl8231_gpio_get(struct gpio_chip *gc, unsigned int offset)
223 {
224 u16 state = 0;
225 struct rtl8231_gpios *gpios = gpiochip_get_data(gc);
226
227 mutex_lock(&smi_lock);
228 rtl8231_pin_get(gpios, offset, &state);
229 mutex_unlock(&smi_lock);
230 if (state & (1 << (offset % 16)))
231 return 1;
232 return 0;
233 }
234
235 void rtl8231_gpio_set(struct gpio_chip *gc, unsigned int offset, int value)
236 {
237 struct rtl8231_gpios *gpios = gpiochip_get_data(gc);
238
239 rtl8231_pin_set(gpios, offset, value);
240 }
241
242 int rtl8231_init(struct rtl8231_gpios *gpios)
243 {
244 u32 ret;
245
246 pr_info("%s called, MDIO bus ID: %d\n", __func__, gpios->smi_bus_id);
247
248 gpios->reg_cached = 0;
249
250 if (soc_info.family == RTL8390_FAMILY_ID) {
251 // RTL8390: Enable external gpio in global led control register
252 sw_w32_mask(0x7 << 18, 0x4 << 18, RTL839X_LED_GLB_CTRL);
253 } else if (soc_info.family == RTL8380_FAMILY_ID) {
254 // RTL8380: Enable RTL8231 indirect access mode
255 sw_w32_mask(0, 1, RTL838X_EXTRA_GPIO_CTRL);
256 sw_w32_mask(3, 1, RTL838X_DMY_REG5);
257 }
258
259 ret = rtl8231_read(gpios, RTL8231_LED_FUNC1);
260 if ((ret & 0x80000000) || ((ret & RTL8231_READY_MASK) != RTL8231_READY_VALUE))
261 return -ENXIO;
262
263 /* Select GPIO functionality and force input direction for pins 0-36 */
264 rtl8231_write(gpios, RTL8231_GPIO_PIN_SEL(0), 0xffff);
265 rtl8231_write(gpios, RTL8231_GPIO_DIR(0), 0xffff);
266 rtl8231_write(gpios, RTL8231_GPIO_PIN_SEL(16), 0xffff);
267 rtl8231_write(gpios, RTL8231_GPIO_DIR(16), 0xffff);
268 rtl8231_write(gpios, RTL8231_GPIO_PIN_SEL(32), 0x03ff);
269
270 /* Set LED_Start to enable drivers for output mode */
271 rtl8231_write(gpios, RTL8231_LED_FUNC0, 1 << 1);
272
273 return 0;
274 }
275
276 static const struct of_device_id rtl8231_gpio_of_match[] = {
277 { .compatible = "realtek,rtl8231-gpio" },
278 {},
279 };
280
281 MODULE_DEVICE_TABLE(of, rtl8231_gpio_of_match);
282
283 static int rtl8231_gpio_probe(struct platform_device *pdev)
284 {
285 struct device *dev = &pdev->dev;
286 struct device_node *np = dev->of_node;
287 struct rtl8231_gpios *gpios;
288 int err;
289
290 pr_info("Probing RTL8231 GPIOs\n");
291
292 if (!np) {
293 dev_err(&pdev->dev, "No DT found\n");
294 return -EINVAL;
295 }
296
297 gpios = devm_kzalloc(dev, sizeof(*gpios), GFP_KERNEL);
298 if (!gpios)
299 return -ENOMEM;
300
301 gpios->id = soc_info.id;
302 if (soc_info.family == RTL8380_FAMILY_ID) {
303 gpios->ext_gpio_indrt_access = RTL838X_EXT_GPIO_INDRT_ACCESS;
304 }
305
306 if (soc_info.family == RTL8390_FAMILY_ID) {
307 gpios->ext_gpio_indrt_access = RTL839X_EXT_GPIO_INDRT_ACCESS;
308 }
309
310 err = of_property_read_u32(np, "indirect-access-bus-id", &gpios->smi_bus_id);
311 if (!err && gpios->smi_bus_id > RTL8231_SMI_BUS_ID_MAX)
312 err = -EINVAL;
313
314 if (err) {
315 dev_err(dev, "invalid or missing indirect-access-bus-id\n");
316 return err;
317 }
318
319 err = rtl8231_init(gpios);
320 if (err) {
321 dev_err(dev, "no device found at bus address %d\n", gpios->smi_bus_id);
322 return err;
323 }
324
325 gpios->dev = dev;
326 gpios->gc.base = -1;
327 gpios->gc.ngpio = 37;
328 gpios->gc.label = "rtl8231";
329 gpios->gc.parent = dev;
330 gpios->gc.owner = THIS_MODULE;
331 gpios->gc.can_sleep = true;
332
333 gpios->gc.direction_input = rtl8231_direction_input;
334 gpios->gc.direction_output = rtl8231_direction_output;
335 gpios->gc.set = rtl8231_gpio_set;
336 gpios->gc.get = rtl8231_gpio_get;
337 gpios->gc.get_direction = rtl8231_get_direction;
338
339 err = devm_gpiochip_add_data(dev, &gpios->gc, gpios);
340 return err;
341 }
342
343 static struct platform_driver rtl8231_gpio_driver = {
344 .driver = {
345 .name = "rtl8231-gpio",
346 .of_match_table = rtl8231_gpio_of_match,
347 },
348 .probe = rtl8231_gpio_probe,
349 };
350
351 module_platform_driver(rtl8231_gpio_driver);
352
353 MODULE_DESCRIPTION("Realtek RTL8231 GPIO expansion chip support");
354 MODULE_LICENSE("GPL v2");