target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/debugfs.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2
   3 #include <linux/debugfs.h>
   4 #include <linux/kernel.h>
   5
   6 #include <asm/mach-rtl838x/mach-rtl83xx.h>
   7 #include "rtl83xx.h"
   8
   9 #define RTL838X_DRIVER_NAME "rtl838x"
  10
  11 #define RTL8380_LED_GLB_CTRL                    (0xA000)
  12 #define RTL8380_LED_MODE_SEL                    (0x1004)
  13 #define RTL8380_LED_MODE_CTRL                   (0xA004)
  14 #define RTL8380_LED_P_EN_CTRL                   (0xA008)
  15 #define RTL8380_LED_SW_CTRL                     (0xA00C)
  16 #define RTL8380_LED0_SW_P_EN_CTRL               (0xA010)
  17 #define RTL8380_LED1_SW_P_EN_CTRL               (0xA014)
  18 #define RTL8380_LED2_SW_P_EN_CTRL               (0xA018)
  19 #define RTL8380_LED_SW_P_CTRL(p)                (0xA01C + (((p) << 2)))
  20
  21 #define RTL8390_LED_GLB_CTRL                    (0x00E4)
  22 #define RTL8390_LED_SET_2_3_CTRL                (0x00E8)
  23 #define RTL8390_LED_SET_0_1_CTRL                (0x00EC)
  24 #define RTL8390_LED_COPR_SET_SEL_CTRL(p)        (0x00F0 + (((p >> 4) << 2)))
  25 #define RTL8390_LED_FIB_SET_SEL_CTRL(p)         (0x0100 + (((p >> 4) << 2)))
  26 #define RTL8390_LED_COPR_PMASK_CTRL(p)          (0x0110 + (((p >> 5) << 2)))
  27 #define RTL8390_LED_FIB_PMASK_CTRL(p)           (0x00118 + (((p >> 5) << 2)))
  28 #define RTL8390_LED_COMBO_CTRL(p)               (0x0120 + (((p >> 5) << 2)))
  29 #define RTL8390_LED_SW_CTRL                     (0x0128)
  30 #define RTL8390_LED_SW_P_EN_CTRL(p)             (0x012C + (((p / 10) << 2)))
  31 #define RTL8390_LED_SW_P_CTRL(p)                (0x0144 + (((p) << 2)))
  32
  33 #define RTL838X_MIR_QID_CTRL(grp)               (0xAD44 + (((grp) << 2)))
  34 #define RTL838X_MIR_RSPAN_VLAN_CTRL(grp)        (0xA340 + (((grp) << 2)))
  35 #define RTL838X_MIR_RSPAN_VLAN_CTRL_MAC(grp)    (0xAA70 + (((grp) << 2)))
  36 #define RTL838X_MIR_RSPAN_TX_CTRL               (0xA350)
  37 #define RTL838X_MIR_RSPAN_TX_TAG_RM_CTRL        (0xAA80)
  38 #define RTL838X_MIR_RSPAN_TX_TAG_EN_CTRL        (0xAA84)
  39 #define RTL839X_MIR_RSPAN_VLAN_CTRL(grp)        (0xA340 + (((grp) << 2)))
  40 #define RTL839X_MIR_RSPAN_TX_CTRL               (0x69b0)
  41 #define RTL839X_MIR_RSPAN_TX_TAG_RM_CTRL        (0x2550)
  42 #define RTL839X_MIR_RSPAN_TX_TAG_EN_CTRL        (0x2554)
  43 #define RTL839X_MIR_SAMPLE_RATE_CTRL            (0x2558)
  44
  45 #define RTL838X_STAT_PRVTE_DROP_COUNTERS        (0x6A00)
  46 #define RTL839X_STAT_PRVTE_DROP_COUNTERS        (0x3E00)
  47 #define RTL930X_STAT_PRVTE_DROP_COUNTERS        (0xB5B8)
  48
  49 int rtl83xx_port_get_stp_state(struct rtl838x_switch_priv *priv, int port);
  50 void rtl83xx_port_stp_state_set(struct dsa_switch *ds, int port, u8 state);
  51 void rtl83xx_fast_age(struct dsa_switch *ds, int port);
  52 u32 rtl838x_get_egress_rate(struct rtl838x_switch_priv *priv, int port);
  53 u32 rtl839x_get_egress_rate(struct rtl838x_switch_priv *priv, int port);
  54 int rtl838x_set_egress_rate(struct rtl838x_switch_priv *priv, int port, u32 rate);
  55 int rtl839x_set_egress_rate(struct rtl838x_switch_priv *priv, int port, u32 rate);
  56
  57
  58 const char *rtl838x_drop_cntr[] = {
  59     "ALE_TX_GOOD_PKTS", "MAC_RX_DROP", "ACL_FWD_DROP", "HW_ATTACK_PREVENTION_DROP",
  60     "RMA_DROP", "VLAN_IGR_FLTR_DROP", "INNER_OUTER_CFI_EQUAL_1_DROP", "PORT_MOVE_DROP",
  61     "NEW_SA_DROP", "MAC_LIMIT_SYS_DROP", "MAC_LIMIT_VLAN_DROP", "MAC_LIMIT_PORT_DROP",
  62     "SWITCH_MAC_DROP", "ROUTING_EXCEPTION_DROP", "DA_LKMISS_DROP", "RSPAN_DROP",
  63     "ACL_LKMISS_DROP", "ACL_DROP", "INBW_DROP", "IGR_METER_DROP",
  64     "ACCEPT_FRAME_TYPE_DROP", "STP_IGR_DROP", "INVALID_SA_DROP", "SA_BLOCKING_DROP",
  65     "DA_BLOCKING_DROP", "L2_INVALID_DPM_DROP", "MCST_INVALID_DPM_DROP", "RX_FLOW_CONTROL_DROP",
  66     "STORM_SPPRS_DROP", "LALS_DROP", "VLAN_EGR_FILTER_DROP", "STP_EGR_DROP",
  67     "SRC_PORT_FILTER_DROP", "PORT_ISOLATION_DROP", "ACL_FLTR_DROP", "MIRROR_FLTR_DROP",
  68     "TX_MAX_DROP", "LINK_DOWN_DROP", "FLOW_CONTROL_DROP", "BRIDGE .1d discards"
  69 };
  70
  71 const char *rtl839x_drop_cntr[] = {
  72     "ALE_TX_GOOD_PKTS", "ERROR_PKTS", "EGR_ACL_DROP", "EGR_METER_DROP",
  73     "OAM", "CFM" "VLAN_IGR_FLTR", "VLAN_ERR",
  74     "INNER_OUTER_CFI_EQUAL_1", "VLAN_TAG_FORMAT", "SRC_PORT_SPENDING_TREE", "INBW",
  75     "RMA", "HW_ATTACK_PREVENTION", "PROTO_STORM", "MCAST_SA",
  76     "IGR_ACL_DROP", "IGR_METER_DROP", "DFLT_ACTION_FOR_MISS_ACL_AND_C2SC", "NEW_SA",
  77     "PORT_MOVE", "SA_BLOCKING", "ROUTING_EXCEPTION", "SRC_PORT_SPENDING_TREE_NON_FWDING",
  78     "MAC_LIMIT", "UNKNOW_STORM", "MISS_DROP", "CPU_MAC_DROP",
  79     "DA_BLOCKING", "SRC_PORT_FILTER_BEFORE_EGR_ACL", "VLAN_EGR_FILTER", "SPANNING_TRE",
  80     "PORT_ISOLATION", "OAM_EGRESS_DROP", "MIRROR_ISOLATION", "MAX_LEN_BEFORE_EGR_ACL",
  81     "SRC_PORT_FILTER_BEFORE_MIRROR", "MAX_LEN_BEFORE_MIRROR", "SPECIAL_CONGEST_BEFORE_MIRROR",
  82     "LINK_STATUS_BEFORE_MIRROR",
  83     "WRED_BEFORE_MIRROR", "MAX_LEN_AFTER_MIRROR", "SPECIAL_CONGEST_AFTER_MIRROR",
  84     "LINK_STATUS_AFTER_MIRROR",
  85     "WRED_AFTER_MIRROR"
  86 };
  87
  88 const char *rtl930x_drop_cntr[] = {
  89         "OAM_PARSER", "UC_RPF", "DEI_CFI", "MAC_IP_SUBNET_BASED_VLAN", "VLAN_IGR_FILTER",
  90         "L2_UC_MC", "IPV_IP6_MC_BRIDGE", "PTP", "USER_DEF_0_3", "RESERVED",
  91         "RESERVED1", "RESERVED2", "BPDU_RMA", "LACP", "LLDP",
  92         "EAPOL", "XX_RMA", "L3_IPUC_NON_IP", "IP4_IP6_HEADER_ERROR", "L3_BAD_IP",
  93         "L3_DIP_DMAC_MISMATCH", "IP4_IP_OPTION", "IP_UC_MC_ROUTING_LOOK_UP_MISS", "L3_DST_NULL_INTF",
  94         "L3_PBR_NULL_INTF",
  95         "HOST_NULL_INTF", "ROUTE_NULL_INTF", "BRIDGING_ACTION", "ROUTING_ACTION", "IPMC_RPF",
  96         "L2_NEXTHOP_AGE_OUT", "L3_UC_TTL_FAIL", "L3_MC_TTL_FAIL", "L3_UC_MTU_FAIL", "L3_MC_MTU_FAIL",
  97         "L3_UC_ICMP_REDIR", "IP6_MLD_OTHER_ACT", "ND", "IP_MC_RESERVED", "IP6_HBH",
  98         "INVALID_SA", "L2_HASH_FULL", "NEW_SA", "PORT_MOVE_FORBID", "STATIC_PORT_MOVING",
  99         "DYNMIC_PORT_MOVING", "L3_CRC", "MAC_LIMIT", "ATTACK_PREVENT", "ACL_FWD_ACTION",
 100         "OAMPDU", "OAM_MUX", "TRUNK_FILTER", "ACL_DROP", "IGR_BW",
 101         "ACL_METER", "VLAN_ACCEPT_FRAME_TYPE", "MSTP_SRC_DROP_DISABLED_BLOCKING", "SA_BLOCK", "DA_BLOCK",
 102         "STORM_CONTROL", "VLAN_EGR_FILTER", "MSTP_DESTINATION_DROP", "SRC_PORT_FILTER", "PORT_ISOLATION",
 103         "TX_MAX_FRAME_SIZE", "EGR_LINK_STATUS", "MAC_TX_DISABLE", "MAC_PAUSE_FRAME", "MAC_RX_DROP",
 104         "MIRROR_ISOLATE", "RX_FC", "EGR_QUEUE", "HSM_RUNOUT", "ROUTING_DISABLE", "INVALID_L2_NEXTHOP_ENTRY",
 105         "L3_MC_SRC_FLT", "CPUTAG_FLT", "FWD_PMSK_NULL", "IPUC_ROUTING_LOOKUP_MISS", "MY_DEV_DROP",
 106         "STACK_NONUC_BLOCKING_PMSK", "STACK_PORT_NOT_FOUND", "ACL_LOOPBACK_DROP", "IP6_ROUTING_EXT_HEADER"
 107 };
 108
 109 static ssize_t rtl838x_common_read(char __user *buffer, size_t count,
 110                                         loff_t *ppos, unsigned int value)
 111 {
 112         char *buf;
 113         ssize_t len;
 114
 115         if (*ppos != 0)
 116                 return 0;
 117
 118         buf = kasprintf(GFP_KERNEL, "0x%08x\n", value);
 119         if (!buf)
 120                 return -ENOMEM;
 121
 122         if (count < strlen(buf)) {
 123                 kfree(buf);
 124                 return -ENOSPC;
 125         }
 126
 127         len = simple_read_from_buffer(buffer, count, ppos, buf, strlen(buf));
 128         kfree(buf);
 129
 130         return len;
 131 }
 132
 133 static ssize_t rtl838x_common_write(const char __user *buffer, size_t count,
 134                                  loff_t *ppos, unsigned int *value)
 135 {
 136         char b[32];
 137         ssize_t len;
 138         int ret;
 139
 140         if (*ppos != 0)
 141                 return -EINVAL;
 142
 143         if (count >= sizeof(b))
 144                 return -ENOSPC;
 145
 146         len = simple_write_to_buffer(b, sizeof(b) - 1, ppos,
 147                                      buffer, count);
 148         if (len < 0)
 149                 return len;
 150
 151         b[len] = '\0';
 152         ret = kstrtouint(b, 16, value);
 153         if (ret)
 154                 return -EIO;
 155
 156         return len;
 157 }
 158
 159 static ssize_t stp_state_read(struct file *filp, char __user *buffer, size_t count,
 160                              loff_t *ppos)
 161 {
 162         struct rtl838x_port *p = filp->private_data;
 163         struct dsa_switch *ds = p->dp->ds;
 164         int value = rtl83xx_port_get_stp_state(ds->priv, p->dp->index);
 165
 166         if (value < 0)
 167                 return -EINVAL;
 168
 169         return rtl838x_common_read(buffer, count, ppos, (u32)value);
 170 }
 171
 172 static ssize_t stp_state_write(struct file *filp, const char __user *buffer,
 173                                 size_t count, loff_t *ppos)
 174 {
 175         struct rtl838x_port *p = filp->private_data;
 176         u32 value;
 177         size_t res = rtl838x_common_write(buffer, count, ppos, &value);
 178         if (res < 0)
 179                 return res;
 180
 181         rtl83xx_port_stp_state_set(p->dp->ds, p->dp->index, (u8)value);
 182
 183         return res;
 184 }
 185
 186 static const struct file_operations stp_state_fops = {
 187         .owner = THIS_MODULE,
 188         .open = simple_open,
 189         .read = stp_state_read,
 190         .write = stp_state_write,
 191 };
 192
 193 static ssize_t drop_counter_read(struct file *filp, char __user *buffer, size_t count,
 194                              loff_t *ppos)
 195 {
 196         struct rtl838x_switch_priv *priv = filp->private_data;
 197         int i;
 198         const char **d;
 199         u32 v;
 200         char *buf;
 201         int n = 0, len, offset;
 202         int num;
 203
 204         switch (priv->family_id) {
 205         case RTL8380_FAMILY_ID:
 206                 d = rtl838x_drop_cntr;
 207                 offset = RTL838X_STAT_PRVTE_DROP_COUNTERS;
 208                 num = 40;
 209                 break;
 210         case RTL8390_FAMILY_ID:
 211                 d = rtl839x_drop_cntr;
 212                 offset = RTL839X_STAT_PRVTE_DROP_COUNTERS;
 213                 num = 45;
 214                 break;
 215         case RTL9300_FAMILY_ID:
 216                 d = rtl930x_drop_cntr;
 217                 offset = RTL930X_STAT_PRVTE_DROP_COUNTERS;
 218                 num = 85;
 219                 break;
 220         }
 221
 222         buf = kmalloc(30 * num, GFP_KERNEL);
 223         if (!buf)
 224                 return -ENOMEM;
 225
 226         for (i = 0; i < num; i++) {
 227                 v = sw_r32(offset + (i << 2)) & 0xffff;
 228                 n += sprintf(buf + n, "%s: %d\n", d[i], v);
 229         }
 230
 231         if (count < strlen(buf)) {
 232                 kfree(buf);
 233                 return -ENOSPC;
 234         }
 235
 236         len = simple_read_from_buffer(buffer, count, ppos, buf, strlen(buf));
 237         kfree(buf);
 238
 239         return len;
 240 }
 241
 242 static const struct file_operations drop_counter_fops = {
 243         .owner = THIS_MODULE,
 244         .open = simple_open,
 245         .read = drop_counter_read,
 246 };
 247
 248 static ssize_t age_out_read(struct file *filp, char __user *buffer, size_t count,
 249                              loff_t *ppos)
 250 {
 251         struct rtl838x_port *p = filp->private_data;
 252         struct dsa_switch *ds = p->dp->ds;
 253         struct rtl838x_switch_priv *priv = ds->priv;
 254         int value = sw_r32(priv->r->l2_port_aging_out);
 255
 256         if (value < 0)
 257                 return -EINVAL;
 258
 259         return rtl838x_common_read(buffer, count, ppos, (u32)value);
 260 }
 261
 262 static ssize_t age_out_write(struct file *filp, const char __user *buffer,
 263                                 size_t count, loff_t *ppos)
 264 {
 265         struct rtl838x_port *p = filp->private_data;
 266         u32 value;
 267         size_t res = rtl838x_common_write(buffer, count, ppos, &value);
 268         if (res < 0)
 269                 return res;
 270
 271         rtl83xx_fast_age(p->dp->ds, p->dp->index);
 272
 273         return res;
 274 }
 275
 276 static const struct file_operations age_out_fops = {
 277         .owner = THIS_MODULE,
 278         .open = simple_open,
 279         .read = age_out_read,
 280         .write = age_out_write,
 281 };
 282
 283 static ssize_t port_egress_rate_read(struct file *filp, char __user *buffer, size_t count,
 284                                 loff_t *ppos)
 285 {
 286         struct rtl838x_port *p = filp->private_data;
 287         struct dsa_switch *ds = p->dp->ds;
 288         struct rtl838x_switch_priv *priv = ds->priv;
 289         int value;
 290         if (priv->family_id == RTL8380_FAMILY_ID)
 291                 value = rtl838x_get_egress_rate(priv, p->dp->index);
 292         else
 293                 value = rtl839x_get_egress_rate(priv, p->dp->index);
 294
 295         if (value < 0)
 296                 return -EINVAL;
 297
 298         return rtl838x_common_read(buffer, count, ppos, (u32)value);
 299 }
 300
 301 static ssize_t port_egress_rate_write(struct file *filp, const char __user *buffer,
 302                                 size_t count, loff_t *ppos)
 303 {
 304         struct rtl838x_port *p = filp->private_data;
 305         struct dsa_switch *ds = p->dp->ds;
 306         struct rtl838x_switch_priv *priv = ds->priv;
 307         u32 value;
 308         size_t res = rtl838x_common_write(buffer, count, ppos, &value);
 309         if (res < 0)
 310                 return res;
 311
 312         if (priv->family_id == RTL8380_FAMILY_ID)
 313                 rtl838x_set_egress_rate(priv, p->dp->index, value);
 314         else
 315                 rtl839x_set_egress_rate(priv, p->dp->index, value);
 316
 317         return res;
 318 }
 319
 320 static const struct file_operations port_egress_fops = {
 321         .owner = THIS_MODULE,
 322         .open = simple_open,
 323         .read = port_egress_rate_read,
 324         .write = port_egress_rate_write,
 325 };
 326
 327
 328 static const struct debugfs_reg32 port_ctrl_regs[] = {
 329         { .name = "port_isolation", .offset = RTL838X_PORT_ISO_CTRL(0), },
 330         { .name = "mac_force_mode", .offset = RTL838X_MAC_FORCE_MODE_CTRL, },
 331 };
 332
 333 void rtl838x_dbgfs_cleanup(struct rtl838x_switch_priv *priv)
 334 {
 335         debugfs_remove_recursive(priv->dbgfs_dir);
 336
 337 //      kfree(priv->dbgfs_entries);
 338 }
 339
 340 static int rtl838x_dbgfs_port_init(struct dentry *parent, struct rtl838x_switch_priv *priv,
 341                                    int port)
 342 {
 343         struct dentry *port_dir;
 344         struct debugfs_regset32 *port_ctrl_regset;
 345
 346         port_dir = debugfs_create_dir(priv->ports[port].dp->name, parent);
 347
 348         if (priv->family_id == RTL8380_FAMILY_ID) {
 349                 debugfs_create_x32("storm_rate_uc", 0644, port_dir,
 350                                 (u32 *)(RTL838X_SW_BASE + RTL838X_STORM_CTRL_PORT_UC(port)));
 351
 352                 debugfs_create_x32("storm_rate_mc", 0644, port_dir,
 353                                 (u32 *)(RTL838X_SW_BASE + RTL838X_STORM_CTRL_PORT_MC(port)));
 354
 355                 debugfs_create_x32("storm_rate_bc", 0644, port_dir,
 356                                 (u32 *)(RTL838X_SW_BASE + RTL838X_STORM_CTRL_PORT_BC(port)));
 357
 358                 debugfs_create_x32("vlan_port_tag_sts_ctrl", 0644, port_dir,
 359                                 (u32 *)(RTL838X_SW_BASE + RTL838X_VLAN_PORT_TAG_STS_CTRL
 360                                 + (port << 2)));
 361         } else {
 362                 debugfs_create_x32("storm_rate_uc", 0644, port_dir,
 363                                 (u32 *)(RTL838X_SW_BASE + RTL839X_STORM_CTRL_PORT_UC_0(port)));
 364
 365                 debugfs_create_x32("storm_rate_mc", 0644, port_dir,
 366                                 (u32 *)(RTL838X_SW_BASE + RTL839X_STORM_CTRL_PORT_MC_0(port)));
 367
 368                 debugfs_create_x32("storm_rate_bc", 0644, port_dir,
 369                                 (u32 *)(RTL838X_SW_BASE + RTL839X_STORM_CTRL_PORT_BC_0(port)));
 370
 371                 debugfs_create_x32("vlan_port_tag_sts_ctrl", 0644, port_dir,
 372                                 (u32 *)(RTL838X_SW_BASE + RTL839X_VLAN_PORT_TAG_STS_CTRL
 373                                 + (port << 2)));
 374         }
 375
 376         debugfs_create_u32("id", 0444, port_dir, (u32 *)&priv->ports[port].dp->index);
 377
 378         port_ctrl_regset = devm_kzalloc(priv->dev, sizeof(*port_ctrl_regset), GFP_KERNEL);
 379         if (!port_ctrl_regset)
 380                 return -ENOMEM;
 381
 382         port_ctrl_regset->regs = port_ctrl_regs;
 383         port_ctrl_regset->nregs = ARRAY_SIZE(port_ctrl_regs);
 384         port_ctrl_regset->base = (void *)(RTL838X_SW_BASE + (port << 2));
 385         debugfs_create_regset32("port_ctrl", 0400, port_dir, port_ctrl_regset);
 386
 387         debugfs_create_file("stp_state", 0600, port_dir, &priv->ports[port], &stp_state_fops);
 388         debugfs_create_file("age_out", 0600, port_dir, &priv->ports[port], &age_out_fops);
 389         debugfs_create_file("port_egress_rate", 0600, port_dir, &priv->ports[port],
 390                             &port_egress_fops);
 391         return 0;
 392 }
 393
 394 static int rtl838x_dbgfs_leds(struct dentry *parent, struct rtl838x_switch_priv *priv)
 395 {
 396         struct dentry *led_dir;
 397         int p;
 398         char led_sw_p_ctrl_name[20];
 399         char port_led_name[20];
 400
 401         led_dir = debugfs_create_dir("led", parent);
 402
 403         if (priv->family_id == RTL8380_FAMILY_ID) {
 404                 debugfs_create_x32("led_glb_ctrl", 0644, led_dir,
 405                                 (u32 *)(RTL838X_SW_BASE + RTL8380_LED_GLB_CTRL));
 406                 debugfs_create_x32("led_mode_sel", 0644, led_dir,
 407                                 (u32 *)(RTL838X_SW_BASE + RTL8380_LED_MODE_SEL));
 408                 debugfs_create_x32("led_mode_ctrl", 0644, led_dir,
 409                                 (u32 *)(RTL838X_SW_BASE + RTL8380_LED_MODE_CTRL));
 410                 debugfs_create_x32("led_p_en_ctrl", 0644, led_dir,
 411                                 (u32 *)(RTL838X_SW_BASE + RTL8380_LED_P_EN_CTRL));
 412                 debugfs_create_x32("led_sw_ctrl", 0644, led_dir,
 413                                 (u32 *)(RTL838X_SW_BASE + RTL8380_LED_SW_CTRL));
 414                 debugfs_create_x32("led0_sw_p_en_ctrl", 0644, led_dir,
 415                                 (u32 *)(RTL838X_SW_BASE + RTL8380_LED0_SW_P_EN_CTRL));
 416                 debugfs_create_x32("led1_sw_p_en_ctrl", 0644, led_dir,
 417                                 (u32 *)(RTL838X_SW_BASE + RTL8380_LED1_SW_P_EN_CTRL));
 418                 debugfs_create_x32("led2_sw_p_en_ctrl", 0644, led_dir,
 419                                 (u32 *)(RTL838X_SW_BASE + RTL8380_LED2_SW_P_EN_CTRL));
 420                 for (p = 0; p < 28; p++) {
 421                         snprintf(led_sw_p_ctrl_name, sizeof(led_sw_p_ctrl_name),
 422                                  "led_sw_p_ctrl.%02d", p);
 423                         debugfs_create_x32(led_sw_p_ctrl_name, 0644, led_dir,
 424                                 (u32 *)(RTL838X_SW_BASE + RTL8380_LED_SW_P_CTRL(p)));
 425                 }
 426         } else if (priv->family_id == RTL8390_FAMILY_ID) {
 427                 debugfs_create_x32("led_glb_ctrl", 0644, led_dir,
 428                                 (u32 *)(RTL838X_SW_BASE + RTL8390_LED_GLB_CTRL));
 429                 debugfs_create_x32("led_set_2_3", 0644, led_dir,
 430                                 (u32 *)(RTL838X_SW_BASE + RTL8390_LED_SET_2_3_CTRL));
 431                 debugfs_create_x32("led_set_0_1", 0644, led_dir,
 432                                 (u32 *)(RTL838X_SW_BASE + RTL8390_LED_SET_0_1_CTRL));
 433                 for (p = 0; p < 4; p++) {
 434                         snprintf(port_led_name, sizeof(port_led_name), "led_copr_set_sel.%1d", p);
 435                         debugfs_create_x32(port_led_name, 0644, led_dir,
 436                                 (u32 *)(RTL838X_SW_BASE + RTL8390_LED_COPR_SET_SEL_CTRL(p << 4)));
 437                         snprintf(port_led_name, sizeof(port_led_name), "led_fib_set_sel.%1d", p);
 438                         debugfs_create_x32(port_led_name, 0644, led_dir,
 439                                 (u32 *)(RTL838X_SW_BASE + RTL8390_LED_FIB_SET_SEL_CTRL(p << 4)));
 440                 }
 441                 debugfs_create_x32("led_copr_pmask_ctrl_0", 0644, led_dir,
 442                                 (u32 *)(RTL838X_SW_BASE + RTL8390_LED_COPR_PMASK_CTRL(0)));
 443                 debugfs_create_x32("led_copr_pmask_ctrl_1", 0644, led_dir,
 444                                 (u32 *)(RTL838X_SW_BASE + RTL8390_LED_COPR_PMASK_CTRL(32)));
 445                 debugfs_create_x32("led_fib_pmask_ctrl_0", 0644, led_dir,
 446                                 (u32 *)(RTL838X_SW_BASE + RTL8390_LED_FIB_PMASK_CTRL(0)));
 447                 debugfs_create_x32("led_fib_pmask_ctrl_1", 0644, led_dir,
 448                                 (u32 *)(RTL838X_SW_BASE + RTL8390_LED_FIB_PMASK_CTRL(32)));
 449                 debugfs_create_x32("led_combo_ctrl_0", 0644, led_dir,
 450                                 (u32 *)(RTL838X_SW_BASE + RTL8390_LED_COMBO_CTRL(0)));
 451                 debugfs_create_x32("led_combo_ctrl_1", 0644, led_dir,
 452                                 (u32 *)(RTL838X_SW_BASE + RTL8390_LED_COMBO_CTRL(32)));
 453                 debugfs_create_x32("led_sw_ctrl", 0644, led_dir,
 454                                 (u32 *)(RTL838X_SW_BASE + RTL8390_LED_SW_CTRL));
 455                 for (p = 0; p < 5; p++) {
 456                         snprintf(port_led_name, sizeof(port_led_name), "led_sw_p_en_ctrl.%1d", p);
 457                         debugfs_create_x32(port_led_name, 0644, led_dir,
 458                                 (u32 *)(RTL838X_SW_BASE + RTL8390_LED_SW_P_EN_CTRL(p * 10)));
 459                 }
 460                 for (p = 0; p < 28; p++) {
 461                         snprintf(port_led_name, sizeof(port_led_name), "led_sw_p_ctrl.%02d", p);
 462                         debugfs_create_x32(port_led_name, 0644, led_dir,
 463                                 (u32 *)(RTL838X_SW_BASE + RTL8390_LED_SW_P_CTRL(p)));
 464                 }
 465         }
 466         return 0;
 467 }
 468
 469 void rtl838x_dbgfs_init(struct rtl838x_switch_priv *priv)
 470 {
 471         struct dentry *rtl838x_dir;
 472         struct dentry *port_dir;
 473         struct dentry *mirror_dir;
 474         struct debugfs_regset32 *port_ctrl_regset;
 475         int ret, i;
 476         char lag_name[10];
 477         char mirror_name[10];
 478
 479         pr_info("%s called\n", __func__);
 480         rtl838x_dir = debugfs_lookup(RTL838X_DRIVER_NAME, NULL);
 481         if (!rtl838x_dir)
 482                 rtl838x_dir = debugfs_create_dir(RTL838X_DRIVER_NAME, NULL);
 483
 484         priv->dbgfs_dir = rtl838x_dir;
 485
 486         debugfs_create_u32("soc", 0444, rtl838x_dir,
 487                            (u32 *)(RTL838X_SW_BASE + RTL838X_MODEL_NAME_INFO));
 488
 489         /* Create one directory per port */
 490         for (i = 0; i < priv->cpu_port; i++) {
 491                 if (priv->ports[i].phy) {
 492                         ret = rtl838x_dbgfs_port_init(rtl838x_dir, priv, i);
 493                         if (ret)
 494                                 goto err;
 495                 }
 496         }
 497
 498         /* Create directory for CPU-port */
 499         port_dir = debugfs_create_dir("cpu_port", rtl838x_dir);
 500         port_ctrl_regset = devm_kzalloc(priv->dev, sizeof(*port_ctrl_regset), GFP_KERNEL);
 501         if (!port_ctrl_regset) {
 502                 ret = -ENOMEM;
 503                 goto err;
 504         }
 505
 506         port_ctrl_regset->regs = port_ctrl_regs;
 507         port_ctrl_regset->nregs = ARRAY_SIZE(port_ctrl_regs);
 508         port_ctrl_regset->base = (void *)(RTL838X_SW_BASE + (priv->cpu_port << 2));
 509         debugfs_create_regset32("port_ctrl", 0400, port_dir, port_ctrl_regset);
 510         debugfs_create_u8("id", 0444, port_dir, &priv->cpu_port);
 511
 512         /* Create entries for LAGs */
 513         for (i = 0; i < priv->n_lags; i++) {
 514                 snprintf(lag_name, sizeof(lag_name), "lag.%02d", i);
 515                 if (priv->family_id == RTL8380_FAMILY_ID)
 516                         debugfs_create_x32(lag_name, 0644, rtl838x_dir,
 517                                 (u32 *)(RTL838X_SW_BASE + priv->r->trk_mbr_ctr(i)));
 518                 else
 519                         debugfs_create_x64(lag_name, 0644, rtl838x_dir,
 520                                 (u64 *)(RTL838X_SW_BASE + priv->r->trk_mbr_ctr(i)));
 521         }
 522
 523         /* Create directories for mirror groups */
 524         for (i = 0; i < 4; i++) {
 525                 snprintf(mirror_name, sizeof(mirror_name), "mirror.%1d", i);
 526                 mirror_dir = debugfs_create_dir(mirror_name, rtl838x_dir);
 527                 if (priv->family_id == RTL8380_FAMILY_ID) {
 528                         debugfs_create_x32("ctrl", 0644, mirror_dir,
 529                                 (u32 *)(RTL838X_SW_BASE + RTL838X_MIR_CTRL + i * 4));
 530                         debugfs_create_x32("ingress_pm", 0644, mirror_dir,
 531                                 (u32 *)(RTL838X_SW_BASE + priv->r->mir_spm + i * 4));
 532                         debugfs_create_x32("egress_pm", 0644, mirror_dir,
 533                                 (u32 *)(RTL838X_SW_BASE + priv->r->mir_dpm + i * 4));
 534                         debugfs_create_x32("qid", 0644, mirror_dir,
 535                                 (u32 *)(RTL838X_SW_BASE + RTL838X_MIR_QID_CTRL(i)));
 536                         debugfs_create_x32("rspan_vlan", 0644, mirror_dir,
 537                                 (u32 *)(RTL838X_SW_BASE + RTL838X_MIR_RSPAN_VLAN_CTRL(i)));
 538                         debugfs_create_x32("rspan_vlan_mac", 0644, mirror_dir,
 539                                 (u32 *)(RTL838X_SW_BASE + RTL838X_MIR_RSPAN_VLAN_CTRL_MAC(i)));
 540                         debugfs_create_x32("rspan_tx", 0644, mirror_dir,
 541                                 (u32 *)(RTL838X_SW_BASE + RTL838X_MIR_RSPAN_TX_CTRL));
 542                         debugfs_create_x32("rspan_tx_tag_rm", 0644, mirror_dir,
 543                                 (u32 *)(RTL838X_SW_BASE + RTL838X_MIR_RSPAN_TX_TAG_RM_CTRL));
 544                         debugfs_create_x32("rspan_tx_tag_en", 0644, mirror_dir,
 545                                 (u32 *)(RTL838X_SW_BASE + RTL838X_MIR_RSPAN_TX_TAG_EN_CTRL));
 546                 } else {
 547                         debugfs_create_x32("ctrl", 0644, mirror_dir,
 548                                 (u32 *)(RTL838X_SW_BASE + RTL839X_MIR_CTRL + i * 4));
 549                         debugfs_create_x64("ingress_pm", 0644, mirror_dir,
 550                                 (u64 *)(RTL838X_SW_BASE + priv->r->mir_spm + i * 8));
 551                         debugfs_create_x64("egress_pm", 0644, mirror_dir,
 552                                 (u64 *)(RTL838X_SW_BASE + priv->r->mir_dpm + i * 8));
 553                         debugfs_create_x32("rspan_vlan", 0644, mirror_dir,
 554                                 (u32 *)(RTL838X_SW_BASE + RTL839X_MIR_RSPAN_VLAN_CTRL(i)));
 555                         debugfs_create_x32("rspan_tx", 0644, mirror_dir,
 556                                 (u32 *)(RTL838X_SW_BASE + RTL839X_MIR_RSPAN_TX_CTRL));
 557                         debugfs_create_x32("rspan_tx_tag_rm", 0644, mirror_dir,
 558                                 (u32 *)(RTL838X_SW_BASE + RTL839X_MIR_RSPAN_TX_TAG_RM_CTRL));
 559                         debugfs_create_x32("rspan_tx_tag_en", 0644, mirror_dir,
 560                                 (u32 *)(RTL838X_SW_BASE + RTL839X_MIR_RSPAN_TX_TAG_EN_CTRL));
 561                         debugfs_create_x64("sample_rate", 0644, mirror_dir,
 562                                 (u64 *)(RTL838X_SW_BASE + RTL839X_MIR_SAMPLE_RATE_CTRL));
 563                 }
 564         }
 565
 566         if (priv->family_id == RTL8380_FAMILY_ID)
 567                 debugfs_create_x32("bpdu_flood_mask", 0644, rtl838x_dir,
 568                                 (u32 *)(RTL838X_SW_BASE + priv->r->rma_bpdu_fld_pmask));
 569         else
 570                 debugfs_create_x64("bpdu_flood_mask", 0644, rtl838x_dir,
 571                                 (u64 *)(RTL838X_SW_BASE + priv->r->rma_bpdu_fld_pmask));
 572
 573         if (priv->family_id == RTL8380_FAMILY_ID)
 574                 debugfs_create_x32("vlan_ctrl", 0644, rtl838x_dir,
 575                                 (u32 *)(RTL838X_SW_BASE + RTL838X_VLAN_CTRL));
 576         else
 577                 debugfs_create_x32("vlan_ctrl", 0644, rtl838x_dir,
 578                                 (u32 *)(RTL838X_SW_BASE + RTL839X_VLAN_CTRL));
 579
 580         ret = rtl838x_dbgfs_leds(rtl838x_dir, priv);
 581         if (ret)
 582                 goto err;
 583
 584         debugfs_create_file("drop_counters", 0400, rtl838x_dir, priv, &drop_counter_fops);
 585
 586         return;
 587 err:
 588         rtl838x_dbgfs_cleanup(priv);
 589 }
 590
 591 void rtl930x_dbgfs_init(struct rtl838x_switch_priv *priv)
 592 {
 593         struct dentry *dbg_dir;
 594
 595         pr_info("%s called\n", __func__);
 596         dbg_dir = debugfs_lookup(RTL838X_DRIVER_NAME, NULL);
 597         if (!dbg_dir)
 598                 dbg_dir = debugfs_create_dir(RTL838X_DRIVER_NAME, NULL);
 599
 600         priv->dbgfs_dir = dbg_dir;
 601
 602         debugfs_create_file("drop_counters", 0400, dbg_dir, priv, &drop_counter_fops);
 603 }