1 // SPDX-License-Identifier: GPL-2.0-only
3 #include <linux/of_mdio.h>
4 #include <linux/of_platform.h>
6 #include <net/nexthop.h>
7 #include <net/neighbour.h>
8 #include <net/netevent.h>
9 #include <linux/inetdevice.h>
10 #include <linux/rhashtable.h>
11 #include <linux/of_net.h>
12 #include <asm/mach-rtl838x/mach-rtl83xx.h>
16 extern struct rtl83xx_soc_info soc_info
;
18 extern const struct rtl838x_reg rtl838x_reg
;
19 extern const struct rtl838x_reg rtl839x_reg
;
20 extern const struct rtl838x_reg rtl930x_reg
;
21 extern const struct rtl838x_reg rtl931x_reg
;
23 extern const struct dsa_switch_ops rtl83xx_switch_ops
;
24 extern const struct dsa_switch_ops rtl930x_switch_ops
;
26 DEFINE_MUTEX(smi_lock
);
28 int rtl83xx_port_get_stp_state(struct rtl838x_switch_priv
*priv
, int port
)
34 int n
= priv
->port_width
<< 1;
36 /* Ports above or equal CPU port can never be configured */
37 if (port
>= priv
->cpu_port
)
40 mutex_lock(&priv
->reg_mutex
);
42 /* For the RTL839x and following, the bits are left-aligned in the 64/128 bit field */
43 if (priv
->family_id
== RTL8390_FAMILY_ID
)
45 if (priv
->family_id
== RTL9300_FAMILY_ID
)
47 if (priv
->family_id
== RTL9310_FAMILY_ID
)
50 index
= n
- (pos
>> 4) - 1;
51 bit
= (pos
<< 1) % 32;
53 priv
->r
->stp_get(priv
, msti
, port_state
);
55 mutex_unlock(&priv
->reg_mutex
);
57 return (port_state
[index
] >> bit
) & 3;
60 static struct table_reg rtl838x_tbl_regs
[] = {
61 TBL_DESC(0x6900, 0x6908, 3, 15, 13, 1), /* RTL8380_TBL_L2 */
62 TBL_DESC(0x6914, 0x6918, 18, 14, 12, 1), /* RTL8380_TBL_0 */
63 TBL_DESC(0xA4C8, 0xA4CC, 6, 14, 12, 1), /* RTL8380_TBL_1 */
65 TBL_DESC(0x1180, 0x1184, 3, 16, 14, 0), /* RTL8390_TBL_L2 */
66 TBL_DESC(0x1190, 0x1194, 17, 15, 12, 0), /* RTL8390_TBL_0 */
67 TBL_DESC(0x6B80, 0x6B84, 4, 14, 12, 0), /* RTL8390_TBL_1 */
68 TBL_DESC(0x611C, 0x6120, 9, 8, 6, 0), /* RTL8390_TBL_2 */
70 TBL_DESC(0xB320, 0xB334, 3, 18, 16, 0), /* RTL9300_TBL_L2 */
71 TBL_DESC(0xB340, 0xB344, 19, 16, 12, 0), /* RTL9300_TBL_0 */
72 TBL_DESC(0xB3A0, 0xB3A4, 20, 16, 13, 0), /* RTL9300_TBL_1 */
73 TBL_DESC(0xCE04, 0xCE08, 6, 14, 12, 0), /* RTL9300_TBL_2 */
74 TBL_DESC(0xD600, 0xD604, 30, 7, 6, 0), /* RTL9300_TBL_HSB */
75 TBL_DESC(0x7880, 0x7884, 22, 9, 8, 0), /* RTL9300_TBL_HSA */
77 TBL_DESC(0x8500, 0x8508, 8, 19, 15, 0), /* RTL9310_TBL_0 */
78 TBL_DESC(0x40C0, 0x40C4, 22, 16, 14, 0), /* RTL9310_TBL_1 */
79 TBL_DESC(0x8528, 0x852C, 6, 18, 14, 0), /* RTL9310_TBL_2 */
80 TBL_DESC(0x0200, 0x0204, 9, 15, 12, 0), /* RTL9310_TBL_3 */
81 TBL_DESC(0x20dc, 0x20e0, 29, 7, 6, 0), /* RTL9310_TBL_4 */
82 TBL_DESC(0x7e1c, 0x7e20, 53, 8, 6, 0), /* RTL9310_TBL_5 */
85 void rtl_table_init(void)
87 for (int i
= 0; i
< RTL_TBL_END
; i
++)
88 mutex_init(&rtl838x_tbl_regs
[i
].lock
);
91 /* Request access to table t in table access register r
92 * Returns a handle to a lock for that table
94 struct table_reg
*rtl_table_get(rtl838x_tbl_reg_t r
, int t
)
99 if (t
>= BIT(rtl838x_tbl_regs
[r
].c_bit
-rtl838x_tbl_regs
[r
].t_bit
))
102 mutex_lock(&rtl838x_tbl_regs
[r
].lock
);
103 rtl838x_tbl_regs
[r
].tbl
= t
;
105 return &rtl838x_tbl_regs
[r
];
108 /* Release a table r, unlock the corresponding lock */
109 void rtl_table_release(struct table_reg
*r
)
114 /* pr_info("Unlocking %08x\n", (u32)r); */
115 mutex_unlock(&r
->lock
);
116 /* pr_info("Unlock done\n"); */
119 static int rtl_table_exec(struct table_reg
*r
, bool is_write
, int idx
)
124 /* Read/write bit has inverted meaning on RTL838x */
126 cmd
= is_write
? 0 : BIT(r
->c_bit
);
128 cmd
= is_write
? BIT(r
->c_bit
) : 0;
130 cmd
|= BIT(r
->c_bit
+ 1); /* Execute bit */
131 cmd
|= r
->tbl
<< r
->t_bit
; /* Table type */
132 cmd
|= idx
& (BIT(r
->t_bit
) - 1); /* Index */
134 sw_w32(cmd
, r
->addr
);
136 ret
= readx_poll_timeout(sw_r32
, r
->addr
, val
,
137 !(val
& BIT(r
->c_bit
+ 1)), 20, 10000);
139 pr_err("%s: timeout\n", __func__
);
144 /* Reads table index idx into the data registers of the table */
145 int rtl_table_read(struct table_reg
*r
, int idx
)
147 return rtl_table_exec(r
, false, idx
);
150 /* Writes the content of the table data registers into the table at index idx */
151 int rtl_table_write(struct table_reg
*r
, int idx
)
153 return rtl_table_exec(r
, true, idx
);
156 /* Returns the address of the ith data register of table register r
157 * the address is relative to the beginning of the Switch-IO block at 0xbb000000
159 inline u16
rtl_table_data(struct table_reg
*r
, int i
)
161 if (i
>= r
->max_data
)
163 return r
->data
+ i
* 4;
166 inline u32
rtl_table_data_r(struct table_reg
*r
, int i
)
168 return sw_r32(rtl_table_data(r
, i
));
171 inline void rtl_table_data_w(struct table_reg
*r
, u32 v
, int i
)
173 sw_w32(v
, rtl_table_data(r
, i
));
176 /* Port register accessor functions for the RTL838x and RTL930X SoCs */
177 void rtl838x_mask_port_reg(u64 clear
, u64 set
, int reg
)
179 sw_w32_mask((u32
)clear
, (u32
)set
, reg
);
182 void rtl838x_set_port_reg(u64 set
, int reg
)
184 sw_w32((u32
)set
, reg
);
187 u64
rtl838x_get_port_reg(int reg
)
189 return ((u64
)sw_r32(reg
));
192 /* Port register accessor functions for the RTL839x and RTL931X SoCs */
193 void rtl839x_mask_port_reg_be(u64 clear
, u64 set
, int reg
)
195 sw_w32_mask((u32
)(clear
>> 32), (u32
)(set
>> 32), reg
);
196 sw_w32_mask((u32
)(clear
& 0xffffffff), (u32
)(set
& 0xffffffff), reg
+ 4);
199 u64
rtl839x_get_port_reg_be(int reg
)
204 v
|= sw_r32(reg
+ 4);
209 void rtl839x_set_port_reg_be(u64 set
, int reg
)
211 sw_w32(set
>> 32, reg
);
212 sw_w32(set
& 0xffffffff, reg
+ 4);
215 void rtl839x_mask_port_reg_le(u64 clear
, u64 set
, int reg
)
217 sw_w32_mask((u32
)clear
, (u32
)set
, reg
);
218 sw_w32_mask((u32
)(clear
>> 32), (u32
)(set
>> 32), reg
+ 4);
221 void rtl839x_set_port_reg_le(u64 set
, int reg
)
224 sw_w32(set
>> 32, reg
+ 4);
227 u64
rtl839x_get_port_reg_le(int reg
)
229 u64 v
= sw_r32(reg
+ 4);
237 int read_phy(u32 port
, u32 page
, u32 reg
, u32
*val
)
239 switch (soc_info
.family
) {
240 case RTL8380_FAMILY_ID
:
241 return rtl838x_read_phy(port
, page
, reg
, val
);
242 case RTL8390_FAMILY_ID
:
243 return rtl839x_read_phy(port
, page
, reg
, val
);
244 case RTL9300_FAMILY_ID
:
245 return rtl930x_read_phy(port
, page
, reg
, val
);
246 case RTL9310_FAMILY_ID
:
247 return rtl931x_read_phy(port
, page
, reg
, val
);
253 int write_phy(u32 port
, u32 page
, u32 reg
, u32 val
)
255 switch (soc_info
.family
) {
256 case RTL8380_FAMILY_ID
:
257 return rtl838x_write_phy(port
, page
, reg
, val
);
258 case RTL8390_FAMILY_ID
:
259 return rtl839x_write_phy(port
, page
, reg
, val
);
260 case RTL9300_FAMILY_ID
:
261 return rtl930x_write_phy(port
, page
, reg
, val
);
262 case RTL9310_FAMILY_ID
:
263 return rtl931x_write_phy(port
, page
, reg
, val
);
269 static int __init
rtl83xx_mdio_probe(struct rtl838x_switch_priv
*priv
)
271 struct device
*dev
= priv
->dev
;
272 struct device_node
*dn
, *phy_node
, *mii_np
= dev
->of_node
;
277 pr_debug("In %s\n", __func__
);
278 mii_np
= of_find_compatible_node(NULL
, NULL
, "realtek,rtl838x-mdio");
280 pr_debug("Found compatible MDIO node!\n");
282 dev_err(priv
->dev
, "no %s child node found", "mdio-bus");
286 priv
->mii_bus
= of_mdio_find_bus(mii_np
);
287 if (!priv
->mii_bus
) {
288 pr_debug("Deferring probe of mdio bus\n");
289 return -EPROBE_DEFER
;
291 if (!of_device_is_available(mii_np
))
294 bus
= devm_mdiobus_alloc(priv
->ds
->dev
);
298 bus
->name
= "rtl838x slave mii";
300 /* Since the NIC driver is loaded first, we can use the mdio rw functions
303 bus
->read
= priv
->mii_bus
->read
;
304 bus
->write
= priv
->mii_bus
->write
;
305 bus
->read_paged
= priv
->mii_bus
->read_paged
;
306 bus
->write_paged
= priv
->mii_bus
->write_paged
;
307 snprintf(bus
->id
, MII_BUS_ID_SIZE
, "%s-%d", bus
->name
, dev
->id
);
310 priv
->ds
->slave_mii_bus
= bus
;
311 priv
->ds
->slave_mii_bus
->priv
= priv
->mii_bus
->priv
;
312 priv
->ds
->slave_mii_bus
->access_capabilities
= priv
->mii_bus
->access_capabilities
;
314 ret
= mdiobus_register(priv
->ds
->slave_mii_bus
);
320 dn
= of_find_compatible_node(NULL
, NULL
, "realtek,rtl83xx-switch");
322 dev_err(priv
->dev
, "No RTL switch node in DTS\n");
326 for_each_node_by_name(dn
, "port") {
327 phy_interface_t interface
;
330 if (!of_device_is_available(dn
))
333 if (of_property_read_u32(dn
, "reg", &pn
))
336 phy_node
= of_parse_phandle(dn
, "phy-handle", 0);
338 if (pn
!= priv
->cpu_port
)
339 dev_err(priv
->dev
, "Port node %d misses phy-handle\n", pn
);
343 if (of_property_read_u32(phy_node
, "sds", &priv
->ports
[pn
].sds_num
))
344 priv
->ports
[pn
].sds_num
= -1;
345 pr_debug("%s port %d has SDS %d\n", __func__
, pn
, priv
->ports
[pn
].sds_num
);
347 if (of_get_phy_mode(dn
, &interface
))
348 interface
= PHY_INTERFACE_MODE_NA
;
349 if (interface
== PHY_INTERFACE_MODE_HSGMII
)
350 priv
->ports
[pn
].is2G5
= true;
351 if (interface
== PHY_INTERFACE_MODE_USXGMII
)
352 priv
->ports
[pn
].is2G5
= priv
->ports
[pn
].is10G
= true;
353 if (interface
== PHY_INTERFACE_MODE_10GBASER
)
354 priv
->ports
[pn
].is10G
= true;
356 if (of_property_read_u32(dn
, "led-set", &led_set
))
358 priv
->ports
[pn
].led_set
= led_set
;
360 /* Check for the integrated SerDes of the RTL8380M first */
361 if (of_property_read_bool(phy_node
, "phy-is-integrated")
362 && priv
->id
== 0x8380 && pn
>= 24) {
363 pr_debug("----> FÓUND A SERDES\n");
364 priv
->ports
[pn
].phy
= PHY_RTL838X_SDS
;
368 if (priv
->id
>= 0x9300) {
369 priv
->ports
[pn
].phy_is_integrated
= false;
370 if (of_property_read_bool(phy_node
, "phy-is-integrated")) {
371 priv
->ports
[pn
].phy_is_integrated
= true;
372 priv
->ports
[pn
].phy
= PHY_RTL930X_SDS
;
375 if (of_property_read_bool(phy_node
, "phy-is-integrated") &&
376 !of_property_read_bool(phy_node
, "sfp")) {
377 priv
->ports
[pn
].phy
= PHY_RTL8218B_INT
;
382 if (!of_property_read_bool(phy_node
, "phy-is-integrated") &&
383 of_property_read_bool(phy_node
, "sfp")) {
384 priv
->ports
[pn
].phy
= PHY_RTL8214FC
;
388 if (!of_property_read_bool(phy_node
, "phy-is-integrated") &&
389 !of_property_read_bool(phy_node
, "sfp")) {
390 priv
->ports
[pn
].phy
= PHY_RTL8218B_EXT
;
395 /* Disable MAC polling the PHY so that we can start configuration */
396 priv
->r
->set_port_reg_le(0ULL, priv
->r
->smi_poll_ctrl
);
398 /* Enable PHY control via SoC */
399 if (priv
->family_id
== RTL8380_FAMILY_ID
) {
400 /* Enable SerDes NWAY and PHY control via SoC */
401 sw_w32_mask(BIT(7), BIT(15), RTL838X_SMI_GLB_CTRL
);
402 } else if (priv
->family_id
== RTL8390_FAMILY_ID
) {
403 /* Disable PHY polling via SoC */
404 sw_w32_mask(BIT(7), 0, RTL839X_SMI_GLB_CTRL
);
407 /* Power on fibre ports and reset them if necessary */
408 if (priv
->ports
[24].phy
== PHY_RTL838X_SDS
) {
409 pr_debug("Powering on fibre ports & reset\n");
410 rtl8380_sds_power(24, 1);
411 rtl8380_sds_power(26, 1);
414 pr_debug("%s done\n", __func__
);
419 static int __init
rtl83xx_get_l2aging(struct rtl838x_switch_priv
*priv
)
421 int t
= sw_r32(priv
->r
->l2_ctrl_1
);
423 t
&= priv
->family_id
== RTL8380_FAMILY_ID
? 0x7fffff : 0x1FFFFF;
425 if (priv
->family_id
== RTL8380_FAMILY_ID
)
426 t
= t
* 128 / 625; /* Aging time in seconds. 0: L2 aging disabled */
430 pr_debug("L2 AGING time: %d sec\n", t
);
431 pr_debug("Dynamic aging for ports: %x\n", sw_r32(priv
->r
->l2_port_aging_out
));
436 /* Caller must hold priv->reg_mutex */
437 int rtl83xx_lag_add(struct dsa_switch
*ds
, int group
, int port
, struct netdev_lag_upper_info
*info
)
439 struct rtl838x_switch_priv
*priv
= ds
->priv
;
444 if (info
->tx_type
!= NETDEV_LAG_TX_TYPE_HASH
) {
445 pr_err("%s: Only mode LACP 802.3ad (4) allowed.\n", __func__
);
449 if (group
>= priv
->n_lags
) {
450 pr_err("%s: LAG %d invalid.\n", __func__
, group
);
454 if (port
>= priv
->cpu_port
) {
455 pr_err("%s: Port %d invalid.\n", __func__
, port
);
459 for (i
= 0; i
< priv
->n_lags
; i
++) {
460 if (priv
->lags_port_members
[i
] & BIT_ULL(port
))
463 if (i
!= priv
->n_lags
) {
464 pr_err("%s: Port %d already member of LAG %d.\n", __func__
, port
, i
);
468 switch(info
->hash_type
) {
469 case NETDEV_LAG_HASH_L2
:
470 algomsk
|= TRUNK_DISTRIBUTION_ALGO_DMAC_BIT
;
471 algomsk
|= TRUNK_DISTRIBUTION_ALGO_SMAC_BIT
;
473 case NETDEV_LAG_HASH_L23
:
474 algomsk
|= TRUNK_DISTRIBUTION_ALGO_DMAC_BIT
;
475 algomsk
|= TRUNK_DISTRIBUTION_ALGO_SMAC_BIT
;
476 algomsk
|= TRUNK_DISTRIBUTION_ALGO_SIP_BIT
; /* source ip */
477 algomsk
|= TRUNK_DISTRIBUTION_ALGO_DIP_BIT
; /* dest ip */
480 case NETDEV_LAG_HASH_L34
:
481 algomsk
|= TRUNK_DISTRIBUTION_ALGO_SRC_L4PORT_BIT
; /* sport */
482 algomsk
|= TRUNK_DISTRIBUTION_ALGO_DST_L4PORT_BIT
; /* dport */
483 algomsk
|= TRUNK_DISTRIBUTION_ALGO_SIP_BIT
; /* source ip */
484 algomsk
|= TRUNK_DISTRIBUTION_ALGO_DIP_BIT
; /* dest ip */
490 priv
->r
->set_distribution_algorithm(group
, algoidx
, algomsk
);
491 priv
->r
->mask_port_reg_be(0, BIT_ULL(port
), priv
->r
->trk_mbr_ctr(group
));
492 priv
->lags_port_members
[group
] |= BIT_ULL(port
);
494 pr_info("%s: Added port %d to LAG %d. Members now %016llx.\n",
495 __func__
, port
, group
, priv
->lags_port_members
[group
]);
500 /* Caller must hold priv->reg_mutex */
501 int rtl83xx_lag_del(struct dsa_switch
*ds
, int group
, int port
)
503 struct rtl838x_switch_priv
*priv
= ds
->priv
;
505 if (group
>= priv
->n_lags
) {
506 pr_err("%s: LAG %d invalid.\n", __func__
, group
);
510 if (port
>= priv
->cpu_port
) {
511 pr_err("%s: Port %d invalid.\n", __func__
, port
);
515 if (!(priv
->lags_port_members
[group
] & BIT_ULL(port
))) {
516 pr_err("%s: Port %d not member of LAG %d.\n", __func__
, port
, group
);
520 /* 0x7f algo mask all */
521 priv
->r
->mask_port_reg_be(BIT_ULL(port
), 0, priv
->r
->trk_mbr_ctr(group
));
522 priv
->lags_port_members
[group
] &= ~BIT_ULL(port
);
524 pr_info("%s: Removed port %d from LAG %d. Members now %016llx.\n",
525 __func__
, port
, group
, priv
->lags_port_members
[group
]);
530 /* Allocate a 64 bit octet counter located in the LOG HW table */
531 static int rtl83xx_octet_cntr_alloc(struct rtl838x_switch_priv
*priv
)
535 mutex_lock(&priv
->reg_mutex
);
537 idx
= find_first_zero_bit(priv
->octet_cntr_use_bm
, MAX_COUNTERS
);
538 if (idx
>= priv
->n_counters
) {
539 mutex_unlock(&priv
->reg_mutex
);
543 set_bit(idx
, priv
->octet_cntr_use_bm
);
544 mutex_unlock(&priv
->reg_mutex
);
549 /* Allocate a 32-bit packet counter
550 * 2 32-bit packet counters share the location of a 64-bit octet counter
551 * Initially there are no free packet counters and 2 new ones need to be freed
552 * by allocating the corresponding octet counter
554 int rtl83xx_packet_cntr_alloc(struct rtl838x_switch_priv
*priv
)
558 mutex_lock(&priv
->reg_mutex
);
560 /* Because initially no packet counters are free, the logic is reversed:
561 * a 0-bit means the counter is already allocated (for octets)
563 idx
= find_first_bit(priv
->packet_cntr_use_bm
, MAX_COUNTERS
* 2);
564 if (idx
>= priv
->n_counters
* 2) {
565 j
= find_first_zero_bit(priv
->octet_cntr_use_bm
, MAX_COUNTERS
);
566 if (j
>= priv
->n_counters
) {
567 mutex_unlock(&priv
->reg_mutex
);
570 set_bit(j
, priv
->octet_cntr_use_bm
);
572 set_bit(j
* 2 + 1, priv
->packet_cntr_use_bm
);
575 clear_bit(idx
, priv
->packet_cntr_use_bm
);
578 mutex_unlock(&priv
->reg_mutex
);
583 /* Add an L2 nexthop entry for the L3 routing system / PIE forwarding in the SoC
584 * Use VID and MAC in rtl838x_l2_entry to identify either a free slot in the L2 hash table
585 * or mark an existing entry as a nexthop by setting it's nexthop bit
586 * Called from the L3 layer
587 * The index in the L2 hash table is filled into nh->l2_id;
589 int rtl83xx_l2_nexthop_add(struct rtl838x_switch_priv
*priv
, struct rtl83xx_nexthop
*nh
)
591 struct rtl838x_l2_entry e
;
592 u64 seed
= priv
->r
->l2_hash_seed(nh
->mac
, nh
->rvid
);
593 u32 key
= priv
->r
->l2_hash_key(priv
, seed
);
597 pr_debug("%s searching for %08llx vid %d with key %d, seed: %016llx\n",
598 __func__
, nh
->mac
, nh
->rvid
, key
, seed
);
601 u64_to_ether_addr(nh
->mac
, &e
.mac
[0]);
604 /* Loop over all entries in the hash-bucket and over the second block on 93xx SoCs */
605 for (int i
= 0; i
< priv
->l2_bucket_size
; i
++) {
606 entry
= priv
->r
->read_l2_entry_using_hash(key
, i
, &e
);
608 if (!e
.valid
|| ((entry
& 0x0fffffffffffffffULL
) == seed
)) {
609 idx
= i
> 3 ? ((key
>> 14) & 0xffff) | i
>> 1
610 : ((key
<< 2) | i
) & 0xffff;
616 pr_err("%s: No more L2 forwarding entries available\n", __func__
);
620 /* Found an existing (e->valid is true) or empty entry, make it a nexthop entry */
624 nh
->vid
= e
.vid
; /* Save VID */
626 nh
->dev_id
= e
.stack_dev
;
627 /* If the entry is already a valid next hop entry, don't change it */
635 e
.is_ipv6_mc
= false;
639 e
.age
= 0; /* With port-ignore */
640 e
.port
= priv
->port_ignore
;
641 u64_to_ether_addr(nh
->mac
, &e
.mac
[0]);
644 e
.nh_route_id
= nh
->id
; /* NH route ID takes place of VID */
645 e
.nh_vlan_target
= false;
647 priv
->r
->write_l2_entry_using_hash(idx
>> 2, idx
& 0x3, &e
);
652 /* Removes a Layer 2 next hop entry in the forwarding database
653 * If it was static, the entire entry is removed, otherwise the nexthop bit is cleared
654 * and we wait until the entry ages out
656 int rtl83xx_l2_nexthop_rm(struct rtl838x_switch_priv
*priv
, struct rtl83xx_nexthop
*nh
)
658 struct rtl838x_l2_entry e
;
659 u32 key
= nh
->l2_id
>> 2;
660 int i
= nh
->l2_id
& 0x3;
661 u64 entry
= entry
= priv
->r
->read_l2_entry_using_hash(key
, i
, &e
);
663 pr_debug("%s: id %d, key %d, index %d\n", __func__
, nh
->l2_id
, key
, i
);
665 dev_err(priv
->dev
, "unknown nexthop, id %x\n", nh
->l2_id
);
672 e
.vid
= nh
->vid
; /* Restore VID */
675 priv
->r
->write_l2_entry_using_hash(key
, i
, &e
);
680 static int rtl83xx_handle_changeupper(struct rtl838x_switch_priv
*priv
,
681 struct net_device
*ndev
,
682 struct netdev_notifier_changeupper_info
*info
)
684 struct net_device
*upper
= info
->upper_dev
;
685 struct netdev_lag_upper_info
*lag_upper_info
= NULL
;
688 if (!netif_is_lag_master(upper
))
691 mutex_lock(&priv
->reg_mutex
);
693 for (i
= 0; i
< priv
->n_lags
; i
++) {
694 if ((!priv
->lag_devs
[i
]) || (priv
->lag_devs
[i
] == upper
))
697 for (j
= 0; j
< priv
->cpu_port
; j
++) {
698 if (priv
->ports
[j
].dp
->slave
== ndev
)
701 if (j
>= priv
->cpu_port
) {
707 lag_upper_info
= info
->upper_info
;
708 if (!priv
->lag_devs
[i
])
709 priv
->lag_devs
[i
] = upper
;
710 err
= rtl83xx_lag_add(priv
->ds
, i
, priv
->ports
[j
].dp
->index
, lag_upper_info
);
716 if (!priv
->lag_devs
[i
])
718 err
= rtl83xx_lag_del(priv
->ds
, i
, priv
->ports
[j
].dp
->index
);
723 if (!priv
->lags_port_members
[i
])
724 priv
->lag_devs
[i
] = NULL
;
728 mutex_unlock(&priv
->reg_mutex
);
733 /* Is the lower network device a DSA slave network device of our RTL930X-switch?
734 * Unfortunately we cannot just follow dev->dsa_prt as this is only set for the
737 int rtl83xx_port_is_under(const struct net_device
* dev
, struct rtl838x_switch_priv
*priv
)
740 * if(!dsa_slave_dev_check(dev)) {
741 * netdev_info(dev, "%s: not a DSA device.\n", __func__);
746 for (int i
= 0; i
< priv
->cpu_port
; i
++) {
747 if (!priv
->ports
[i
].dp
)
749 if (priv
->ports
[i
].dp
->slave
== dev
)
756 static int rtl83xx_netdevice_event(struct notifier_block
*this,
757 unsigned long event
, void *ptr
)
759 struct net_device
*ndev
= netdev_notifier_info_to_dev(ptr
);
760 struct rtl838x_switch_priv
*priv
;
763 pr_debug("In: %s, event: %lu\n", __func__
, event
);
765 if ((event
!= NETDEV_CHANGEUPPER
) && (event
!= NETDEV_CHANGELOWERSTATE
))
768 priv
= container_of(this, struct rtl838x_switch_priv
, nb
);
770 case NETDEV_CHANGEUPPER
:
771 err
= rtl83xx_handle_changeupper(priv
, ndev
, ptr
);
781 const static struct rhashtable_params route_ht_params
= {
782 .key_len
= sizeof(u32
),
783 .key_offset
= offsetof(struct rtl83xx_route
, gw_ip
),
784 .head_offset
= offsetof(struct rtl83xx_route
, linkage
),
787 /* Updates an L3 next hop entry in the ROUTING table */
788 static int rtl83xx_l3_nexthop_update(struct rtl838x_switch_priv
*priv
, __be32 ip_addr
, u64 mac
)
790 struct rtl83xx_route
*r
;
791 struct rhlist_head
*tmp
, *list
;
794 list
= rhltable_lookup(&priv
->routes
, &ip_addr
, route_ht_params
);
800 rhl_for_each_entry_rcu(r
, tmp
, list
, linkage
) {
801 pr_info("%s: Setting up fwding: ip %pI4, GW mac %016llx\n",
802 __func__
, &ip_addr
, mac
);
804 /* Reads the ROUTING table entry associated with the route */
805 priv
->r
->route_read(r
->id
, r
);
806 pr_info("Route with id %d to %pI4 / %d\n", r
->id
, &r
->dst_ip
, r
->prefix_len
);
808 r
->nh
.mac
= r
->nh
.gw
= mac
;
809 r
->nh
.port
= priv
->port_ignore
;
812 /* Do we need to explicitly add a DMAC entry with the route's nh index? */
813 if (priv
->r
->set_l3_egress_mac
)
814 priv
->r
->set_l3_egress_mac(r
->id
, mac
);
816 /* Update ROUTING table: map gateway-mac and switch-mac id to route id */
817 rtl83xx_l2_nexthop_add(priv
, &r
->nh
);
819 r
->attr
.valid
= true;
820 r
->attr
.action
= ROUTE_ACT_FORWARD
;
822 r
->attr
.hit
= false; /* Reset route-used indicator */
824 /* Add PIE entry with dst_ip and prefix_len */
825 r
->pr
.dip
= r
->dst_ip
;
826 r
->pr
.dip_m
= inet_make_mask(r
->prefix_len
);
828 if (r
->is_host_route
) {
829 int slot
= priv
->r
->find_l3_slot(r
, false);
831 pr_info("%s: Got slot for route: %d\n", __func__
, slot
);
832 priv
->r
->host_route_write(slot
, r
);
834 priv
->r
->route_write(r
->id
, r
);
835 r
->pr
.fwd_sel
= true;
836 r
->pr
.fwd_data
= r
->nh
.l2_id
;
837 r
->pr
.fwd_act
= PIE_ACT_ROUTE_UC
;
840 if (priv
->r
->set_l3_nexthop
)
841 priv
->r
->set_l3_nexthop(r
->nh
.id
, r
->nh
.l2_id
, r
->nh
.if_id
);
844 r
->pr
.packet_cntr
= rtl83xx_packet_cntr_alloc(priv
);
845 if (r
->pr
.packet_cntr
>= 0) {
846 pr_info("Using packet counter %d\n", r
->pr
.packet_cntr
);
847 r
->pr
.log_sel
= true;
848 r
->pr
.log_data
= r
->pr
.packet_cntr
;
850 priv
->r
->pie_rule_add(priv
, &r
->pr
);
852 int pkts
= priv
->r
->packet_cntr_read(r
->pr
.packet_cntr
);
853 pr_info("%s: total packets: %d\n", __func__
, pkts
);
855 priv
->r
->pie_rule_write(priv
, r
->pr
.id
, &r
->pr
);
863 static int rtl83xx_port_ipv4_resolve(struct rtl838x_switch_priv
*priv
,
864 struct net_device
*dev
, __be32 ip_addr
)
866 struct neighbour
*n
= neigh_lookup(&arp_tbl
, &ip_addr
, dev
);
871 n
= neigh_create(&arp_tbl
, &ip_addr
, dev
);
876 /* If the neigh is already resolved, then go ahead and
877 * install the entry, otherwise start the ARP process to
880 if (n
->nud_state
& NUD_VALID
) {
881 mac
= ether_addr_to_u64(n
->ha
);
882 pr_info("%s: resolved mac: %016llx\n", __func__
, mac
);
883 rtl83xx_l3_nexthop_update(priv
, ip_addr
, mac
);
885 pr_info("%s: need to wait\n", __func__
);
886 neigh_event_send(n
, NULL
);
894 struct rtl83xx_walk_data
{
895 struct rtl838x_switch_priv
*priv
;
899 static int rtl83xx_port_lower_walk(struct net_device
*lower
, struct netdev_nested_priv
*_priv
)
901 struct rtl83xx_walk_data
*data
= (struct rtl83xx_walk_data
*)_priv
->data
;
902 struct rtl838x_switch_priv
*priv
= data
->priv
;
906 index
= rtl83xx_port_is_under(lower
, priv
);
909 pr_debug("Found DSA-port, index %d\n", index
);
916 int rtl83xx_port_dev_lower_find(struct net_device
*dev
, struct rtl838x_switch_priv
*priv
)
918 struct rtl83xx_walk_data data
;
919 struct netdev_nested_priv _priv
;
923 _priv
.data
= (void *)&data
;
925 netdev_walk_all_lower_dev(dev
, rtl83xx_port_lower_walk
, &_priv
);
930 static struct rtl83xx_route
*rtl83xx_route_alloc(struct rtl838x_switch_priv
*priv
, u32 ip
)
932 struct rtl83xx_route
*r
;
935 mutex_lock(&priv
->reg_mutex
);
937 idx
= find_first_zero_bit(priv
->route_use_bm
, MAX_ROUTES
);
938 pr_debug("%s id: %d, ip %pI4\n", __func__
, idx
, &ip
);
940 r
= kzalloc(sizeof(*r
), GFP_KERNEL
);
942 mutex_unlock(&priv
->reg_mutex
);
948 r
->pr
.id
= -1; /* We still need to allocate a rule in HW */
949 r
->is_host_route
= false;
951 err
= rhltable_insert(&priv
->routes
, &r
->linkage
, route_ht_params
);
953 pr_err("Could not insert new rule\n");
954 mutex_unlock(&priv
->reg_mutex
);
958 set_bit(idx
, priv
->route_use_bm
);
960 mutex_unlock(&priv
->reg_mutex
);
971 static struct rtl83xx_route
*rtl83xx_host_route_alloc(struct rtl838x_switch_priv
*priv
, u32 ip
)
973 struct rtl83xx_route
*r
;
976 mutex_lock(&priv
->reg_mutex
);
978 idx
= find_first_zero_bit(priv
->host_route_use_bm
, MAX_HOST_ROUTES
);
979 pr_debug("%s id: %d, ip %pI4\n", __func__
, idx
, &ip
);
981 r
= kzalloc(sizeof(*r
), GFP_KERNEL
);
983 mutex_unlock(&priv
->reg_mutex
);
987 /* We require a unique route ID irrespective of whether it is a prefix or host
988 * route (on RTL93xx) as we use this ID to associate a DMAC and next-hop entry
990 r
->id
= idx
+ MAX_ROUTES
;
993 r
->pr
.id
= -1; /* We still need to allocate a rule in HW */
994 r
->is_host_route
= true;
996 err
= rhltable_insert(&priv
->routes
, &r
->linkage
, route_ht_params
);
998 pr_err("Could not insert new rule\n");
999 mutex_unlock(&priv
->reg_mutex
);
1003 set_bit(idx
, priv
->host_route_use_bm
);
1005 mutex_unlock(&priv
->reg_mutex
);
1017 static void rtl83xx_route_rm(struct rtl838x_switch_priv
*priv
, struct rtl83xx_route
*r
)
1021 if (rhltable_remove(&priv
->routes
, &r
->linkage
, route_ht_params
))
1022 dev_warn(priv
->dev
, "Could not remove route\n");
1024 if (r
->is_host_route
) {
1025 id
= priv
->r
->find_l3_slot(r
, false);
1026 pr_debug("%s: Got id for host route: %d\n", __func__
, id
);
1027 r
->attr
.valid
= false;
1028 priv
->r
->host_route_write(id
, r
);
1029 clear_bit(r
->id
- MAX_ROUTES
, priv
->host_route_use_bm
);
1031 /* If there is a HW representation of the route, delete it */
1032 if (priv
->r
->route_lookup_hw
) {
1033 id
= priv
->r
->route_lookup_hw(r
);
1034 pr_info("%s: Got id for prefix route: %d\n", __func__
, id
);
1035 r
->attr
.valid
= false;
1036 priv
->r
->route_write(id
, r
);
1038 clear_bit(r
->id
, priv
->route_use_bm
);
1044 static int rtl83xx_fib4_del(struct rtl838x_switch_priv
*priv
,
1045 struct fib_entry_notifier_info
*info
)
1047 struct fib_nh
*nh
= fib_info_nh(info
->fi
, 0);
1048 struct rtl83xx_route
*r
;
1049 struct rhlist_head
*tmp
, *list
;
1051 pr_debug("In %s, ip %pI4, len %d\n", __func__
, &info
->dst
, info
->dst_len
);
1053 list
= rhltable_lookup(&priv
->routes
, &nh
->fib_nh_gw4
, route_ht_params
);
1056 pr_err("%s: no such gateway: %pI4\n", __func__
, &nh
->fib_nh_gw4
);
1059 rhl_for_each_entry_rcu(r
, tmp
, list
, linkage
) {
1060 if (r
->dst_ip
== info
->dst
&& r
->prefix_len
== info
->dst_len
) {
1061 pr_info("%s: found a route with id %d, nh-id %d\n",
1062 __func__
, r
->id
, r
->nh
.id
);
1068 rtl83xx_l2_nexthop_rm(priv
, &r
->nh
);
1070 pr_debug("%s: Releasing packet counter %d\n", __func__
, r
->pr
.packet_cntr
);
1071 set_bit(r
->pr
.packet_cntr
, priv
->packet_cntr_use_bm
);
1072 priv
->r
->pie_rule_rm(priv
, &r
->pr
);
1074 rtl83xx_route_rm(priv
, r
);
1076 nh
->fib_nh_flags
&= ~RTNH_F_OFFLOAD
;
1081 /* On the RTL93xx, an L3 termination endpoint MAC address on which the router waits
1082 * for packets to be routed needs to be allocated.
1084 static int rtl83xx_alloc_router_mac(struct rtl838x_switch_priv
*priv
, u64 mac
)
1087 struct rtl93xx_rt_mac m
;
1089 mutex_lock(&priv
->reg_mutex
);
1090 for (int i
= 0; i
< MAX_ROUTER_MACS
; i
++) {
1091 priv
->r
->get_l3_router_mac(i
, &m
);
1092 if (free_mac
< 0 && !m
.valid
) {
1096 if (m
.valid
&& m
.mac
== mac
) {
1103 pr_err("No free router MACs, cannot offload\n");
1104 mutex_unlock(&priv
->reg_mutex
);
1110 m
.p_type
= 0; /* An individual port, not a trunk port */
1111 m
.p_id
= 0x3f; /* Listen on any port */
1113 m
.vid
= 0; /* Listen on any VLAN... */
1114 m
.vid_mask
= 0; /* ... so mask needs to be 0 */
1115 m
.mac_mask
= 0xffffffffffffULL
; /* We want an exact match of the interface MAC */
1116 m
.action
= L3_FORWARD
; /* Route the packet */
1117 priv
->r
->set_l3_router_mac(free_mac
, &m
);
1119 mutex_unlock(&priv
->reg_mutex
);
1124 static int rtl83xx_alloc_egress_intf(struct rtl838x_switch_priv
*priv
, u64 mac
, int vlan
)
1127 struct rtl838x_l3_intf intf
;
1130 mutex_lock(&priv
->reg_mutex
);
1131 for (int i
= 0; i
< MAX_SMACS
; i
++) {
1132 m
= priv
->r
->get_l3_egress_mac(L3_EGRESS_DMACS
+ i
);
1133 if (free_mac
< 0 && !m
) {
1138 mutex_unlock(&priv
->reg_mutex
);
1144 pr_err("No free egress interface, cannot offload\n");
1148 /* Set up default egress interface 1 */
1150 intf
.smac_idx
= free_mac
;
1151 intf
.ip4_mtu_id
= 1;
1152 intf
.ip6_mtu_id
= 1;
1153 intf
.ttl_scope
= 1; /* TTL */
1154 intf
.hl_scope
= 1; /* Hop Limit */
1155 intf
.ip4_icmp_redirect
= intf
.ip6_icmp_redirect
= 2; /* FORWARD */
1156 intf
.ip4_pbr_icmp_redirect
= intf
.ip6_pbr_icmp_redirect
= 2; /* FORWARD; */
1157 priv
->r
->set_l3_egress_intf(free_mac
, &intf
);
1159 priv
->r
->set_l3_egress_mac(L3_EGRESS_DMACS
+ free_mac
, mac
);
1161 mutex_unlock(&priv
->reg_mutex
);
1166 static int rtl83xx_fib4_add(struct rtl838x_switch_priv
*priv
,
1167 struct fib_entry_notifier_info
*info
)
1169 struct fib_nh
*nh
= fib_info_nh(info
->fi
, 0);
1170 struct net_device
*dev
= fib_info_nh(info
->fi
, 0)->fib_nh_dev
;
1172 struct rtl83xx_route
*r
;
1174 int vlan
= is_vlan_dev(dev
) ? vlan_dev_vlan_id(dev
) : 0;
1176 pr_debug("In %s, ip %pI4, len %d\n", __func__
, &info
->dst
, info
->dst_len
);
1178 pr_info("Not offloading default route for now\n");
1182 pr_debug("GW: %pI4, interface name %s, mac %016llx, vlan %d\n", &nh
->fib_nh_gw4
, dev
->name
,
1183 ether_addr_to_u64(dev
->dev_addr
), vlan
1186 port
= rtl83xx_port_dev_lower_find(dev
, priv
);
1190 /* For now we only work with routes that have a gateway and are not ourself */
1191 /* if ((!nh->fib_nh_gw4) && (info->dst_len != 32)) */
1194 if ((info
->dst
& 0xff) == 0xff)
1197 /* Do not offload routes to 192.168.100.x */
1198 if ((info
->dst
& 0xffffff00) == 0xc0a86400)
1201 /* Do not offload routes to 127.x.x.x */
1202 if ((info
->dst
& 0xff000000) == 0x7f000000)
1205 /* Allocate route or host-route (entry if hardware supports this) */
1206 if (info
->dst_len
== 32 && priv
->r
->host_route_write
)
1207 r
= rtl83xx_host_route_alloc(priv
, nh
->fib_nh_gw4
);
1209 r
= rtl83xx_route_alloc(priv
, nh
->fib_nh_gw4
);
1212 pr_err("%s: No more free route entries\n", __func__
);
1216 r
->dst_ip
= info
->dst
;
1217 r
->prefix_len
= info
->dst_len
;
1219 to_localhost
= !nh
->fib_nh_gw4
;
1221 if (priv
->r
->set_l3_router_mac
) {
1222 u64 mac
= ether_addr_to_u64(dev
->dev_addr
);
1224 pr_debug("Local route and router mac %016llx\n", mac
);
1226 if (rtl83xx_alloc_router_mac(priv
, mac
))
1229 /* vid = 0: Do not care about VID */
1230 r
->nh
.if_id
= rtl83xx_alloc_egress_intf(priv
, mac
, vlan
);
1231 if (r
->nh
.if_id
< 0)
1238 r
->nh
.port
= priv
->port_ignore
;
1239 r
->attr
.valid
= true;
1240 r
->attr
.action
= ROUTE_ACT_TRAP2CPU
;
1243 slot
= priv
->r
->find_l3_slot(r
, false);
1244 pr_debug("%s: Got slot for route: %d\n", __func__
, slot
);
1245 priv
->r
->host_route_write(slot
, r
);
1249 /* We need to resolve the mac address of the GW */
1251 rtl83xx_port_ipv4_resolve(priv
, dev
, nh
->fib_nh_gw4
);
1253 nh
->fib_nh_flags
|= RTNH_F_OFFLOAD
;
1262 static int rtl83xx_fib6_add(struct rtl838x_switch_priv
*priv
,
1263 struct fib6_entry_notifier_info
*info
)
1265 pr_debug("In %s\n", __func__
);
1266 /* nh->fib_nh_flags |= RTNH_F_OFFLOAD; */
1271 struct net_event_work
{
1272 struct work_struct work
;
1273 struct rtl838x_switch_priv
*priv
;
1278 static void rtl83xx_net_event_work_do(struct work_struct
*work
)
1280 struct net_event_work
*net_work
=
1281 container_of(work
, struct net_event_work
, work
);
1282 struct rtl838x_switch_priv
*priv
= net_work
->priv
;
1284 rtl83xx_l3_nexthop_update(priv
, net_work
->gw_addr
, net_work
->mac
);
1289 static int rtl83xx_netevent_event(struct notifier_block
*this,
1290 unsigned long event
, void *ptr
)
1292 struct rtl838x_switch_priv
*priv
;
1293 struct net_device
*dev
;
1294 struct neighbour
*n
= ptr
;
1296 struct net_event_work
*net_work
;
1298 priv
= container_of(this, struct rtl838x_switch_priv
, ne_nb
);
1301 case NETEVENT_NEIGH_UPDATE
:
1302 if (n
->tbl
!= &arp_tbl
)
1305 port
= rtl83xx_port_dev_lower_find(dev
, priv
);
1306 if (port
< 0 || !(n
->nud_state
& NUD_VALID
)) {
1307 pr_debug("%s: Neigbour invalid, not updating\n", __func__
);
1311 net_work
= kzalloc(sizeof(*net_work
), GFP_ATOMIC
);
1315 INIT_WORK(&net_work
->work
, rtl83xx_net_event_work_do
);
1316 net_work
->priv
= priv
;
1318 net_work
->mac
= ether_addr_to_u64(n
->ha
);
1319 net_work
->gw_addr
= *(__be32
*) n
->primary_key
;
1321 pr_debug("%s: updating neighbour on port %d, mac %016llx\n",
1322 __func__
, port
, net_work
->mac
);
1323 schedule_work(&net_work
->work
);
1325 netdev_warn(dev
, "failed to handle neigh update (err %d)\n", err
);
1332 struct rtl83xx_fib_event_work
{
1333 struct work_struct work
;
1335 struct fib_entry_notifier_info fen_info
;
1336 struct fib6_entry_notifier_info fen6_info
;
1337 struct fib_rule_notifier_info fr_info
;
1339 struct rtl838x_switch_priv
*priv
;
1341 unsigned long event
;
1344 static void rtl83xx_fib_event_work_do(struct work_struct
*work
)
1346 struct rtl83xx_fib_event_work
*fib_work
=
1347 container_of(work
, struct rtl83xx_fib_event_work
, work
);
1348 struct rtl838x_switch_priv
*priv
= fib_work
->priv
;
1349 struct fib_rule
*rule
;
1352 /* Protect internal structures from changes */
1354 pr_debug("%s: doing work, event %ld\n", __func__
, fib_work
->event
);
1355 switch (fib_work
->event
) {
1356 case FIB_EVENT_ENTRY_ADD
:
1357 case FIB_EVENT_ENTRY_REPLACE
:
1358 case FIB_EVENT_ENTRY_APPEND
:
1359 if (fib_work
->is_fib6
) {
1360 err
= rtl83xx_fib6_add(priv
, &fib_work
->fen6_info
);
1362 err
= rtl83xx_fib4_add(priv
, &fib_work
->fen_info
);
1363 fib_info_put(fib_work
->fen_info
.fi
);
1366 pr_err("%s: FIB4 failed\n", __func__
);
1368 case FIB_EVENT_ENTRY_DEL
:
1369 rtl83xx_fib4_del(priv
, &fib_work
->fen_info
);
1370 fib_info_put(fib_work
->fen_info
.fi
);
1372 case FIB_EVENT_RULE_ADD
:
1373 case FIB_EVENT_RULE_DEL
:
1374 rule
= fib_work
->fr_info
.rule
;
1375 if (!fib4_rule_default(rule
))
1376 pr_err("%s: FIB4 default rule failed\n", __func__
);
1384 /* Called with rcu_read_lock() */
1385 static int rtl83xx_fib_event(struct notifier_block
*this, unsigned long event
, void *ptr
)
1387 struct fib_notifier_info
*info
= ptr
;
1388 struct rtl838x_switch_priv
*priv
;
1389 struct rtl83xx_fib_event_work
*fib_work
;
1391 if ((info
->family
!= AF_INET
&& info
->family
!= AF_INET6
&&
1392 info
->family
!= RTNL_FAMILY_IPMR
&&
1393 info
->family
!= RTNL_FAMILY_IP6MR
))
1396 priv
= container_of(this, struct rtl838x_switch_priv
, fib_nb
);
1398 fib_work
= kzalloc(sizeof(*fib_work
), GFP_ATOMIC
);
1402 INIT_WORK(&fib_work
->work
, rtl83xx_fib_event_work_do
);
1403 fib_work
->priv
= priv
;
1404 fib_work
->event
= event
;
1405 fib_work
->is_fib6
= false;
1408 case FIB_EVENT_ENTRY_ADD
:
1409 case FIB_EVENT_ENTRY_REPLACE
:
1410 case FIB_EVENT_ENTRY_APPEND
:
1411 case FIB_EVENT_ENTRY_DEL
:
1412 pr_debug("%s: FIB_ENTRY ADD/DEL, event %ld\n", __func__
, event
);
1413 if (info
->family
== AF_INET
) {
1414 struct fib_entry_notifier_info
*fen_info
= ptr
;
1416 if (fen_info
->fi
->fib_nh_is_v6
) {
1417 NL_SET_ERR_MSG_MOD(info
->extack
,
1418 "IPv6 gateway with IPv4 route is not supported");
1420 return notifier_from_errno(-EINVAL
);
1423 memcpy(&fib_work
->fen_info
, ptr
, sizeof(fib_work
->fen_info
));
1424 /* Take referece on fib_info to prevent it from being
1425 * freed while work is queued. Release it afterwards.
1427 fib_info_hold(fib_work
->fen_info
.fi
);
1429 } else if (info
->family
== AF_INET6
) {
1430 struct fib6_entry_notifier_info
*fen6_info
= ptr
;
1431 pr_warn("%s: FIB_RULE ADD/DEL for IPv6 not supported\n", __func__
);
1437 case FIB_EVENT_RULE_ADD
:
1438 case FIB_EVENT_RULE_DEL
:
1439 pr_debug("%s: FIB_RULE ADD/DEL, event: %ld\n", __func__
, event
);
1440 memcpy(&fib_work
->fr_info
, ptr
, sizeof(fib_work
->fr_info
));
1441 fib_rule_get(fib_work
->fr_info
.rule
);
1445 schedule_work(&fib_work
->work
);
1450 static int __init
rtl83xx_sw_probe(struct platform_device
*pdev
)
1453 struct rtl838x_switch_priv
*priv
;
1454 struct device
*dev
= &pdev
->dev
;
1457 pr_debug("Probing RTL838X switch device\n");
1458 if (!pdev
->dev
.of_node
) {
1459 dev_err(dev
, "No DT found\n");
1463 /* Initialize access to RTL switch tables */
1466 priv
= devm_kzalloc(dev
, sizeof(*priv
), GFP_KERNEL
);
1470 priv
->ds
= devm_kzalloc(dev
, sizeof(*priv
->ds
), GFP_KERNEL
);
1474 priv
->ds
->dev
= dev
;
1475 priv
->ds
->priv
= priv
;
1476 priv
->ds
->ops
= &rtl83xx_switch_ops
;
1477 priv
->ds
->needs_standalone_vlan_filtering
= true;
1480 mutex_init(&priv
->reg_mutex
);
1482 priv
->family_id
= soc_info
.family
;
1483 priv
->id
= soc_info
.id
;
1484 switch(soc_info
.family
) {
1485 case RTL8380_FAMILY_ID
:
1486 priv
->ds
->ops
= &rtl83xx_switch_ops
;
1487 priv
->cpu_port
= RTL838X_CPU_PORT
;
1488 priv
->port_mask
= 0x1f;
1489 priv
->port_width
= 1;
1490 priv
->irq_mask
= 0x0FFFFFFF;
1491 priv
->r
= &rtl838x_reg
;
1492 priv
->ds
->num_ports
= 29;
1493 priv
->fib_entries
= 8192;
1494 rtl8380_get_version(priv
);
1496 priv
->l2_bucket_size
= 4;
1497 priv
->n_pie_blocks
= 12;
1498 priv
->port_ignore
= 0x1f;
1499 priv
->n_counters
= 128;
1501 case RTL8390_FAMILY_ID
:
1502 priv
->ds
->ops
= &rtl83xx_switch_ops
;
1503 priv
->cpu_port
= RTL839X_CPU_PORT
;
1504 priv
->port_mask
= 0x3f;
1505 priv
->port_width
= 2;
1506 priv
->irq_mask
= 0xFFFFFFFFFFFFFULL
;
1507 priv
->r
= &rtl839x_reg
;
1508 priv
->ds
->num_ports
= 53;
1509 priv
->fib_entries
= 16384;
1510 rtl8390_get_version(priv
);
1512 priv
->l2_bucket_size
= 4;
1513 priv
->n_pie_blocks
= 18;
1514 priv
->port_ignore
= 0x3f;
1515 priv
->n_counters
= 1024;
1517 case RTL9300_FAMILY_ID
:
1518 priv
->ds
->ops
= &rtl930x_switch_ops
;
1519 priv
->cpu_port
= RTL930X_CPU_PORT
;
1520 priv
->port_mask
= 0x1f;
1521 priv
->port_width
= 1;
1522 priv
->irq_mask
= 0x0FFFFFFF;
1523 priv
->r
= &rtl930x_reg
;
1524 priv
->ds
->num_ports
= 29;
1525 priv
->fib_entries
= 16384;
1526 priv
->version
= RTL8390_VERSION_A
;
1528 sw_w32(1, RTL930X_ST_CTRL
);
1529 priv
->l2_bucket_size
= 8;
1530 priv
->n_pie_blocks
= 16;
1531 priv
->port_ignore
= 0x3f;
1532 priv
->n_counters
= 2048;
1534 case RTL9310_FAMILY_ID
:
1535 priv
->ds
->ops
= &rtl930x_switch_ops
;
1536 priv
->cpu_port
= RTL931X_CPU_PORT
;
1537 priv
->port_mask
= 0x3f;
1538 priv
->port_width
= 2;
1539 priv
->irq_mask
= 0xFFFFFFFFFFFFFULL
;
1540 priv
->r
= &rtl931x_reg
;
1541 priv
->ds
->num_ports
= 57;
1542 priv
->fib_entries
= 16384;
1543 priv
->version
= RTL8390_VERSION_A
;
1545 priv
->l2_bucket_size
= 8;
1548 pr_debug("Chip version %c\n", priv
->version
);
1550 err
= rtl83xx_mdio_probe(priv
);
1552 /* Probing fails the 1st time because of missing ethernet driver
1553 * initialization. Use this to disable traffic in case the bootloader left if on
1558 err
= dsa_register_switch(priv
->ds
);
1560 dev_err(dev
, "Error registering switch: %d\n", err
);
1564 /* dsa_to_port returns dsa_port from the port list in
1565 * dsa_switch_tree, the tree is built when the switch
1566 * is registered by dsa_register_switch
1568 for (int i
= 0; i
<= priv
->cpu_port
; i
++)
1569 priv
->ports
[i
].dp
= dsa_to_port(priv
->ds
, i
);
1571 /* Enable link and media change interrupts. Are the SERDES masks needed? */
1572 sw_w32_mask(0, 3, priv
->r
->isr_glb_src
);
1574 priv
->r
->set_port_reg_le(priv
->irq_mask
, priv
->r
->isr_port_link_sts_chg
);
1575 priv
->r
->set_port_reg_le(priv
->irq_mask
, priv
->r
->imr_port_link_sts_chg
);
1577 priv
->link_state_irq
= platform_get_irq(pdev
, 0);
1578 pr_info("LINK state irq: %d\n", priv
->link_state_irq
);
1579 switch (priv
->family_id
) {
1580 case RTL8380_FAMILY_ID
:
1581 err
= request_irq(priv
->link_state_irq
, rtl838x_switch_irq
,
1582 IRQF_SHARED
, "rtl838x-link-state", priv
->ds
);
1584 case RTL8390_FAMILY_ID
:
1585 err
= request_irq(priv
->link_state_irq
, rtl839x_switch_irq
,
1586 IRQF_SHARED
, "rtl839x-link-state", priv
->ds
);
1588 case RTL9300_FAMILY_ID
:
1589 err
= request_irq(priv
->link_state_irq
, rtl930x_switch_irq
,
1590 IRQF_SHARED
, "rtl930x-link-state", priv
->ds
);
1592 case RTL9310_FAMILY_ID
:
1593 err
= request_irq(priv
->link_state_irq
, rtl931x_switch_irq
,
1594 IRQF_SHARED
, "rtl931x-link-state", priv
->ds
);
1598 dev_err(dev
, "Error setting up switch interrupt.\n");
1599 /* Need to free allocated switch here */
1602 /* Enable interrupts for switch, on RTL931x, the IRQ is always on globally */
1603 if (soc_info
.family
!= RTL9310_FAMILY_ID
)
1604 sw_w32(0x1, priv
->r
->imr_glb
);
1606 rtl83xx_get_l2aging(priv
);
1608 rtl83xx_setup_qos(priv
);
1610 priv
->r
->l3_setup(priv
);
1612 /* Clear all destination ports for mirror groups */
1613 for (int i
= 0; i
< 4; i
++)
1614 priv
->mirror_group_ports
[i
] = -1;
1616 /* Register netdevice event callback to catch changes in link aggregation groups */
1617 priv
->nb
.notifier_call
= rtl83xx_netdevice_event
;
1618 if (register_netdevice_notifier(&priv
->nb
)) {
1619 priv
->nb
.notifier_call
= NULL
;
1620 dev_err(dev
, "Failed to register LAG netdev notifier\n");
1621 goto err_register_nb
;
1624 /* Initialize hash table for L3 routing */
1625 rhltable_init(&priv
->routes
, &route_ht_params
);
1627 /* Register netevent notifier callback to catch notifications about neighboring
1628 * changes to update nexthop entries for L3 routing.
1630 priv
->ne_nb
.notifier_call
= rtl83xx_netevent_event
;
1631 if (register_netevent_notifier(&priv
->ne_nb
)) {
1632 priv
->ne_nb
.notifier_call
= NULL
;
1633 dev_err(dev
, "Failed to register netevent notifier\n");
1634 goto err_register_ne_nb
;
1637 priv
->fib_nb
.notifier_call
= rtl83xx_fib_event
;
1639 /* Register Forwarding Information Base notifier to offload routes where
1641 * Only FIBs pointing to our own netdevs are programmed into
1642 * the device, so no need to pass a callback.
1644 err
= register_fib_notifier(&init_net
, &priv
->fib_nb
, NULL
, NULL
);
1646 goto err_register_fib_nb
;
1648 /* TODO: put this into l2_setup() */
1649 /* Flood BPDUs to all ports including cpu-port */
1650 if (soc_info
.family
!= RTL9300_FAMILY_ID
) {
1651 bpdu_mask
= soc_info
.family
== RTL8380_FAMILY_ID
? 0x1FFFFFFF : 0x1FFFFFFFFFFFFF;
1652 priv
->r
->set_port_reg_be(bpdu_mask
, priv
->r
->rma_bpdu_fld_pmask
);
1654 /* TRAP 802.1X frames (EAPOL) to the CPU-Port, bypass STP and VLANs */
1655 sw_w32(7, priv
->r
->spcl_trap_eapol_ctrl
);
1657 rtl838x_dbgfs_init(priv
);
1659 rtl930x_dbgfs_init(priv
);
1664 err_register_fib_nb
:
1665 unregister_netevent_notifier(&priv
->ne_nb
);
1667 unregister_netdevice_notifier(&priv
->nb
);
1672 static int rtl83xx_sw_remove(struct platform_device
*pdev
)
1675 pr_debug("Removing platform driver for rtl83xx-sw\n");
1680 static const struct of_device_id rtl83xx_switch_of_ids
[] = {
1681 { .compatible
= "realtek,rtl83xx-switch"},
1686 MODULE_DEVICE_TABLE(of
, rtl83xx_switch_of_ids
);
1688 static struct platform_driver rtl83xx_switch_driver
= {
1689 .probe
= rtl83xx_sw_probe
,
1690 .remove
= rtl83xx_sw_remove
,
1692 .name
= "rtl83xx-switch",
1694 .of_match_table
= rtl83xx_switch_of_ids
,
1698 module_platform_driver(rtl83xx_switch_driver
);
1700 MODULE_AUTHOR("B. Koblitz");
1701 MODULE_DESCRIPTION("RTL83XX SoC Switch Driver");
1702 MODULE_LICENSE("GPL");