target/linux/realtek/files-5.4/arch/mips/rtl838x/prom.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * prom.c
   4  * Early intialization code for the Realtek RTL838X SoC
   5  *
   6  * based on the original BSP by
   7  * Copyright (C) 2006-2012 Tony Wu (tonywu@realtek.com)
   8  * Copyright (C) 2020 B. Koblitz
   9  *
  10  */
  11
  12 #include <linux/init.h>
  13 #include <linux/kernel.h>
  14 #include <linux/string.h>
  15 #include <linux/of_fdt.h>
  16 #include <linux/libfdt.h>
  17 #include <asm/bootinfo.h>
  18 #include <asm/addrspace.h>
  19 #include <asm/page.h>
  20 #include <asm/cpu.h>
  21
  22 #include <mach-rtl83xx.h>
  23
  24 extern char arcs_cmdline[];
  25 extern const char __appended_dtb;
  26
  27 struct rtl83xx_soc_info soc_info;
  28 const void *fdt;
  29
  30 const char *get_system_type(void)
  31 {
  32         return soc_info.name;
  33 }
  34
  35 void __init prom_free_prom_memory(void)
  36 {
  37
  38 }
  39
  40 void __init device_tree_init(void)
  41 {
  42         if (!fdt_check_header(&__appended_dtb)) {
  43                 fdt = &__appended_dtb;
  44                 pr_info("Using appended Device Tree.\n");
  45         }
  46         initial_boot_params = (void *)fdt;
  47         unflatten_and_copy_device_tree();
  48 }
  49
  50 static void __init prom_init_cmdline(void)
  51 {
  52         int argc = fw_arg0;
  53         char **argv = (char **) KSEG1ADDR(fw_arg1);
  54         int i;
  55
  56         arcs_cmdline[0] = '\0';
  57
  58         for (i = 0; i < argc; i++) {
  59                 char *p = (char *) KSEG1ADDR(argv[i]);
  60
  61                 if (CPHYSADDR(p) && *p) {
  62                         strlcat(arcs_cmdline, p, sizeof(arcs_cmdline));
  63                         strlcat(arcs_cmdline, " ", sizeof(arcs_cmdline));
  64                 }
  65         }
  66         pr_info("Kernel command line: %s\n", arcs_cmdline);
  67 }
  68
  69 void __init prom_init(void)
  70 {
  71         uint32_t model;
  72
  73         /* uart0 */
  74         setup_8250_early_printk_port(0xb8002000, 2, 0);
  75
  76         soc_info.sw_base = RTL838X_SW_BASE;
  77
  78         model = sw_r32(RTL838X_MODEL_NAME_INFO) >> 16;
  79         if (model != 0x8328 && model != 0x8330 && model != 0x8332 &&
  80             model != 0x8380 && model != 0x8382)
  81                 model = sw_r32(RTL839X_MODEL_NAME_INFO) >> 16;
  82
  83         soc_info.id = model;
  84
  85         switch (model) {
  86         case 0x8328:
  87                 soc_info.name = "RTL8328";
  88                 soc_info.family = RTL8328_FAMILY_ID;
  89                 break;
  90         case 0x8332:
  91                 soc_info.name = "RTL8332";
  92                 soc_info.family = RTL8380_FAMILY_ID;
  93                 break;
  94         case 0x8380:
  95                 soc_info.name = "RTL8380";
  96                 soc_info.family = RTL8380_FAMILY_ID;
  97                 break;
  98         case 0x8382:
  99                 soc_info.name = "RTL8382";
 100                 soc_info.family = RTL8380_FAMILY_ID;
 101                 break;
 102         case 0x8390:
 103                 soc_info.name = "RTL8390";
 104                 soc_info.family = RTL8390_FAMILY_ID;
 105                 break;
 106         case 0x8391:
 107                 soc_info.name = "RTL8391";
 108                 soc_info.family = RTL8390_FAMILY_ID;
 109                 break;
 110         case 0x8392:
 111                 soc_info.name = "RTL8392";
 112                 soc_info.family = RTL8390_FAMILY_ID;
 113                 break;
 114         case 0x8393:
 115                 soc_info.name = "RTL8393";
 116                 soc_info.family = RTL8390_FAMILY_ID;
 117                 break;
 118         default:
 119                 soc_info.name = "DEFAULT";
 120                 soc_info.family = 0;
 121         }
 122         pr_info("SoC Type: %s\n", get_system_type());
 123         prom_init_cmdline();
 124 }