1 From 2bf2f4d9f673013a58109626b87329310537a611 Mon Sep 17 00:00:00 2001
2 From: Chukun Pan <amadeus@jmu.edu.cn>
3 Date: Fri, 9 Dec 2022 18:25:24 +0800
4 Subject: [PATCH] arm64: dts: rockchip: Add Radxa CM3I E25
6 Radxa E25 is a network application carrier board for the Radxa CM3
7 Industrial (CM3I) SoM, which is based on the Rockchip RK3568 SoC.
9 It has the following features:
11 - MicroSD card socket, on board eMMC flash
12 - 2x 2.5GbE Realtek RTL8125B Ethernet transceiver
13 - 1x USB Type-C port (Power and Serial console)
15 - mini PCIe socket (USB or PCIe)
16 - ngff PCIe socket (USB or SATA)
17 - 1x User LED and 16x RGB LEDs
18 - 26-pin expansion header
20 Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
21 Link: https://lore.kernel.org/r/20221209102524.129367-3-amadeus@jmu.edu.cn
22 Signed-off-by: Heiko Stuebner <heiko@sntech.de>
24 arch/arm64/boot/dts/rockchip/Makefile | 1 +
25 .../boot/dts/rockchip/rk3568-radxa-cm3i.dtsi | 416 ++++++++++++++++++
26 .../boot/dts/rockchip/rk3568-radxa-e25.dts | 229 ++++++++++
27 3 files changed, 646 insertions(+)
28 create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-radxa-cm3i.dtsi
29 create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts
31 --- a/arch/arm64/boot/dts/rockchip/Makefile
32 +++ b/arch/arm64/boot/dts/rockchip/Makefile
33 @@ -78,4 +78,5 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bp
34 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
35 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5c.dtb
36 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5s.dtb
37 +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-radxa-e25.dtb
38 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
40 +++ b/arch/arm64/boot/dts/rockchip/rk3568-radxa-cm3i.dtsi
42 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
44 +#include <dt-bindings/gpio/gpio.h>
45 +#include <dt-bindings/leds/common.h>
46 +#include <dt-bindings/pinctrl/rockchip.h>
47 +#include "rk3568.dtsi"
50 + model = "Radxa CM3 Industrial Board";
51 + compatible = "radxa,cm3i", "rockchip,rk3568";
58 + stdout-path = "serial2:115200n8";
62 + compatible = "gpio-leds";
65 + gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
66 + function = LED_FUNCTION_HEARTBEAT;
67 + color = <LED_COLOR_ID_GREEN>;
68 + linux,default-trigger = "heartbeat";
69 + pinctrl-names = "default";
70 + pinctrl-0 = <&led_user_en>;
74 + pcie30_avdd0v9: pcie30-avdd0v9-regulator {
75 + compatible = "regulator-fixed";
76 + regulator-name = "pcie30_avdd0v9";
77 + regulator-always-on;
79 + regulator-min-microvolt = <900000>;
80 + regulator-max-microvolt = <900000>;
81 + vin-supply = <&vcc3v3_sys>;
84 + pcie30_avdd1v8: pcie30-avdd1v8-regulator {
85 + compatible = "regulator-fixed";
86 + regulator-name = "pcie30_avdd1v8";
87 + regulator-always-on;
89 + regulator-min-microvolt = <1800000>;
90 + regulator-max-microvolt = <1800000>;
91 + vin-supply = <&vcc3v3_sys>;
94 + vcc3v3_sys: vcc3v3-sys-regulator {
95 + compatible = "regulator-fixed";
96 + regulator-name = "vcc3v3_sys";
97 + regulator-always-on;
99 + regulator-min-microvolt = <3300000>;
100 + regulator-max-microvolt = <3300000>;
101 + vin-supply = <&vcc5v_input>;
104 + vcc5v0_sys: vcc5v0-sys-regulator {
105 + compatible = "regulator-fixed";
106 + regulator-name = "vcc5v0_sys";
107 + regulator-always-on;
109 + regulator-min-microvolt = <5000000>;
110 + regulator-max-microvolt = <5000000>;
111 + vin-supply = <&vcc5v_input>;
114 + /* labeled +5v_input in schematic */
115 + vcc5v_input: vcc5v-input-regulator {
116 + compatible = "regulator-fixed";
117 + regulator-name = "vcc5v_input";
118 + regulator-always-on;
120 + regulator-min-microvolt = <5000000>;
121 + regulator-max-microvolt = <5000000>;
138 + cpu-supply = <&vdd_cpu>;
142 + cpu-supply = <&vdd_cpu>;
146 + cpu-supply = <&vdd_cpu>;
150 + cpu-supply = <&vdd_cpu>;
153 +&display_subsystem {
154 + status = "disabled";
158 + mali-supply = <&vdd_gpu>;
165 + vdd_cpu: regulator@1c {
166 + compatible = "tcs,tcs4525";
168 + fcs,suspend-voltage-selector = <1>;
169 + regulator-name = "vdd_cpu";
170 + regulator-always-on;
172 + regulator-min-microvolt = <800000>;
173 + regulator-max-microvolt = <1150000>;
174 + regulator-ramp-delay = <2300>;
175 + vin-supply = <&vcc5v_input>;
177 + regulator-state-mem {
178 + regulator-off-in-suspend;
183 + compatible = "rockchip,rk809";
185 + interrupt-parent = <&gpio0>;
186 + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
187 + #clock-cells = <1>;
188 + pinctrl-names = "default";
189 + pinctrl-0 = <&pmic_int>;
190 + rockchip,system-power-controller;
193 + vcc1-supply = <&vcc3v3_sys>;
194 + vcc2-supply = <&vcc3v3_sys>;
195 + vcc3-supply = <&vcc3v3_sys>;
196 + vcc4-supply = <&vcc3v3_sys>;
197 + vcc5-supply = <&vcc3v3_sys>;
198 + vcc6-supply = <&vcc3v3_sys>;
199 + vcc7-supply = <&vcc3v3_sys>;
200 + vcc8-supply = <&vcc3v3_sys>;
201 + vcc9-supply = <&vcc3v3_sys>;
204 + vdd_logic: DCDC_REG1 {
205 + regulator-name = "vdd_logic";
206 + regulator-always-on;
208 + regulator-init-microvolt = <900000>;
209 + regulator-initial-mode = <0x2>;
210 + regulator-min-microvolt = <500000>;
211 + regulator-max-microvolt = <1350000>;
212 + regulator-ramp-delay = <6001>;
214 + regulator-state-mem {
215 + regulator-off-in-suspend;
219 + vdd_gpu: DCDC_REG2 {
220 + regulator-name = "vdd_gpu";
221 + regulator-always-on;
222 + regulator-init-microvolt = <900000>;
223 + regulator-initial-mode = <0x2>;
224 + regulator-min-microvolt = <500000>;
225 + regulator-max-microvolt = <1350000>;
226 + regulator-ramp-delay = <6001>;
228 + regulator-state-mem {
229 + regulator-off-in-suspend;
233 + vcc_ddr: DCDC_REG3 {
234 + regulator-name = "vcc_ddr";
235 + regulator-always-on;
237 + regulator-initial-mode = <0x2>;
239 + regulator-state-mem {
240 + regulator-on-in-suspend;
244 + vdd_npu: DCDC_REG4 {
245 + regulator-name = "vdd_npu";
246 + regulator-init-microvolt = <900000>;
247 + regulator-initial-mode = <0x2>;
248 + regulator-min-microvolt = <500000>;
249 + regulator-max-microvolt = <1350000>;
250 + regulator-ramp-delay = <6001>;
252 + regulator-state-mem {
253 + regulator-off-in-suspend;
257 + vcc_1v8: DCDC_REG5 {
258 + regulator-name = "vcc_1v8";
259 + regulator-always-on;
261 + regulator-min-microvolt = <1800000>;
262 + regulator-max-microvolt = <1800000>;
264 + regulator-state-mem {
265 + regulator-off-in-suspend;
269 + vdda0v9_image: LDO_REG1 {
270 + regulator-name = "vdda0v9_image";
271 + regulator-min-microvolt = <900000>;
272 + regulator-max-microvolt = <900000>;
274 + regulator-state-mem {
275 + regulator-off-in-suspend;
279 + vdda_0v9: LDO_REG2 {
280 + regulator-name = "vdda_0v9";
281 + regulator-always-on;
283 + regulator-min-microvolt = <900000>;
284 + regulator-max-microvolt = <900000>;
286 + regulator-state-mem {
287 + regulator-off-in-suspend;
291 + vdda0v9_pmu: LDO_REG3 {
292 + regulator-name = "vdda0v9_pmu";
293 + regulator-always-on;
295 + regulator-min-microvolt = <900000>;
296 + regulator-max-microvolt = <900000>;
298 + regulator-state-mem {
299 + regulator-on-in-suspend;
300 + regulator-suspend-microvolt = <900000>;
304 + vccio_acodec: LDO_REG4 {
305 + regulator-name = "vccio_acodec";
306 + regulator-always-on;
307 + regulator-min-microvolt = <3300000>;
308 + regulator-max-microvolt = <3300000>;
310 + regulator-state-mem {
311 + regulator-off-in-suspend;
315 + vccio_sd: LDO_REG5 {
316 + regulator-name = "vccio_sd";
317 + regulator-min-microvolt = <1800000>;
318 + regulator-max-microvolt = <3300000>;
320 + regulator-state-mem {
321 + regulator-off-in-suspend;
325 + vcc3v3_pmu: LDO_REG6 {
326 + regulator-name = "vcc3v3_pmu";
327 + regulator-always-on;
329 + regulator-min-microvolt = <3300000>;
330 + regulator-max-microvolt = <3300000>;
332 + regulator-state-mem {
333 + regulator-on-in-suspend;
334 + regulator-suspend-microvolt = <3300000>;
338 + vcca_1v8: LDO_REG7 {
339 + regulator-name = "vcca_1v8";
340 + regulator-always-on;
342 + regulator-min-microvolt = <1800000>;
343 + regulator-max-microvolt = <1800000>;
345 + regulator-state-mem {
346 + regulator-off-in-suspend;
350 + vcca1v8_pmu: LDO_REG8 {
351 + regulator-name = "vcca1v8_pmu";
352 + regulator-always-on;
354 + regulator-min-microvolt = <1800000>;
355 + regulator-max-microvolt = <1800000>;
357 + regulator-state-mem {
358 + regulator-on-in-suspend;
359 + regulator-suspend-microvolt = <1800000>;
363 + vcca1v8_image: LDO_REG9 {
364 + regulator-name = "vcca1v8_image";
365 + regulator-min-microvolt = <1800000>;
366 + regulator-max-microvolt = <1800000>;
368 + regulator-state-mem {
369 + regulator-off-in-suspend;
373 + vcc_3v3: SWITCH_REG1 {
374 + regulator-name = "vcc_3v3";
375 + regulator-always-on;
378 + regulator-state-mem {
379 + regulator-off-in-suspend;
383 + vcc3v3_sd: SWITCH_REG2 {
384 + regulator-name = "vcc3v3_sd";
386 + regulator-state-mem {
387 + regulator-off-in-suspend;
396 + led_user_en: led_user_en {
397 + rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
402 + pmic_int: pmic_int {
403 + rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
409 + pmuio1-supply = <&vcc3v3_pmu>;
410 + pmuio2-supply = <&vcc3v3_pmu>;
411 + vccio1-supply = <&vccio_acodec>;
412 + vccio2-supply = <&vcc_1v8>;
413 + vccio3-supply = <&vccio_sd>;
414 + vccio4-supply = <&vcc_1v8>;
415 + vccio5-supply = <&vcc_3v3>;
416 + vccio6-supply = <&vcc_1v8>;
417 + vccio7-supply = <&vcc_3v3>;
422 + vref-supply = <&vcca_1v8>;
428 + max-frequency = <200000000>;
430 + pinctrl-names = "default";
431 + pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
432 + vmmc-supply = <&vcc_3v3>;
433 + vqmmc-supply = <&vcc_1v8>;
438 + rockchip,hw-tshut-mode = <1>;
439 + rockchip,hw-tshut-polarity = <0>;
456 + extcon = <&usb2phy0>;
459 +++ b/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts
461 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
464 +#include "rk3568-radxa-cm3i.dtsi"
467 + model = "Radxa E25";
468 + compatible = "radxa,e25", "rockchip,rk3568";
476 + compatible = "pwm-leds-multicolor";
479 + color = <LED_COLOR_ID_RGB>;
480 + max-brightness = <255>;
483 + color = <LED_COLOR_ID_RED>;
484 + pwms = <&pwm1 0 1000000 0>;
488 + color = <LED_COLOR_ID_GREEN>;
489 + pwms = <&pwm2 0 1000000 0>;
493 + color = <LED_COLOR_ID_BLUE>;
494 + pwms = <&pwm12 0 1000000 0>;
499 + vbus_typec: vbus-typec-regulator {
500 + compatible = "regulator-fixed";
501 + enable-active-high;
502 + gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
503 + pinctrl-names = "default";
504 + pinctrl-0 = <&vbus_typec_en>;
505 + regulator-name = "vbus_typec";
506 + regulator-min-microvolt = <5000000>;
507 + regulator-max-microvolt = <5000000>;
508 + vin-supply = <&vcc5v0_sys>;
511 + vcc3v3_minipcie: vcc3v3-minipcie-regulator {
512 + compatible = "regulator-fixed";
513 + enable-active-high;
514 + gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
515 + pinctrl-names = "default";
516 + pinctrl-0 = <&minipcie_enable_h>;
517 + regulator-name = "vcc3v3_minipcie";
518 + regulator-min-microvolt = <5000000>;
519 + regulator-max-microvolt = <5000000>;
520 + vin-supply = <&vcc5v0_sys>;
523 + vcc3v3_ngff: vcc3v3-ngff-regulator {
524 + compatible = "regulator-fixed";
525 + enable-active-high;
526 + gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
527 + pinctrl-names = "default";
528 + pinctrl-0 = <&ngffpcie_enable_h>;
529 + regulator-name = "vcc3v3_ngff";
530 + regulator-min-microvolt = <3300000>;
531 + regulator-max-microvolt = <3300000>;
532 + vin-supply = <&vcc5v0_sys>;
535 + /* actually fed by vcc5v0_sys, dependent
536 + * on pi6c clock generator
538 + vcc3v3_pcie30x1: vcc3v3-pcie30x1-regulator {
539 + compatible = "regulator-fixed";
540 + enable-active-high;
541 + gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
542 + pinctrl-names = "default";
543 + pinctrl-0 = <&pcie30x1_enable_h>;
544 + regulator-name = "vcc3v3_pcie30x1";
545 + regulator-min-microvolt = <3300000>;
546 + regulator-max-microvolt = <3300000>;
547 + vin-supply = <&vcc3v3_pi6c_05>;
550 + vcc3v3_pi6c_05: vcc3v3-pi6c-05-regulator {
551 + compatible = "regulator-fixed";
552 + enable-active-high;
553 + gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
554 + pinctrl-names = "default";
555 + pinctrl-0 = <&pcie_enable_h>;
556 + regulator-name = "vcc3v3_pcie";
557 + regulator-min-microvolt = <3300000>;
558 + regulator-max-microvolt = <3300000>;
559 + vin-supply = <&vcc5v0_sys>;
564 + pinctrl-names = "default";
565 + pinctrl-0 = <&pcie20_reset_h>;
566 + reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
567 + vpcie3v3-supply = <&vcc3v3_pi6c_05>;
572 + data-lanes = <1 2>;
578 + pinctrl-names = "default";
579 + pinctrl-0 = <&pcie30x1m0_pins>;
580 + reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>;
581 + vpcie3v3-supply = <&vcc3v3_pcie30x1>;
587 + pinctrl-names = "default";
588 + pinctrl-0 = <&pcie30x2_reset_h>;
589 + reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
590 + vpcie3v3-supply = <&vcc3v3_pi6c_05>;
596 + pcie20_reset_h: pcie20-reset-h {
597 + rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
600 + pcie30x1_enable_h: pcie30x1-enable-h {
601 + rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
604 + pcie30x2_reset_h: pcie30x2-reset-h {
605 + rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
608 + pcie_enable_h: pcie-enable-h {
609 + rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
614 + minipcie_enable_h: minipcie-enable-h {
615 + rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
618 + ngffpcie_enable_h: ngffpcie-enable-h {
619 + rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
622 + vbus_typec_en: vbus_typec_en {
623 + rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
637 + pinctrl-names = "default";
638 + pinctrl-0 = <&pwm12m1_pins>;
645 + cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
646 + /* Also used in pcie30x1_clkreqnm0 */
648 + pinctrl-names = "default";
649 + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd>;
651 + vmmc-supply = <&vcc3v3_sd>;
652 + vqmmc-supply = <&vccio_sd>;
677 + phy-supply = <&vbus_typec>;
682 + phy-supply = <&vcc3v3_minipcie>;
687 + phy-supply = <&vcc3v3_ngff>;