1 From d3cf2859a056273400fbdf9d389b75750ff6ca5e Mon Sep 17 00:00:00 2001
2 From: David Abdurachmanov <david.abdurachmanov@sifive.com>
3 Date: Fri, 14 May 2021 05:27:51 -0700
4 Subject: [PATCH 6/7] riscv: sifive: unleashed: define opp table (cpufreq)
6 Source: https://github.com/sifive/riscv-linux/commits/dev/paulw/cpufreq-dt-aloe-v5.3-rc4
8 Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
10 arch/riscv/Kconfig | 8 +++++
11 arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 5 ++++
12 .../riscv/boot/dts/sifive/hifive-unleashed-a00.dts | 34 ++++++++++++++++++++++
13 3 files changed, 47 insertions(+)
15 --- a/arch/riscv/Kconfig
16 +++ b/arch/riscv/Kconfig
17 @@ -711,6 +711,14 @@ config PORTABLE
21 +menu "CPU Power Management"
23 +source "drivers/cpuidle/Kconfig"
25 +source "drivers/cpufreq/Kconfig"
29 menu "Power management options"
31 source "kernel/power/Kconfig"
32 --- a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
33 +++ b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
35 i-cache-size = <16384>;
37 riscv,isa = "rv64imac";
38 + clocks = <&prci FU540_PRCI_CLK_COREPLL>;
40 cpu0_intc: interrupt-controller {
41 #interrupt-cells = <1>;
44 riscv,isa = "rv64imafdc";
46 + clocks = <&prci FU540_PRCI_CLK_COREPLL>;
47 next-level-cache = <&l2cache>;
48 cpu1_intc: interrupt-controller {
49 #interrupt-cells = <1>;
52 riscv,isa = "rv64imafdc";
54 + clocks = <&prci FU540_PRCI_CLK_COREPLL>;
55 next-level-cache = <&l2cache>;
56 cpu2_intc: interrupt-controller {
57 #interrupt-cells = <1>;
60 riscv,isa = "rv64imafdc";
62 + clocks = <&prci FU540_PRCI_CLK_COREPLL>;
63 next-level-cache = <&l2cache>;
64 cpu3_intc: interrupt-controller {
65 #interrupt-cells = <1>;
68 riscv,isa = "rv64imafdc";
70 + clocks = <&prci FU540_PRCI_CLK_COREPLL>;
71 next-level-cache = <&l2cache>;
72 cpu4_intc: interrupt-controller {
73 #interrupt-cells = <1>;
74 --- a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
75 +++ b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
81 + fu540_c000_opp_table: opp-table {
82 + compatible = "operating-points-v2";
86 + opp-hz = /bits/ 64 <350000000>;
89 + opp-hz = /bits/ 64 <700000000>;
92 + opp-hz = /bits/ 64 <999999999>;
95 + opp-hz = /bits/ 64 <1400000000>;
101 + operating-points-v2 = <&fu540_c000_opp_table>;
104 + operating-points-v2 = <&fu540_c000_opp_table>;
107 + operating-points-v2 = <&fu540_c000_opp_table>;
110 + operating-points-v2 = <&fu540_c000_opp_table>;
113 + operating-points-v2 = <&fu540_c000_opp_table>;