1 From 9f6deb688f4cb733cd3f36e0cc88f14d2f81982d Mon Sep 17 00:00:00 2001
2 From: Chen-Yu Tsai <wens@csie.org>
3 Date: Mon, 10 Feb 2014 18:35:50 +0800
4 Subject: [PATCH] ARM: dts: sun7i: Add pin muxing options for the GMAC
6 The A20 has EMAC and GMAC muxed on the same pins.
7 Add pin sets with gmac function for MII and RGMII mode to the DTSI.
9 Signed-off-by: Chen-Yu Tsai <wens@csie.org>
11 arch/arm/boot/dts/sun7i-a20.dtsi | 26 ++++++++++++++++++++++++++
12 1 file changed, 26 insertions(+)
14 diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
15 index fa489fe..679dc50 100644
16 --- a/arch/arm/boot/dts/sun7i-a20.dtsi
17 +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
19 allwinner,drive = <0>;
23 + gmac_pins_mii_a: gmac_mii@0 {
24 + allwinner,pins = "PA0", "PA1", "PA2",
25 + "PA3", "PA4", "PA5", "PA6",
26 + "PA7", "PA8", "PA9", "PA10",
27 + "PA11", "PA12", "PA13", "PA14",
29 + allwinner,function = "gmac";
30 + allwinner,drive = <0>;
31 + allwinner,pull = <0>;
34 + gmac_pins_rgmii_a: gmac_rgmii@0 {
35 + allwinner,pins = "PA0", "PA1", "PA2",
36 + "PA3", "PA4", "PA5", "PA6",
37 + "PA7", "PA8", "PA10",
38 + "PA11", "PA12", "PA13",
40 + allwinner,function = "gmac";
42 + * data lines in RGMII mode use DDR mode
43 + * and need a higher signal drive strength
45 + allwinner,drive = <3>;
46 + allwinner,pull = <0>;