1 From 9f6deb688f4cb733cd3f36e0cc88f14d2f81982d Mon Sep 17 00:00:00 2001
2 From: Chen-Yu Tsai <wens@csie.org>
3 Date: Mon, 10 Feb 2014 18:35:50 +0800
4 Subject: [PATCH] ARM: dts: sun7i: Add pin muxing options for the GMAC
6 The A20 has EMAC and GMAC muxed on the same pins.
7 Add pin sets with gmac function for MII and RGMII mode to the DTSI.
9 Signed-off-by: Chen-Yu Tsai <wens@csie.org>
11 arch/arm/boot/dts/sun7i-a20.dtsi | 26 ++++++++++++++++++++++++++
12 1 file changed, 26 insertions(+)
14 --- a/arch/arm/boot/dts/sun7i-a20.dtsi
15 +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
17 allwinner,drive = <0>;
21 + gmac_pins_mii_a: gmac_mii@0 {
22 + allwinner,pins = "PA0", "PA1", "PA2",
23 + "PA3", "PA4", "PA5", "PA6",
24 + "PA7", "PA8", "PA9", "PA10",
25 + "PA11", "PA12", "PA13", "PA14",
27 + allwinner,function = "gmac";
28 + allwinner,drive = <0>;
29 + allwinner,pull = <0>;
32 + gmac_pins_rgmii_a: gmac_rgmii@0 {
33 + allwinner,pins = "PA0", "PA1", "PA2",
34 + "PA3", "PA4", "PA5", "PA6",
35 + "PA7", "PA8", "PA10",
36 + "PA11", "PA12", "PA13",
38 + allwinner,function = "gmac";
40 + * data lines in RGMII mode use DDR mode
41 + * and need a higher signal drive strength
43 + allwinner,drive = <3>;
44 + allwinner,pull = <0>;