target/linux/sunxi/patches-3.14/145-3-dt-sun5i-add-a13-spi.patch

   1 From aeb3b73fc416e14afd25f25e69f8713488edcc1b Mon Sep 17 00:00:00 2001
   2 From: Maxime Ripard <maxime.ripard@free-electrons.com>
   3 Date: Sat, 22 Feb 2014 22:35:57 +0100
   4 Subject: [PATCH] ARM: dt: sun5i: Add A13 SPI controller nodes
   5
   6 The A13 has 3 SPI controllers compatible with the one found in the A10. Add
   7 them in the DT.
   8
   9 Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
  10 ---
  11  arch/arm/boot/dts/sun5i-a13.dtsi | 33 +++++++++++++++++++++++++++++++++
  12  1 file changed, 33 insertions(+)
  13
  14 diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
  15 index 24cd86cb..7102d12 100644
  16 --- a/arch/arm/boot/dts/sun5i-a13.dtsi
  17 +++ b/arch/arm/boot/dts/sun5i-a13.dtsi
  18 @@ -298,6 +298,39 @@
  19                 #size-cells = <1>;
  20                 ranges;
  21
  22 +               spi0: spi@01c05000 {
  23 +                       compatible = "allwinner,sun4i-a10-spi";
  24 +                       reg = <0x01c05000 0x1000>;
  25 +                       interrupts = <10>;
  26 +                       clocks = <&ahb_gates 20>, <&spi0_clk>;
  27 +                       clock-names = "ahb", "mod";
  28 +                       status = "disabled";
  29 +                       #address-cells = <1>;
  30 +                       #size-cells = <0>;
  31 +               };
  32 +
  33 +               spi1: spi@01c06000 {
  34 +                       compatible = "allwinner,sun4i-a10-spi";
  35 +                       reg = <0x01c06000 0x1000>;
  36 +                       interrupts = <11>;
  37 +                       clocks = <&ahb_gates 21>, <&spi1_clk>;
  38 +                       clock-names = "ahb", "mod";
  39 +                       status = "disabled";
  40 +                       #address-cells = <1>;
  41 +                       #size-cells = <0>;
  42 +               };
  43 +
  44 +               spi2: spi@01c17000 {
  45 +                       compatible = "allwinner,sun4i-a10-spi";
  46 +                       reg = <0x01c17000 0x1000>;
  47 +                       interrupts = <12>;
  48 +                       clocks = <&ahb_gates 22>, <&spi2_clk>;
  49 +                       clock-names = "ahb", "mod";
  50 +                       status = "disabled";
  51 +                       #address-cells = <1>;
  52 +                       #size-cells = <0>;
  53 +               };
  54 +
  55                 intc: interrupt-controller@01c20400 {
  56                         compatible = "allwinner,sun4i-ic";
  57                         reg = <0x01c20400 0x400>;
  58 --
  59 2.0.3
  60