1 From 36268d704307282109ec246f65cac2a42c825629 Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
3 Date: Fri, 20 Sep 2013 20:29:17 -0300
4 Subject: [PATCH] clk: sunxi: Implement MMC phase control
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
9 HdG: add header exporting clk_sunxi_mmc_phase_control
11 Signed-off-by: Emilio López <emilio@elopez.com.ar>
12 Signed-off-by: Hans de Goede <hdegoede@redhat.com>
14 drivers/clk/sunxi/clk-sunxi.c | 35 +++++++++++++++++++++++++++++++++++
15 include/linux/clk/sunxi.h | 22 ++++++++++++++++++++++
16 2 files changed, 57 insertions(+)
17 create mode 100644 include/linux/clk/sunxi.h
19 --- a/drivers/clk/sunxi/clk-sunxi.c
20 +++ b/drivers/clk/sunxi/clk-sunxi.c
21 @@ -507,6 +507,41 @@ CLK_OF_DECLARE(sun7i_a20_gmac, "allwinne
25 + * clk_sunxi_mmc_phase_control() - configures MMC clock phase control
28 +void clk_sunxi_mmc_phase_control(struct clk_hw *hw, u8 sample, u8 output)
30 + #define to_clk_composite(_hw) container_of(_hw, struct clk_composite, hw)
31 + #define to_clk_factors(_hw) container_of(_hw, struct clk_factors, hw)
33 + struct clk_composite *composite = to_clk_composite(hw);
34 + struct clk_hw *rate_hw = composite->rate_hw;
35 + struct clk_factors *factors = to_clk_factors(rate_hw);
36 + unsigned long flags = 0;
40 + spin_lock_irqsave(factors->lock, flags);
42 + reg = readl(factors->reg);
44 + /* set sample clock phase control */
45 + reg &= ~(0x7 << 20);
46 + reg |= ((sample & 0x7) << 20);
48 + /* set output clock phase control */
50 + reg |= ((output & 0x7) << 8);
52 + writel(reg, factors->reg);
55 + spin_unlock_irqrestore(factors->lock, flags);
60 * sunxi_factors_clk_setup() - Setup function for factor clocks
64 +++ b/include/linux/clk/sunxi.h
67 + * Copyright 2013 - Hans de Goede <hdegoede@redhat.com>
69 + * This program is free software; you can redistribute it and/or modify
70 + * it under the terms of the GNU General Public License as published by
71 + * the Free Software Foundation; either version 2 of the License, or
72 + * (at your option) any later version.
74 + * This program is distributed in the hope that it will be useful,
75 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
76 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
77 + * GNU General Public License for more details.
80 +#ifndef __LINUX_CLK_SUNXI_H_
81 +#define __LINUX_CLK_SUNXI_H_
83 +#include <linux/clk.h>
85 +void clk_sunxi_mmc_phase_control(struct clk_hw *hw, u8 sample, u8 output);