sunxi: initial 3.14 patchset
[openwrt/staging/stintel.git] / target / linux / sunxi / patches-3.14 / 203-dt-sun7i-add-mmc-nodes.patch
1 From 33654facee61ebbd88684c9cf482ec2ea41f575e Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?David=20Lanzend=C3=B6rfer?= <david.lanzendoerfer@o2s.ch>
3 Date: Sat, 15 Feb 2014 14:02:01 +0100
4 Subject: [PATCH] ARM: dts: sun7i: Add support for mmc
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 Signed-off-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch>
10 Signed-off-by: Hans de Goede <hdegoede@redhat.com>
11 ---
12 arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 8 +++
13 arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 8 +++
14 arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 23 +++++++++
15 arch/arm/boot/dts/sun7i-a20.dtsi | 65 +++++++++++++++++++++++++
16 4 files changed, 104 insertions(+)
17
18 diff --git a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
19 index 68de89f..cd9d3c2 100644
20 --- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
21 +++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
22 @@ -20,6 +20,14 @@
23 compatible = "cubietech,cubieboard2", "allwinner,sun7i-a20";
24
25 soc@01c00000 {
26 + mmc0: mmc@01c0f000 {
27 + pinctrl-names = "default", "default";
28 + pinctrl-0 = <&mmc0_pins_a>;
29 + pinctrl-1 = <&mmc0_cd_pin_reference_design>;
30 + cd-gpios = <&pio 7 1 0>; /* PH1 */
31 + status = "okay";
32 + };
33 +
34 usbphy: phy@01c13400 {
35 usb1_vbus-supply = <&reg_usb1_vbus>;
36 usb2_vbus-supply = <&reg_usb2_vbus>;
37 diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
38 index cb25d3c..66bb3ef 100644
39 --- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
40 +++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
41 @@ -20,6 +20,14 @@
42 compatible = "cubietech,cubietruck", "allwinner,sun7i-a20";
43
44 soc@01c00000 {
45 + mmc0: mmc@01c0f000 {
46 + pinctrl-names = "default", "default";
47 + pinctrl-0 = <&mmc0_pins_a>;
48 + pinctrl-1 = <&mmc0_cd_pin_reference_design>;
49 + cd-gpios = <&pio 7 1 0>; /* PH1 */
50 + status = "okay";
51 + };
52 +
53 usbphy: phy@01c13400 {
54 usb1_vbus-supply = <&reg_usb1_vbus>;
55 usb2_vbus-supply = <&reg_usb2_vbus>;
56 diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
57 index eeadf76..822cbe2 100644
58 --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
59 +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
60 @@ -31,6 +31,22 @@
61 status = "okay";
62 };
63
64 + mmc0: mmc@01c0f000 {
65 + pinctrl-names = "default", "default";
66 + pinctrl-0 = <&mmc0_pins_a>;
67 + pinctrl-1 = <&mmc0_cd_pin_reference_design>;
68 + cd-gpios = <&pio 7 1 0>; /* PH1 */
69 + status = "okay";
70 + };
71 +
72 + mmc3: mmc@01c12000 {
73 + pinctrl-names = "default", "default";
74 + pinctrl-0 = <&mmc3_pins_a>;
75 + pinctrl-1 = <&mmc3_cd_pin_olinuxinom>;
76 + cd-gpios = <&pio 7 11 0>; /* PH11 */
77 + status = "okay";
78 + };
79 +
80 usbphy: phy@01c13400 {
81 usb1_vbus-supply = <&reg_usb1_vbus>;
82 usb2_vbus-supply = <&reg_usb2_vbus>;
83 @@ -65,6 +81,13 @@
84 };
85
86 pinctrl@01c20800 {
87 + mmc3_cd_pin_olinuxinom: mmc3_cd_pin@0 {
88 + allwinner,pins = "PH11";
89 + allwinner,function = "gpio_in";
90 + allwinner,drive = <0>;
91 + allwinner,pull = <1>;
92 + };
93 +
94 led_pins_olinuxino: led_pins@0 {
95 allwinner,pins = "PH2";
96 allwinner,function = "gpio_out";
97 diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
98 index 4cc2f5f..1d9b314 100644
99 --- a/arch/arm/boot/dts/sun7i-a20.dtsi
100 +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
101 @@ -439,6 +439,50 @@
102 #size-cells = <0>;
103 };
104
105 + mmc0: mmc@01c0f000 {
106 + compatible = "allwinner,sun5i-a13-mmc";
107 + reg = <0x01c0f000 0x1000>;
108 + clocks = <&ahb_gates 8>, <&mmc0_clk>;
109 + clock-names = "ahb", "mod";
110 + interrupts = <0 32 4>;
111 + bus-width = <4>;
112 + cd-inverted;
113 + status = "disabled";
114 + };
115 +
116 + mmc1: mmc@01c10000 {
117 + compatible = "allwinner,sun5i-a13-mmc";
118 + reg = <0x01c10000 0x1000>;
119 + clocks = <&ahb_gates 9>, <&mmc1_clk>;
120 + clock-names = "ahb", "mod";
121 + interrupts = <0 33 4>;
122 + bus-width = <4>;
123 + cd-inverted;
124 + status = "disabled";
125 + };
126 +
127 + mmc2: mmc@01c11000 {
128 + compatible = "allwinner,sun5i-a13-mmc";
129 + reg = <0x01c11000 0x1000>;
130 + clocks = <&ahb_gates 10>, <&mmc2_clk>;
131 + clock-names = "ahb", "mod";
132 + interrupts = <0 34 4>;
133 + bus-width = <4>;
134 + cd-inverted;
135 + status = "disabled";
136 + };
137 +
138 + mmc3: mmc@01c12000 {
139 + compatible = "allwinner,sun5i-a13-mmc";
140 + reg = <0x01c12000 0x1000>;
141 + clocks = <&ahb_gates 11>, <&mmc3_clk>;
142 + clock-names = "ahb", "mod";
143 + interrupts = <0 35 4>;
144 + bus-width = <4>;
145 + cd-inverted;
146 + status = "disabled";
147 + };
148 +
149 usbphy: phy@01c13400 {
150 #phy-cells = <1>;
151 compatible = "allwinner,sun7i-a20-usb-phy";
152 @@ -645,6 +689,27 @@
153 allwinner,drive = <0>;
154 allwinner,pull = <0>;
155 };
156 +
157 + mmc0_pins_a: mmc0@0 {
158 + allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";
159 + allwinner,function = "mmc0";
160 + allwinner,drive = <2>;
161 + allwinner,pull = <0>;
162 + };
163 +
164 + mmc0_cd_pin_reference_design: mmc0_cd_pin@0 {
165 + allwinner,pins = "PH1";
166 + allwinner,function = "gpio_in";
167 + allwinner,drive = <0>;
168 + allwinner,pull = <1>;
169 + };
170 +
171 + mmc3_pins_a: mmc3@0 {
172 + allwinner,pins = "PI4","PI5","PI6","PI7","PI8","PI9";
173 + allwinner,function = "mmc3";
174 + allwinner,drive = <2>;
175 + allwinner,pull = <0>;
176 + };
177 };
178
179 timer@01c20c00 {
180 --
181 2.0.3
182