1 From 601b6a88cd14e655ccd246fe122cbf496a891cbb Mon Sep 17 00:00:00 2001
2 From: Alexander Bersenev <bay@hackerdom.ru>
3 Date: Mon, 9 Jun 2014 00:08:10 +0600
4 Subject: [PATCH] rc: add sunxi-ir driver
6 This patch adds driver for sunxi IR controller.
7 It is based on Alexsey Shestacov's work based on the original driver
10 Signed-off-by: Alexander Bersenev <bay@hackerdom.ru>
11 Signed-off-by: Alexsey Shestacov <wingrime@linux-sunxi.org>
13 drivers/media/rc/Kconfig | 10 ++
14 drivers/media/rc/Makefile | 1 +
15 drivers/media/rc/sunxi-cir.c | 318 +++++++++++++++++++++++++++++++++++++++++++
16 3 files changed, 329 insertions(+)
17 create mode 100644 drivers/media/rc/sunxi-cir.c
19 --- a/drivers/media/rc/Kconfig
20 +++ b/drivers/media/rc/Kconfig
21 @@ -332,4 +332,14 @@ config RC_ST
23 If you're not sure, select N here.
26 + tristate "SUNXI IR remote control"
28 + depends on ARCH_SUNXI
30 + Say Y if you want to use sunXi internal IR Controller
32 + To compile this driver as a module, choose M here: the module will
36 --- a/drivers/media/rc/Makefile
37 +++ b/drivers/media/rc/Makefile
38 @@ -31,3 +31,4 @@ obj-$(CONFIG_IR_GPIO_CIR) += gpio-ir-rec
39 obj-$(CONFIG_IR_IGUANA) += iguanair.o
40 obj-$(CONFIG_IR_TTUSBIR) += ttusbir.o
41 obj-$(CONFIG_RC_ST) += st_rc.o
42 +obj-$(CONFIG_IR_SUNXI) += sunxi-cir.o
44 +++ b/drivers/media/rc/sunxi-cir.c
47 + * Driver for Allwinner sunXi IR controller
49 + * Copyright (C) 2014 Alexsey Shestacov <wingrime@linux-sunxi.org>
50 + * Copyright (C) 2014 Alexander Bersenev <bay@hackerdom.ru>
52 + * Based on sun5i-ir.c:
53 + * Copyright (C) 2007-2012 Daniel Wang
54 + * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
56 + * This program is free software; you can redistribute it and/or
57 + * modify it under the terms of the GNU General Public License as
58 + * published by the Free Software Foundation; either version 2 of
59 + * the License, or (at your option) any later version.
61 + * This program is distributed in the hope that it will be useful,
62 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
63 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
64 + * GNU General Public License for more details.
67 +#include <linux/clk.h>
68 +#include <linux/interrupt.h>
69 +#include <linux/module.h>
70 +#include <linux/of_platform.h>
71 +#include <media/rc-core.h>
73 +#define SUNXI_IR_DEV "sunxi-ir"
77 +#define SUNXI_IR_CTL_REG 0x00
79 +#define REG_CTL_GEN BIT(0)
80 +/* RX block enable */
81 +#define REG_CTL_RXEN BIT(1)
83 +#define REG_CTL_MD (BIT(4) | BIT(5))
86 +#define SUNXI_IR_RXCTL_REG 0x10
87 +/* Pulse Polarity Invert flag */
88 +#define REG_RXCTL_RPPI BIT(2)
91 +#define SUNXI_IR_RXFIFO_REG 0x20
93 +/* Rx Interrupt Enable */
94 +#define SUNXI_IR_RXINT_REG 0x2C
95 +/* Rx FIFO Overflow */
96 +#define REG_RXINT_ROI_EN BIT(0)
98 +#define REG_RXINT_RPEI_EN BIT(1)
99 +/* Rx FIFO Data Available */
100 +#define REG_RXINT_RAI_EN BIT(4)
102 +/* Rx FIFO available byte level */
103 +#define REG_RXINT_RAL(val) (((val) << 8) & (GENMASK(11, 8)))
105 +/* Rx Interrupt Status */
106 +#define SUNXI_IR_RXSTA_REG 0x30
107 +/* RX FIFO Get Available Counter */
108 +#define REG_RXSTA_GET_AC(val) (((val) >> 8) & (GENMASK(5, 0)))
109 +/* Clear all interrupt status value */
110 +#define REG_RXSTA_CLEARALL 0xff
112 +/* IR Sample Config */
113 +#define SUNXI_IR_CIR_REG 0x34
114 +/* CIR_REG register noise threshold */
115 +#define REG_CIR_NTHR(val) (((val) << 2) & (GENMASK(7, 2)))
116 +/* CIR_REG register idle threshold */
117 +#define REG_CIR_ITHR(val) (((val) << 8) & (GENMASK(15, 8)))
119 +/* Hardware supported fifo size */
120 +#define SUNXI_IR_FIFO_SIZE 16
121 +/* How many messages in FIFO trigger IRQ */
122 +#define TRIGGER_LEVEL 8
123 +/* Required frequency for IR0 or IR1 clock in CIR mode */
124 +#define SUNXI_IR_BASE_CLK 8000000
125 +/* Frequency after IR internal divider */
126 +#define SUNXI_IR_CLK (SUNXI_IR_BASE_CLK / 64)
127 +/* Sample period in ns */
128 +#define SUNXI_IR_SAMPLE (1000000000ul / SUNXI_IR_CLK)
129 +/* Noise threshold in samples */
130 +#define SUNXI_IR_RXNOISE 1
131 +/* Idle Threshold in samples */
132 +#define SUNXI_IR_RXIDLE 20
133 +/* Time after which device stops sending data in ms */
134 +#define SUNXI_IR_TIMEOUT 120
137 + spinlock_t ir_lock;
139 + void __iomem *base;
142 + struct clk *apb_clk;
143 + const char *map_name;
146 +static irqreturn_t sunxi_ir_irq(int irqno, void *dev_id)
148 + unsigned long status;
150 + unsigned int cnt, rc;
151 + struct sunxi_ir *ir = dev_id;
152 + DEFINE_IR_RAW_EVENT(rawir);
154 + spin_lock(&ir->ir_lock);
156 + status = readl(ir->base + SUNXI_IR_RXSTA_REG);
158 + /* clean all pending statuses */
159 + writel(status | REG_RXSTA_CLEARALL, ir->base + SUNXI_IR_RXSTA_REG);
161 + if (status & REG_RXINT_RAI_EN) {
162 + /* How many messages in fifo */
163 + rc = REG_RXSTA_GET_AC(status);
165 + rc = rc > SUNXI_IR_FIFO_SIZE ? SUNXI_IR_FIFO_SIZE : rc;
166 + /* If we have data */
167 + for (cnt = 0; cnt < rc; cnt++) {
168 + /* for each bit in fifo */
169 + dt = readb(ir->base + SUNXI_IR_RXFIFO_REG);
170 + rawir.pulse = (dt & 0x80) != 0;
171 + rawir.duration = ((dt & 0x7f) + 1) * SUNXI_IR_SAMPLE;
172 + ir_raw_event_store_with_filter(ir->rc, &rawir);
176 + if (status & REG_RXINT_ROI_EN) {
177 + ir_raw_event_reset(ir->rc);
178 + } else if (status & REG_RXINT_RPEI_EN) {
179 + ir_raw_event_set_idle(ir->rc, true);
180 + ir_raw_event_handle(ir->rc);
183 + spin_unlock(&ir->ir_lock);
185 + return IRQ_HANDLED;
188 +static int sunxi_ir_probe(struct platform_device *pdev)
191 + unsigned long tmp = 0;
193 + struct device *dev = &pdev->dev;
194 + struct device_node *dn = dev->of_node;
195 + struct resource *res;
196 + struct sunxi_ir *ir;
198 + ir = devm_kzalloc(dev, sizeof(struct sunxi_ir), GFP_KERNEL);
203 + ir->apb_clk = devm_clk_get(dev, "apb");
204 + if (IS_ERR(ir->apb_clk)) {
205 + dev_err(dev, "failed to get a apb clock.\n");
206 + return PTR_ERR(ir->apb_clk);
208 + ir->clk = devm_clk_get(dev, "ir");
209 + if (IS_ERR(ir->clk)) {
210 + dev_err(dev, "failed to get a ir clock.\n");
211 + return PTR_ERR(ir->clk);
214 + ret = clk_set_rate(ir->clk, SUNXI_IR_BASE_CLK);
216 + dev_err(dev, "set ir base clock failed!\n");
220 + if (clk_prepare_enable(ir->apb_clk)) {
221 + dev_err(dev, "try to enable apb_ir_clk failed\n");
225 + if (clk_prepare_enable(ir->clk)) {
226 + dev_err(dev, "try to enable ir_clk failed\n");
228 + goto exit_clkdisable_apb_clk;
232 + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
233 + ir->base = devm_ioremap_resource(dev, res);
234 + if (IS_ERR(ir->base)) {
235 + dev_err(dev, "failed to map registers\n");
236 + ret = PTR_ERR(ir->base);
237 + goto exit_clkdisable_clk;
240 + ir->rc = rc_allocate_device();
242 + dev_err(dev, "failed to allocate device\n");
244 + goto exit_clkdisable_clk;
248 + ir->rc->input_name = SUNXI_IR_DEV;
249 + ir->rc->input_phys = "sunxi-ir/input0";
250 + ir->rc->input_id.bustype = BUS_HOST;
251 + ir->rc->input_id.vendor = 0x0001;
252 + ir->rc->input_id.product = 0x0001;
253 + ir->rc->input_id.version = 0x0100;
254 + ir->map_name = of_get_property(dn, "linux,rc-map-name", NULL);
255 + ir->rc->map_name = ir->map_name ?: RC_MAP_EMPTY;
256 + ir->rc->dev.parent = dev;
257 + ir->rc->driver_type = RC_DRIVER_IR_RAW;
258 + rc_set_allowed_protocols(ir->rc, RC_BIT_ALL);
259 + ir->rc->rx_resolution = SUNXI_IR_SAMPLE;
260 + ir->rc->timeout = MS_TO_NS(SUNXI_IR_TIMEOUT);
261 + ir->rc->driver_name = SUNXI_IR_DEV;
263 + ret = rc_register_device(ir->rc);
265 + dev_err(dev, "failed to register rc device\n");
266 + goto exit_free_dev;
269 + platform_set_drvdata(pdev, ir);
272 + ir->irq = platform_get_irq(pdev, 0);
274 + dev_err(dev, "no irq resource\n");
276 + goto exit_free_dev;
279 + ret = devm_request_irq(dev, ir->irq, sunxi_ir_irq, 0, SUNXI_IR_DEV, ir);
281 + dev_err(dev, "failed request irq\n");
282 + goto exit_free_dev;
285 + /* Enable CIR Mode */
286 + writel(REG_CTL_MD, ir->base+SUNXI_IR_CTL_REG);
288 + /* Set noise threshold and idle threshold */
289 + writel(REG_CIR_NTHR(SUNXI_IR_RXNOISE)|REG_CIR_ITHR(SUNXI_IR_RXIDLE),
290 + ir->base + SUNXI_IR_CIR_REG);
292 + /* Invert Input Signal */
293 + writel(REG_RXCTL_RPPI, ir->base + SUNXI_IR_RXCTL_REG);
295 + /* Clear All Rx Interrupt Status */
296 + writel(REG_RXSTA_CLEARALL, ir->base + SUNXI_IR_RXSTA_REG);
299 + * Enable IRQ on overflow, packet end, FIFO available with trigger
302 + writel(REG_RXINT_ROI_EN | REG_RXINT_RPEI_EN |
303 + REG_RXINT_RAI_EN | REG_RXINT_RAL(TRIGGER_LEVEL - 1),
304 + ir->base + SUNXI_IR_RXINT_REG);
306 + /* Enable IR Module */
307 + tmp = readl(ir->base + SUNXI_IR_CTL_REG);
308 + writel(tmp | REG_CTL_GEN | REG_CTL_RXEN, ir->base + SUNXI_IR_CTL_REG);
310 + dev_info(dev, "initialized sunXi IR driver\n");
314 + rc_free_device(ir->rc);
315 +exit_clkdisable_clk:
316 + clk_disable_unprepare(ir->clk);
317 +exit_clkdisable_apb_clk:
318 + clk_disable_unprepare(ir->apb_clk);
323 +static int sunxi_ir_remove(struct platform_device *pdev)
325 + unsigned long flags;
326 + struct sunxi_ir *ir = platform_get_drvdata(pdev);
328 + clk_disable_unprepare(ir->clk);
329 + clk_disable_unprepare(ir->apb_clk);
331 + spin_lock_irqsave(&ir->ir_lock, flags);
332 + /* disable IR IRQ */
333 + writel(0, ir->base + SUNXI_IR_RXINT_REG);
334 + /* clear All Rx Interrupt Status */
335 + writel(REG_RXSTA_CLEARALL, ir->base + SUNXI_IR_RXSTA_REG);
337 + writel(0, ir->base + SUNXI_IR_CTL_REG);
338 + spin_unlock_irqrestore(&ir->ir_lock, flags);
340 + rc_unregister_device(ir->rc);
344 +static const struct of_device_id sunxi_ir_match[] = {
345 + { .compatible = "allwinner,sun7i-a20-ir", },
349 +static struct platform_driver sunxi_ir_driver = {
350 + .probe = sunxi_ir_probe,
351 + .remove = sunxi_ir_remove,
353 + .name = SUNXI_IR_DEV,
354 + .owner = THIS_MODULE,
355 + .of_match_table = sunxi_ir_match,
359 +module_platform_driver(sunxi_ir_driver);
361 +MODULE_DESCRIPTION("Allwinner sunXi IR controller driver");
362 +MODULE_AUTHOR("Alexsey Shestacov <wingrime@linux-sunxi.org>");
363 +MODULE_LICENSE("GPL");