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[openwrt/staging/blogic.git] / target / linux / sunxi / patches-4.1 / 100-mfd-axp20x-add-axp22x-pmic.patch
1 From f05be589ff32e87821b86845625ed3d402d37dc7 Mon Sep 17 00:00:00 2001
2 From: Boris BREZILLON <boris.brezillon@free-electrons.com>
3 Date: Fri, 10 Apr 2015 12:09:01 +0800
4 Subject: [PATCH] mfd: axp20x: Add AXP22x PMIC support
5
6 Add support for the AXP22x PMIC devices to the existing AXP20x driver.
7 This includes the AXP221 and AXP223, which are identical except for
8 the external data bus. Only AXP221 is added for now. AXP223 will be
9 added after it's Reduced Serial Bus (RSB) interface is supported.
10
11 AXP22x defines a new set of registers, power supplies and regulators,
12 but most of the API is similar to the AXP20x ones.
13
14 A new irq chip definition is used, even though the available interrupts
15 on AXP22x is a subset of those on AXP20x. This is done so the interrupt
16 numbers match those on the datasheet.
17
18 This patch only enables the interrupts, system power-off function, and PEK
19 sub-device. The regulator driver must first support different variants
20 before we enable it from the mfd driver.
21
22 Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
23 [wens@csie.org: fix interrupts and move regulators to separate patch]
24 Signed-off-by: Chen-Yu Tsai <wens@csie.org>
25 Signed-off-by: Lee Jones <lee.jones@linaro.org>
26 ---
27 drivers/mfd/axp20x.c | 98 ++++++++++++++++++++++++++++++++++++++++++++++
28 include/linux/mfd/axp20x.h | 86 ++++++++++++++++++++++++++++++++++++++++
29 2 files changed, 184 insertions(+)
30
31 diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c
32 index d18029b..cfbb7d7 100644
33 --- a/drivers/mfd/axp20x.c
34 +++ b/drivers/mfd/axp20x.c
35 @@ -32,6 +32,7 @@
36 static const char * const axp20x_model_names[] = {
37 "AXP202",
38 "AXP209",
39 + "AXP221",
40 "AXP288",
41 };
42
43 @@ -54,6 +55,25 @@ static const struct regmap_access_table axp20x_volatile_table = {
44 .n_yes_ranges = ARRAY_SIZE(axp20x_volatile_ranges),
45 };
46
47 +static const struct regmap_range axp22x_writeable_ranges[] = {
48 + regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
49 + regmap_reg_range(AXP20X_DCDC_MODE, AXP22X_BATLOW_THRES1),
50 +};
51 +
52 +static const struct regmap_range axp22x_volatile_ranges[] = {
53 + regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
54 +};
55 +
56 +static const struct regmap_access_table axp22x_writeable_table = {
57 + .yes_ranges = axp22x_writeable_ranges,
58 + .n_yes_ranges = ARRAY_SIZE(axp22x_writeable_ranges),
59 +};
60 +
61 +static const struct regmap_access_table axp22x_volatile_table = {
62 + .yes_ranges = axp22x_volatile_ranges,
63 + .n_yes_ranges = ARRAY_SIZE(axp22x_volatile_ranges),
64 +};
65 +
66 static const struct regmap_range axp288_writeable_ranges[] = {
67 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE),
68 regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5),
69 @@ -87,6 +107,20 @@ static struct resource axp20x_pek_resources[] = {
70 },
71 };
72
73 +static struct resource axp22x_pek_resources[] = {
74 + {
75 + .name = "PEK_DBR",
76 + .start = AXP22X_IRQ_PEK_RIS_EDGE,
77 + .end = AXP22X_IRQ_PEK_RIS_EDGE,
78 + .flags = IORESOURCE_IRQ,
79 + }, {
80 + .name = "PEK_DBF",
81 + .start = AXP22X_IRQ_PEK_FAL_EDGE,
82 + .end = AXP22X_IRQ_PEK_FAL_EDGE,
83 + .flags = IORESOURCE_IRQ,
84 + },
85 +};
86 +
87 static struct resource axp288_fuel_gauge_resources[] = {
88 {
89 .start = AXP288_IRQ_QWBTU,
90 @@ -129,6 +163,15 @@ static const struct regmap_config axp20x_regmap_config = {
91 .cache_type = REGCACHE_RBTREE,
92 };
93
94 +static const struct regmap_config axp22x_regmap_config = {
95 + .reg_bits = 8,
96 + .val_bits = 8,
97 + .wr_table = &axp22x_writeable_table,
98 + .volatile_table = &axp22x_volatile_table,
99 + .max_register = AXP22X_BATLOW_THRES1,
100 + .cache_type = REGCACHE_RBTREE,
101 +};
102 +
103 static const struct regmap_config axp288_regmap_config = {
104 .reg_bits = 8,
105 .val_bits = 8,
106 @@ -181,6 +224,34 @@ static const struct regmap_irq axp20x_regmap_irqs[] = {
107 INIT_REGMAP_IRQ(AXP20X, GPIO0_INPUT, 4, 0),
108 };
109
110 +static const struct regmap_irq axp22x_regmap_irqs[] = {
111 + INIT_REGMAP_IRQ(AXP22X, ACIN_OVER_V, 0, 7),
112 + INIT_REGMAP_IRQ(AXP22X, ACIN_PLUGIN, 0, 6),
113 + INIT_REGMAP_IRQ(AXP22X, ACIN_REMOVAL, 0, 5),
114 + INIT_REGMAP_IRQ(AXP22X, VBUS_OVER_V, 0, 4),
115 + INIT_REGMAP_IRQ(AXP22X, VBUS_PLUGIN, 0, 3),
116 + INIT_REGMAP_IRQ(AXP22X, VBUS_REMOVAL, 0, 2),
117 + INIT_REGMAP_IRQ(AXP22X, VBUS_V_LOW, 0, 1),
118 + INIT_REGMAP_IRQ(AXP22X, BATT_PLUGIN, 1, 7),
119 + INIT_REGMAP_IRQ(AXP22X, BATT_REMOVAL, 1, 6),
120 + INIT_REGMAP_IRQ(AXP22X, BATT_ENT_ACT_MODE, 1, 5),
121 + INIT_REGMAP_IRQ(AXP22X, BATT_EXIT_ACT_MODE, 1, 4),
122 + INIT_REGMAP_IRQ(AXP22X, CHARG, 1, 3),
123 + INIT_REGMAP_IRQ(AXP22X, CHARG_DONE, 1, 2),
124 + INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_HIGH, 1, 1),
125 + INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_LOW, 1, 0),
126 + INIT_REGMAP_IRQ(AXP22X, DIE_TEMP_HIGH, 2, 7),
127 + INIT_REGMAP_IRQ(AXP22X, PEK_SHORT, 2, 1),
128 + INIT_REGMAP_IRQ(AXP22X, PEK_LONG, 2, 0),
129 + INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL1, 3, 1),
130 + INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL2, 3, 0),
131 + INIT_REGMAP_IRQ(AXP22X, TIMER, 4, 7),
132 + INIT_REGMAP_IRQ(AXP22X, PEK_RIS_EDGE, 4, 6),
133 + INIT_REGMAP_IRQ(AXP22X, PEK_FAL_EDGE, 4, 5),
134 + INIT_REGMAP_IRQ(AXP22X, GPIO1_INPUT, 4, 1),
135 + INIT_REGMAP_IRQ(AXP22X, GPIO0_INPUT, 4, 0),
136 +};
137 +
138 /* some IRQs are compatible with axp20x models */
139 static const struct regmap_irq axp288_regmap_irqs[] = {
140 INIT_REGMAP_IRQ(AXP288, VBUS_FALL, 0, 2),
141 @@ -224,6 +295,7 @@ static const struct regmap_irq axp288_regmap_irqs[] = {
142 static const struct of_device_id axp20x_of_match[] = {
143 { .compatible = "x-powers,axp202", .data = (void *) AXP202_ID },
144 { .compatible = "x-powers,axp209", .data = (void *) AXP209_ID },
145 + { .compatible = "x-powers,axp221", .data = (void *) AXP221_ID },
146 { },
147 };
148 MODULE_DEVICE_TABLE(of, axp20x_of_match);
149 @@ -258,6 +330,18 @@ static const struct regmap_irq_chip axp20x_regmap_irq_chip = {
150
151 };
152
153 +static const struct regmap_irq_chip axp22x_regmap_irq_chip = {
154 + .name = "axp22x_irq_chip",
155 + .status_base = AXP20X_IRQ1_STATE,
156 + .ack_base = AXP20X_IRQ1_STATE,
157 + .mask_base = AXP20X_IRQ1_EN,
158 + .mask_invert = true,
159 + .init_ack_masked = true,
160 + .irqs = axp22x_regmap_irqs,
161 + .num_irqs = ARRAY_SIZE(axp22x_regmap_irqs),
162 + .num_regs = 5,
163 +};
164 +
165 static const struct regmap_irq_chip axp288_regmap_irq_chip = {
166 .name = "axp288_irq_chip",
167 .status_base = AXP20X_IRQ1_STATE,
168 @@ -281,6 +365,14 @@ static struct mfd_cell axp20x_cells[] = {
169 },
170 };
171
172 +static struct mfd_cell axp22x_cells[] = {
173 + {
174 + .name = "axp20x-pek",
175 + .num_resources = ARRAY_SIZE(axp22x_pek_resources),
176 + .resources = axp22x_pek_resources,
177 + },
178 +};
179 +
180 static struct resource axp288_adc_resources[] = {
181 {
182 .name = "GPADC",
183 @@ -426,6 +518,12 @@ static int axp20x_match_device(struct axp20x_dev *axp20x, struct device *dev)
184 axp20x->regmap_cfg = &axp20x_regmap_config;
185 axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip;
186 break;
187 + case AXP221_ID:
188 + axp20x->nr_cells = ARRAY_SIZE(axp22x_cells);
189 + axp20x->cells = axp22x_cells;
190 + axp20x->regmap_cfg = &axp22x_regmap_config;
191 + axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip;
192 + break;
193 case AXP288_ID:
194 axp20x->cells = axp288_cells;
195 axp20x->nr_cells = ARRAY_SIZE(axp288_cells);
196 diff --git a/include/linux/mfd/axp20x.h b/include/linux/mfd/axp20x.h
197 index dfabd6d..95568eb 100644
198 --- a/include/linux/mfd/axp20x.h
199 +++ b/include/linux/mfd/axp20x.h
200 @@ -14,6 +14,7 @@
201 enum {
202 AXP202_ID = 0,
203 AXP209_ID,
204 + AXP221_ID,
205 AXP288_ID,
206 NR_AXP20X_VARIANTS,
207 };
208 @@ -45,6 +46,28 @@ enum {
209 #define AXP20X_V_LTF_DISCHRG 0x3c
210 #define AXP20X_V_HTF_DISCHRG 0x3d
211
212 +#define AXP22X_PWR_OUT_CTRL1 0x10
213 +#define AXP22X_PWR_OUT_CTRL2 0x12
214 +#define AXP22X_PWR_OUT_CTRL3 0x13
215 +#define AXP22X_DLDO1_V_OUT 0x15
216 +#define AXP22X_DLDO2_V_OUT 0x16
217 +#define AXP22X_DLDO3_V_OUT 0x17
218 +#define AXP22X_DLDO4_V_OUT 0x18
219 +#define AXP22X_ELDO1_V_OUT 0x19
220 +#define AXP22X_ELDO2_V_OUT 0x1a
221 +#define AXP22X_ELDO3_V_OUT 0x1b
222 +#define AXP22X_DC5LDO_V_OUT 0x1c
223 +#define AXP22X_DCDC1_V_OUT 0x21
224 +#define AXP22X_DCDC2_V_OUT 0x22
225 +#define AXP22X_DCDC3_V_OUT 0x23
226 +#define AXP22X_DCDC4_V_OUT 0x24
227 +#define AXP22X_DCDC5_V_OUT 0x25
228 +#define AXP22X_DCDC23_V_RAMP_CTRL 0x27
229 +#define AXP22X_ALDO1_V_OUT 0x28
230 +#define AXP22X_ALDO2_V_OUT 0x29
231 +#define AXP22X_ALDO3_V_OUT 0x2a
232 +#define AXP22X_CHRG_CTRL3 0x35
233 +
234 /* Interrupt */
235 #define AXP20X_IRQ1_EN 0x40
236 #define AXP20X_IRQ2_EN 0x41
237 @@ -100,6 +123,9 @@ enum {
238 #define AXP20X_VBUS_MON 0x8b
239 #define AXP20X_OVER_TMP 0x8f
240
241 +#define AXP22X_PWREN_CTRL1 0x8c
242 +#define AXP22X_PWREN_CTRL2 0x8d
243 +
244 /* GPIO */
245 #define AXP20X_GPIO0_CTRL 0x90
246 #define AXP20X_LDO5_V_OUT 0x91
247 @@ -108,6 +134,11 @@ enum {
248 #define AXP20X_GPIO20_SS 0x94
249 #define AXP20X_GPIO3_CTRL 0x95
250
251 +#define AXP22X_LDO_IO0_V_OUT 0x91
252 +#define AXP22X_LDO_IO1_V_OUT 0x93
253 +#define AXP22X_GPIO_STATE 0x94
254 +#define AXP22X_GPIO_PULL_DOWN 0x95
255 +
256 /* Battery */
257 #define AXP20X_CHRG_CC_31_24 0xb0
258 #define AXP20X_CHRG_CC_23_16 0xb1
259 @@ -120,6 +151,9 @@ enum {
260 #define AXP20X_CC_CTRL 0xb8
261 #define AXP20X_FG_RES 0xb9
262
263 +/* AXP22X specific registers */
264 +#define AXP22X_BATLOW_THRES1 0xe6
265 +
266 /* AXP288 specific registers */
267 #define AXP288_PMIC_ADC_H 0x56
268 #define AXP288_PMIC_ADC_L 0x57
269 @@ -158,6 +192,30 @@ enum {
270 AXP20X_REG_ID_MAX,
271 };
272
273 +enum {
274 + AXP22X_DCDC1 = 0,
275 + AXP22X_DCDC2,
276 + AXP22X_DCDC3,
277 + AXP22X_DCDC4,
278 + AXP22X_DCDC5,
279 + AXP22X_DC1SW,
280 + AXP22X_DC5LDO,
281 + AXP22X_ALDO1,
282 + AXP22X_ALDO2,
283 + AXP22X_ALDO3,
284 + AXP22X_ELDO1,
285 + AXP22X_ELDO2,
286 + AXP22X_ELDO3,
287 + AXP22X_DLDO1,
288 + AXP22X_DLDO2,
289 + AXP22X_DLDO3,
290 + AXP22X_DLDO4,
291 + AXP22X_RTC_LDO,
292 + AXP22X_LDO_IO0,
293 + AXP22X_LDO_IO1,
294 + AXP22X_REG_ID_MAX,
295 +};
296 +
297 /* IRQs */
298 enum {
299 AXP20X_IRQ_ACIN_OVER_V = 1,
300 @@ -199,6 +257,34 @@ enum {
301 AXP20X_IRQ_GPIO0_INPUT,
302 };
303
304 +enum axp22x_irqs {
305 + AXP22X_IRQ_ACIN_OVER_V = 1,
306 + AXP22X_IRQ_ACIN_PLUGIN,
307 + AXP22X_IRQ_ACIN_REMOVAL,
308 + AXP22X_IRQ_VBUS_OVER_V,
309 + AXP22X_IRQ_VBUS_PLUGIN,
310 + AXP22X_IRQ_VBUS_REMOVAL,
311 + AXP22X_IRQ_VBUS_V_LOW,
312 + AXP22X_IRQ_BATT_PLUGIN,
313 + AXP22X_IRQ_BATT_REMOVAL,
314 + AXP22X_IRQ_BATT_ENT_ACT_MODE,
315 + AXP22X_IRQ_BATT_EXIT_ACT_MODE,
316 + AXP22X_IRQ_CHARG,
317 + AXP22X_IRQ_CHARG_DONE,
318 + AXP22X_IRQ_BATT_TEMP_HIGH,
319 + AXP22X_IRQ_BATT_TEMP_LOW,
320 + AXP22X_IRQ_DIE_TEMP_HIGH,
321 + AXP22X_IRQ_PEK_SHORT,
322 + AXP22X_IRQ_PEK_LONG,
323 + AXP22X_IRQ_LOW_PWR_LVL1,
324 + AXP22X_IRQ_LOW_PWR_LVL2,
325 + AXP22X_IRQ_TIMER,
326 + AXP22X_IRQ_PEK_RIS_EDGE,
327 + AXP22X_IRQ_PEK_FAL_EDGE,
328 + AXP22X_IRQ_GPIO1_INPUT,
329 + AXP22X_IRQ_GPIO0_INPUT,
330 +};
331 +
332 enum axp288_irqs {
333 AXP288_IRQ_VBUS_FALL = 2,
334 AXP288_IRQ_VBUS_RISE,
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