1 From ef4bc8ab68979e5c1c30f061c5af1a7d6ec8eb52 Mon Sep 17 00:00:00 2001
2 From: Boris Brezillon <boris.brezillon@free-electrons.com>
3 Date: Tue, 21 Oct 2014 14:40:42 +0200
4 Subject: [PATCH] mtd: nand: sunxi: Add HW randomizer support
6 Add support for the HW randomizer available on the sunxi nand controller.
8 Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
9 Signed-off-by: Hans de Goede <hdegoede@redhat.com>
11 drivers/mtd/nand/sunxi_nand.c | 603 ++++++++++++++++++++++++++++++++++++++++--
12 1 file changed, 585 insertions(+), 18 deletions(-)
14 --- a/drivers/mtd/nand/sunxi_nand.c
15 +++ b/drivers/mtd/nand/sunxi_nand.c
16 @@ -210,10 +210,12 @@ struct sunxi_nand_hw_ecc {
18 * @part: base paritition structure
19 * @ecc: per-partition ECC info
20 + * @rnd: per-partition randomizer info
22 struct sunxi_nand_part {
23 struct nand_part part;
24 struct nand_ecc_ctrl ecc;
25 + struct nand_rnd_ctrl rnd;
28 static inline struct sunxi_nand_part *
29 @@ -223,6 +225,29 @@ to_sunxi_nand_part(struct nand_part *par
33 + * sunxi NAND randomizer structure: stores NAND randomizer information
35 + * @page: current page
36 + * @column: current column
37 + * @nseeds: seed table size
38 + * @seeds: seed table
39 + * @subseeds: pre computed sub seeds
40 + * @step: step function
41 + * @left: number of remaining bytes in the page
42 + * @state: current randomizer state
44 +struct sunxi_nand_hw_rnd {
50 + u16 (*step)(struct mtd_info *mtd, u16 state, int column, int *left);
56 * NAND chip structure: stores NAND chip device related information
58 * @node: used to store NAND chips into a list
59 @@ -237,6 +262,7 @@ struct sunxi_nand_chip {
60 struct list_head node;
61 struct nand_chip nand;
64 unsigned long clk_rate;
67 @@ -493,6 +519,185 @@ static void sunxi_nfc_write_buf(struct m
71 +static u16 sunxi_nfc_hwrnd_step(struct sunxi_nand_hw_rnd *rnd, u16 state, int count)
76 + state = ((state >> 1) |
77 + ((((state >> 0) ^ (state >> 1)) & 1) << 14)) & 0x7fff;
82 +static u16 sunxi_nfc_hwrnd_single_step(u16 state, int count)
86 + state = ((state >> 1) |
87 + ((((state >> 0) ^ (state >> 1)) & 1) << 14)) & 0x7fff;
92 +static int sunxi_nfc_hwrnd_config(struct mtd_info *mtd, int page, int column,
93 + enum nand_rnd_action action)
95 + struct nand_chip *nand = mtd->priv;
96 + struct sunxi_nand_chip *sunxi_nand = to_sunxi_nand(nand);
97 + struct sunxi_nand_hw_rnd *rnd = nand->cur_rnd->priv;
100 + if (page < 0 && column < 0) {
114 + if (page != rnd->page && action == NAND_RND_READ) {
117 + status = nand_page_get_status(mtd, page);
118 + if (status == NAND_PAGE_STATUS_UNKNOWN) {
119 + nand->cmdfunc(mtd, NAND_CMD_RNDOUT, 0, -1);
120 + sunxi_nfc_read_buf(mtd, sunxi_nand->buffer,
121 + mtd->writesize + mtd->oobsize);
123 + if (nand_page_is_empty(mtd, sunxi_nand->buffer,
124 + sunxi_nand->buffer +
126 + status = NAND_PAGE_EMPTY;
128 + status = NAND_PAGE_FILLED;
130 + nand_page_set_status(mtd, page, status);
131 + nand->cmdfunc(mtd, NAND_CMD_RNDOUT, column, -1);
135 + state = rnd->seeds[page % rnd->nseeds];
137 + rnd->column = column;
140 + rnd->state = rnd->step(mtd, state, column, &rnd->left);
142 + rnd->state = sunxi_nfc_hwrnd_step(rnd, state, column % 4096);
143 + rnd->left = mtd->oobsize + mtd->writesize - column;
149 +static void sunxi_nfc_hwrnd_write_buf(struct mtd_info *mtd, const uint8_t *buf,
152 + struct nand_chip *nand = mtd->priv;
153 + struct sunxi_nfc *nfc = to_sunxi_nfc(nand->controller);
154 + struct sunxi_nand_hw_rnd *rnd = nand->cur_rnd->priv;
155 + u32 tmp = readl(nfc->regs + NFC_REG_ECC_CTL);
160 + tmp &= ~(NFC_RANDOM_DIRECTION | NFC_RANDOM_SEED | NFC_RANDOM_EN);
161 + writel(tmp, nfc->regs + NFC_REG_ECC_CTL);
163 + if (rnd->page < 0) {
164 + sunxi_nfc_write_buf(mtd, buf, len);
168 + while (len > offs) {
173 + rndactiv = nand_rnd_is_activ(mtd, rnd->page, rnd->column,
175 + if (rndactiv > 0) {
176 + writel(tmp | NFC_RANDOM_EN | (rnd->state << 16),
177 + nfc->regs + NFC_REG_ECC_CTL);
178 + if (rnd->left < cnt)
182 + sunxi_nfc_write_buf(mtd, buf + offs, cnt);
185 + writel(tmp & ~NFC_RANDOM_EN,
186 + nfc->regs + NFC_REG_ECC_CTL);
192 + sunxi_nfc_hwrnd_config(mtd, -1, rnd->column + cnt, NAND_RND_WRITE);
196 +static void sunxi_nfc_hwrnd_read_buf(struct mtd_info *mtd, uint8_t *buf,
199 + struct nand_chip *nand = mtd->priv;
200 + struct sunxi_nfc *nfc = to_sunxi_nfc(nand->controller);
201 + struct sunxi_nand_hw_rnd *rnd = nand->cur_rnd->priv;
202 + u32 tmp = readl(nfc->regs + NFC_REG_ECC_CTL);
207 + tmp &= ~(NFC_RANDOM_DIRECTION | NFC_RANDOM_SEED | NFC_RANDOM_EN);
208 + writel(tmp, nfc->regs + NFC_REG_ECC_CTL);
210 + if (rnd->page < 0) {
211 + sunxi_nfc_read_buf(mtd, buf, len);
215 + while (len > offs) {
220 + if (nand_page_get_status(mtd, rnd->page) != NAND_PAGE_EMPTY &&
221 + nand_rnd_is_activ(mtd, rnd->page, rnd->column, &cnt) > 0)
226 + if (rndactiv > 0) {
227 + writel(tmp | NFC_RANDOM_EN | (rnd->state << 16),
228 + nfc->regs + NFC_REG_ECC_CTL);
229 + if (rnd->left < cnt)
234 + sunxi_nfc_read_buf(mtd, buf + offs, cnt);
236 + sunxi_nfc_read_buf(mtd, NULL, cnt);
239 + writel(tmp & ~NFC_RANDOM_EN,
240 + nfc->regs + NFC_REG_ECC_CTL);
246 + sunxi_nfc_hwrnd_config(mtd, -1, rnd->column + cnt, NAND_RND_READ);
250 static uint8_t sunxi_nfc_read_byte(struct mtd_info *mtd)
253 @@ -542,16 +747,43 @@ static int sunxi_nfc_hw_ecc_read_page(st
254 int oob_required, int page)
256 struct sunxi_nfc *nfc = to_sunxi_nfc(chip->controller);
257 + struct sunxi_nand_chip *sunxi_nand = to_sunxi_nand(chip);
258 struct nand_ecc_ctrl *ecc = chip->cur_ecc;
259 struct nand_ecclayout *layout = ecc->layout;
260 struct sunxi_nand_hw_ecc *data = ecc->priv;
261 unsigned int max_bitflips = 0;
269 + status = nand_page_get_status(mtd, page);
270 + if (status == NAND_PAGE_STATUS_UNKNOWN) {
271 + chip->cmdfunc(mtd, NAND_CMD_RNDOUT, 0, -1);
272 + sunxi_nfc_read_buf(mtd, sunxi_nand->buffer,
273 + mtd->writesize + mtd->oobsize);
275 + if (nand_page_is_empty(mtd, sunxi_nand->buffer,
276 + sunxi_nand->buffer +
278 + status = NAND_PAGE_EMPTY;
280 + status = NAND_PAGE_FILLED;
281 + chip->cmdfunc(mtd, NAND_CMD_RNDOUT, 0, -1);
284 + nand_page_set_status(mtd, page, status);
287 + if (status == NAND_PAGE_EMPTY) {
288 + memset(buf, 0xff, mtd->writesize);
290 + memset(chip->oob_poi, 0xff, mtd->oobsize);
294 tmp = readl(nfc->regs + NFC_REG_ECC_CTL);
295 tmp &= ~(NFC_ECC_MODE | NFC_ECC_PIPELINE | NFC_ECC_BLOCK_SIZE);
296 tmp |= NFC_ECC_EN | (data->mode << NFC_ECC_MODE_SHIFT) |
297 @@ -560,12 +792,15 @@ static int sunxi_nfc_hw_ecc_read_page(st
298 writel(tmp, nfc->regs + NFC_REG_ECC_CTL);
300 for (i = 0; i < ecc->steps; i++) {
301 + bool rndactiv = false;
304 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, i * ecc->size, -1);
306 offset = mtd->writesize + layout->eccpos[i * ecc->bytes] - 4;
308 - chip->read_buf(mtd, NULL, ecc->size);
309 + nand_rnd_config(mtd, page, i * ecc->size, NAND_RND_READ);
310 + nand_rnd_read_buf(mtd, NULL, ecc->size);
312 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, offset, -1);
314 @@ -573,6 +808,25 @@ static int sunxi_nfc_hw_ecc_read_page(st
319 + cnt = ecc->bytes + 4;
320 + if (nand_rnd_is_activ(mtd, page, offset, &cnt) > 0 &&
321 + cnt == ecc->bytes + 4)
324 + cnt = ecc->bytes + 2;
325 + if (nand_rnd_is_activ(mtd, page, offset + 2, &cnt) > 0 &&
326 + cnt == ecc->bytes + 2)
331 + tmp = readl(nfc->regs + NFC_REG_ECC_CTL);
332 + tmp &= ~(NFC_RANDOM_DIRECTION | NFC_ECC_EXCEPTION);
333 + tmp |= NFC_RANDOM_EN;
334 + writel(tmp, nfc->regs + NFC_REG_ECC_CTL);
337 tmp = NFC_DATA_TRANS | NFC_DATA_SWAP_METHOD | (1 << 30);
338 writel(tmp, nfc->regs + NFC_REG_CMD);
340 @@ -583,6 +837,9 @@ static int sunxi_nfc_hw_ecc_read_page(st
341 memcpy_fromio(buf + (i * ecc->size),
342 nfc->regs + NFC_RAM0_BASE, ecc->size);
344 + writel(readl(nfc->regs + NFC_REG_ECC_CTL) & ~NFC_RANDOM_EN,
345 + nfc->regs + NFC_REG_ECC_CTL);
347 if (readl(nfc->regs + NFC_REG_ECC_ST) & 0x1) {
348 mtd->ecc_stats.failed++;
350 @@ -598,9 +855,10 @@ static int sunxi_nfc_hw_ecc_read_page(st
354 + nand_rnd_config(mtd, -1, offset, NAND_RND_READ);
355 offset -= mtd->writesize;
356 - chip->read_buf(mtd, chip->oob_poi + offset,
358 + nand_rnd_read_buf(mtd, chip->oob_poi + offset,
363 @@ -610,11 +868,14 @@ static int sunxi_nfc_hw_ecc_read_page(st
364 offset = mtd->writesize +
365 ecc->layout->oobfree[ecc->steps].offset;
366 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, offset, -1);
367 + nand_rnd_config(mtd, -1, offset, NAND_RND_READ);
368 offset -= mtd->writesize;
369 - chip->read_buf(mtd, chip->oob_poi + offset, cnt);
370 + nand_rnd_read_buf(mtd, chip->oob_poi + offset, cnt);
374 + nand_rnd_config(mtd, -1, -1, NAND_RND_READ);
376 tmp = readl(nfc->regs + NFC_REG_ECC_CTL);
379 @@ -631,6 +892,7 @@ static int sunxi_nfc_hw_ecc_write_page(s
380 struct nand_ecc_ctrl *ecc = chip->cur_ecc;
381 struct nand_ecclayout *layout = ecc->layout;
382 struct sunxi_nand_hw_ecc *data = ecc->priv;
383 + struct sunxi_nand_hw_rnd *rnd = chip->cur_rnd->priv;
387 @@ -645,17 +907,57 @@ static int sunxi_nfc_hw_ecc_write_page(s
388 writel(tmp, nfc->regs + NFC_REG_ECC_CTL);
390 for (i = 0; i < ecc->steps; i++) {
391 + bool rndactiv = false;
395 chip->cmdfunc(mtd, NAND_CMD_RNDIN, i * ecc->size, -1);
397 - chip->write_buf(mtd, buf + (i * ecc->size), ecc->size);
398 + nand_rnd_config(mtd, -1, i * ecc->size, NAND_RND_WRITE);
399 + nand_rnd_write_buf(mtd, buf + (i * ecc->size), ecc->size);
401 offset = layout->eccpos[i * ecc->bytes] - 4 + mtd->writesize;
403 /* Fill OOB data in */
404 - writel(NFC_BUF_TO_USER_DATA(chip->oob_poi +
405 - layout->oobfree[i].offset),
406 - nfc->regs + NFC_REG_USER_DATA_BASE);
408 + memset(oob_buf, 0xff, 4);
411 + chip->oob_poi + layout->oobfree[i].offset,
415 + memcpy_toio(nfc->regs + NFC_REG_USER_DATA_BASE, oob_buf, 4);
418 + cnt = ecc->bytes + 4;
420 + nand_rnd_is_activ(mtd, -1, offset, &cnt) > 0 &&
421 + cnt == ecc->bytes + 4)
424 + cnt = ecc->bytes + 2;
426 + nand_rnd_is_activ(mtd, -1, offset + 2, &cnt) > 0 &&
427 + cnt == ecc->bytes + 2)
432 + /* pre randomize to generate FF patterns on the NAND */
434 + u16 state = rnd->subseeds[rnd->page % rnd->nseeds];
435 + state = sunxi_nfc_hwrnd_single_step(state, 15);
436 + oob_buf[0] ^= state;
437 + state = sunxi_nfc_hwrnd_step(rnd, state, 1);
438 + oob_buf[1] ^= state;
439 + memcpy_toio(nfc->regs + NFC_REG_USER_DATA_BASE, oob_buf, 4);
441 + tmp = readl(nfc->regs + NFC_REG_ECC_CTL);
442 + tmp &= ~(NFC_RANDOM_DIRECTION | NFC_ECC_EXCEPTION);
443 + tmp |= NFC_RANDOM_EN;
444 + writel(tmp, nfc->regs + NFC_REG_ECC_CTL);
447 chip->cmdfunc(mtd, NAND_CMD_RNDIN, offset, -1);
449 @@ -669,6 +971,9 @@ static int sunxi_nfc_hw_ecc_write_page(s
450 ret = sunxi_nfc_wait_int(nfc, NFC_CMD_INT_FLAG, 0);
454 + writel(readl(nfc->regs + NFC_REG_ECC_CTL) & ~NFC_RANDOM_EN,
455 + nfc->regs + NFC_REG_ECC_CTL);
459 @@ -677,11 +982,14 @@ static int sunxi_nfc_hw_ecc_write_page(s
460 offset = mtd->writesize +
461 ecc->layout->oobfree[i].offset;
462 chip->cmdfunc(mtd, NAND_CMD_RNDIN, offset, -1);
463 + nand_rnd_config(mtd, -1, offset, NAND_RND_WRITE);
464 offset -= mtd->writesize;
465 - chip->write_buf(mtd, chip->oob_poi + offset, cnt);
466 + nand_rnd_write_buf(mtd, chip->oob_poi + offset, cnt);
470 + nand_rnd_config(mtd, -1, -1, NAND_RND_WRITE);
472 tmp = readl(nfc->regs + NFC_REG_ECC_CTL);
475 @@ -690,22 +998,76 @@ static int sunxi_nfc_hw_ecc_write_page(s
479 +static u16 sunxi_nfc_hw_ecc_rnd_steps(struct mtd_info *mtd, u16 state,
480 + int column, int *left)
482 + struct nand_chip *chip = mtd->priv;
483 + struct nand_ecc_ctrl *ecc = chip->cur_ecc;
484 + struct sunxi_nand_hw_rnd *rnd = chip->cur_rnd->priv;
485 + int nblks = mtd->writesize / ecc->size;
486 + int modsize = ecc->size;
489 + if (column < mtd->writesize) {
490 + steps = column % modsize;
491 + *left = modsize - steps;
492 + } else if (column < mtd->writesize +
493 + (nblks * (ecc->bytes + 4))) {
494 + column -= mtd->writesize;
495 + steps = column % (ecc->bytes + 4);
496 + *left = ecc->bytes + 4 - steps;
497 + state = rnd->subseeds[rnd->page % rnd->nseeds];
499 + steps = column % 4096;
500 + *left = mtd->writesize + mtd->oobsize - column;
503 + return sunxi_nfc_hwrnd_step(rnd, state, steps);
506 static int sunxi_nfc_hw_syndrome_ecc_read_page(struct mtd_info *mtd,
507 struct nand_chip *chip,
508 uint8_t *buf, int oob_required,
511 struct sunxi_nfc *nfc = to_sunxi_nfc(chip->controller);
512 + struct sunxi_nand_chip *sunxi_nand = to_sunxi_nand(chip);
513 struct nand_ecc_ctrl *ecc = chip->cur_ecc;
514 struct sunxi_nand_hw_ecc *data = ecc->priv;
515 unsigned int max_bitflips = 0;
516 uint8_t *oob = chip->oob_poi;
524 + status = nand_page_get_status(mtd, page);
525 + if (status == NAND_PAGE_STATUS_UNKNOWN) {
526 + chip->cmdfunc(mtd, NAND_CMD_RNDOUT, 0, -1);
527 + sunxi_nfc_read_buf(mtd, sunxi_nand->buffer,
528 + mtd->writesize + mtd->oobsize);
530 + if (nand_page_is_empty(mtd, sunxi_nand->buffer,
531 + sunxi_nand->buffer +
533 + status = NAND_PAGE_EMPTY;
535 + status = NAND_PAGE_FILLED;
536 + chip->cmdfunc(mtd, NAND_CMD_RNDOUT, 0, -1);
539 + nand_page_set_status(mtd, page, status);
542 + if (status == NAND_PAGE_EMPTY) {
543 + memset(buf, 0xff, mtd->writesize);
545 + memset(chip->oob_poi, 0xff, mtd->oobsize);
549 tmp = readl(nfc->regs + NFC_REG_ECC_CTL);
550 tmp &= ~(NFC_ECC_MODE | NFC_ECC_PIPELINE | NFC_ECC_BLOCK_SIZE);
551 tmp |= NFC_ECC_EN | (data->mode << NFC_ECC_MODE_SHIFT) |
552 @@ -714,7 +1076,17 @@ static int sunxi_nfc_hw_syndrome_ecc_rea
553 writel(tmp, nfc->regs + NFC_REG_ECC_CTL);
555 for (i = 0; i < ecc->steps; i++) {
556 - chip->read_buf(mtd, NULL, ecc->size);
557 + nand_rnd_config(mtd, page, offset, NAND_RND_READ);
558 + nand_rnd_read_buf(mtd, NULL, ecc->size);
560 + cnt = ecc->bytes + 4;
561 + if (nand_rnd_is_activ(mtd, page, offset, &cnt) > 0 &&
562 + cnt == ecc->bytes + 4) {
563 + tmp = readl(nfc->regs + NFC_REG_ECC_CTL);
564 + tmp &= ~(NFC_RANDOM_DIRECTION | NFC_ECC_EXCEPTION);
565 + tmp |= NFC_RANDOM_EN;
566 + writel(tmp, nfc->regs + NFC_REG_ECC_CTL);
569 tmp = NFC_DATA_TRANS | NFC_DATA_SWAP_METHOD | (1 << 30);
570 writel(tmp, nfc->regs + NFC_REG_CMD);
571 @@ -727,6 +1099,9 @@ static int sunxi_nfc_hw_syndrome_ecc_rea
575 + writel(readl(nfc->regs + NFC_REG_ECC_CTL) & ~NFC_RANDOM_EN,
576 + nfc->regs + NFC_REG_ECC_CTL);
578 if (readl(nfc->regs + NFC_REG_ECC_ST) & 0x1) {
579 mtd->ecc_stats.failed++;
581 @@ -737,7 +1112,8 @@ static int sunxi_nfc_hw_syndrome_ecc_rea
584 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, offset, -1);
585 - chip->read_buf(mtd, oob, ecc->bytes + ecc->prepad);
586 + nand_rnd_config(mtd, -1, offset, NAND_RND_READ);
587 + nand_rnd_read_buf(mtd, oob, ecc->bytes + ecc->prepad);
588 oob += ecc->bytes + ecc->prepad;
591 @@ -748,10 +1124,13 @@ static int sunxi_nfc_hw_syndrome_ecc_rea
592 cnt = mtd->oobsize - (oob - chip->oob_poi);
594 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, offset, -1);
595 - chip->read_buf(mtd, oob, cnt);
596 + nand_rnd_config(mtd, page, offset, NAND_RND_READ);
597 + nand_rnd_read_buf(mtd, oob, cnt);
601 + nand_rnd_config(mtd, -1, -1, NAND_RND_READ);
603 writel(readl(nfc->regs + NFC_REG_ECC_CTL) & ~NFC_ECC_EN,
604 nfc->regs + NFC_REG_ECC_CTL);
606 @@ -766,6 +1145,7 @@ static int sunxi_nfc_hw_syndrome_ecc_wri
607 struct sunxi_nfc *nfc = to_sunxi_nfc(chip->controller);
608 struct nand_ecc_ctrl *ecc = chip->cur_ecc;
609 struct sunxi_nand_hw_ecc *data = ecc->priv;
610 + struct sunxi_nand_hw_rnd *rnd = chip->cur_rnd->priv;
611 uint8_t *oob = chip->oob_poi;
614 @@ -781,13 +1161,24 @@ static int sunxi_nfc_hw_syndrome_ecc_wri
615 writel(tmp, nfc->regs + NFC_REG_ECC_CTL);
617 for (i = 0; i < ecc->steps; i++) {
618 - chip->write_buf(mtd, buf + (i * ecc->size), ecc->size);
619 + nand_rnd_config(mtd, -1, offset, NAND_RND_WRITE);
620 + nand_rnd_write_buf(mtd, buf + (i * ecc->size), ecc->size);
623 /* Fill OOB data in */
624 writel(NFC_BUF_TO_USER_DATA(oob),
625 nfc->regs + NFC_REG_USER_DATA_BASE);
627 + cnt = ecc->bytes + 4;
629 + nand_rnd_is_activ(mtd, rnd->page, offset, &cnt) > 0 &&
630 + cnt == ecc->bytes + 4) {
631 + tmp = readl(nfc->regs + NFC_REG_ECC_CTL);
632 + tmp &= ~(NFC_RANDOM_DIRECTION | NFC_ECC_EXCEPTION);
633 + tmp |= NFC_RANDOM_EN;
634 + writel(tmp, nfc->regs + NFC_REG_ECC_CTL);
637 tmp = NFC_DATA_TRANS | NFC_DATA_SWAP_METHOD | NFC_ACCESS_DIR |
639 writel(tmp, nfc->regs + NFC_REG_CMD);
640 @@ -796,6 +1187,9 @@ static int sunxi_nfc_hw_syndrome_ecc_wri
644 + writel(readl(nfc->regs + NFC_REG_ECC_CTL) & ~NFC_RANDOM_EN,
645 + nfc->regs + NFC_REG_ECC_CTL);
647 offset += ecc->bytes + ecc->prepad;
648 oob += ecc->bytes + ecc->prepad;
650 @@ -804,9 +1198,11 @@ static int sunxi_nfc_hw_syndrome_ecc_wri
651 cnt = mtd->oobsize - (oob - chip->oob_poi);
653 chip->cmdfunc(mtd, NAND_CMD_RNDIN, offset, -1);
654 - chip->write_buf(mtd, oob, cnt);
655 + nand_rnd_config(mtd, -1, offset, NAND_RND_WRITE);
656 + nand_rnd_write_buf(mtd, oob, cnt);
659 + nand_rnd_config(mtd, -1, -1, NAND_RND_WRITE);
661 tmp = readl(nfc->regs + NFC_REG_ECC_CTL);
663 @@ -816,6 +1212,128 @@ static int sunxi_nfc_hw_syndrome_ecc_wri
667 +static u16 sunxi_nfc_hw_syndrome_ecc_rnd_steps(struct mtd_info *mtd, u16 state,
668 + int column, int *left)
670 + struct nand_chip *chip = mtd->priv;
671 + struct nand_ecc_ctrl *ecc = chip->cur_ecc;
672 + struct sunxi_nand_hw_rnd *rnd = chip->cur_rnd->priv;
673 + int eccsteps = mtd->writesize / ecc->size;
674 + int modsize = ecc->size + ecc->prepad + ecc->bytes;
677 + if (column < (eccsteps * modsize)) {
678 + steps = column % modsize;
679 + *left = modsize - steps;
680 + if (steps >= ecc->size) {
681 + steps -= ecc->size;
682 + state = rnd->subseeds[rnd->page % rnd->nseeds];
685 + steps = column % 4096;
686 + *left = mtd->writesize + mtd->oobsize - column;
689 + return sunxi_nfc_hwrnd_step(rnd, state, steps);
692 +static u16 default_seeds[] = {0x4a80};
694 +static void sunxi_nand_rnd_ctrl_cleanup(struct nand_rnd_ctrl *rnd)
696 + struct sunxi_nand_hw_rnd *hwrnd = rnd->priv;
698 + if (hwrnd->seeds != default_seeds)
699 + kfree(hwrnd->seeds);
700 + kfree(hwrnd->subseeds);
701 + kfree(rnd->layout);
705 +static int sunxi_nand_rnd_ctrl_init(struct mtd_info *mtd,
706 + struct nand_rnd_ctrl *rnd,
707 + struct nand_ecc_ctrl *ecc,
708 + struct device_node *np)
710 + struct sunxi_nand_hw_rnd *hwrnd;
711 + struct nand_rnd_layout *layout = NULL;
714 + hwrnd = kzalloc(sizeof(*hwrnd), GFP_KERNEL);
718 + hwrnd->seeds = default_seeds;
719 + hwrnd->nseeds = ARRAY_SIZE(default_seeds);
721 + if (of_get_property(np, "nand-randomizer-seeds", &ret)) {
722 + hwrnd->nseeds = ret / sizeof(*hwrnd->seeds);
723 + hwrnd->seeds = kzalloc(hwrnd->nseeds * sizeof(*hwrnd->seeds),
725 + if (!hwrnd->seeds) {
730 + ret = of_property_read_u16_array(np, "nand-randomizer-seeds",
731 + hwrnd->seeds, hwrnd->nseeds);
736 + switch (ecc->mode) {
737 + case NAND_ECC_HW_SYNDROME:
738 + hwrnd->step = sunxi_nfc_hw_syndrome_ecc_rnd_steps;
742 + hwrnd->step = sunxi_nfc_hw_ecc_rnd_steps;
745 + layout = kzalloc(sizeof(*layout) + sizeof(struct nand_rndfree),
751 + layout->nranges = 1;
752 + layout->ranges[0].offset = mtd->writesize;
753 + layout->ranges[0].length = 2;
754 + rnd->layout = layout;
758 + if (ecc->mode == NAND_ECC_HW_SYNDROME || ecc->mode == NAND_ECC_HW) {
761 + hwrnd->subseeds = kzalloc(hwrnd->nseeds *
762 + sizeof(*hwrnd->subseeds),
764 + if (!hwrnd->subseeds) {
769 + for (i = 0; i < hwrnd->nseeds; i++)
770 + hwrnd->subseeds[i] = sunxi_nfc_hwrnd_step(hwrnd,
775 + rnd->config = sunxi_nfc_hwrnd_config;
776 + rnd->read_buf = sunxi_nfc_hwrnd_read_buf;
777 + rnd->write_buf = sunxi_nfc_hwrnd_write_buf;
789 static int sunxi_nand_chip_set_timings(struct sunxi_nand_chip *chip,
790 const struct nand_sdr_timings *timings)
792 @@ -1076,6 +1594,40 @@ static int sunxi_nand_hw_syndrome_ecc_ct
796 +static void sunxi_nand_rnd_cleanup(struct nand_rnd_ctrl *rnd)
798 + switch (rnd->mode) {
800 + sunxi_nand_rnd_ctrl_cleanup(rnd);
807 +static int sunxi_nand_rnd_init(struct mtd_info *mtd,
808 + struct nand_rnd_ctrl *rnd,
809 + struct nand_ecc_ctrl *ecc,
810 + struct device_node *np)
814 + rnd->mode = NAND_RND_NONE;
816 + ret = of_get_nand_rnd_mode(np);
820 + switch (rnd->mode) {
822 + return sunxi_nand_rnd_ctrl_init(mtd, rnd, ecc, np);
830 static void sunxi_nand_ecc_cleanup(struct nand_ecc_ctrl *ecc)
833 @@ -1167,7 +1719,14 @@ struct nand_part *sunxi_ofnandpart_parse
837 + ret = sunxi_nand_rnd_init(master, &part->rnd, &part->ecc, pp);
839 + sunxi_nand_ecc_cleanup(&part->ecc);
843 part->part.ecc = &part->ecc;
844 + part->part.rnd = &part->rnd;
848 @@ -1292,18 +1851,30 @@ static int sunxi_nand_chip_init(struct d
852 + chip->buffer = kzalloc(mtd->writesize + mtd->oobsize, GFP_KERNEL);
856 ret = sunxi_nand_chip_init_timings(chip, np);
858 dev_err(dev, "could not configure chip timings: %d\n", ret);
862 + ret = nand_pst_create(mtd);
866 ret = sunxi_nand_ecc_init(mtd, &nand->ecc, np);
868 dev_err(dev, "ECC init failed: %d\n", ret);
872 + ret = sunxi_nand_rnd_init(mtd, &nand->rnd, &nand->ecc, np);
876 ret = nand_scan_tail(mtd);
878 dev_err(dev, "nand_scan_tail failed: %d\n", ret);
879 @@ -1360,6 +1931,8 @@ static void sunxi_nand_chips_cleanup(str
880 nand_release(&chip->mtd);
881 sunxi_nand_ecc_cleanup(&chip->nand.ecc);
882 list_del(&chip->node);
883 + sunxi_nand_rnd_cleanup(&chip->nand.rnd);
884 + kfree(chip->buffer);