1 From f98121f3ef3d36f4d040b11ab38f15387f6eefa2 Mon Sep 17 00:00:00 2001
2 From: Arnd Bergmann <arnd@arndb.de>
3 Date: Wed, 30 Nov 2016 15:08:55 +0100
4 Subject: arm64: dts: fix build errors from missing dependencies
6 Two branches were incorrectly sent without having the necessary
7 header file changes. Rather than back those out now, I'm replacing
8 the symbolic names for the clks and resets with the numeric
9 values to get 'make allmodconfig dtbs' back to work.
11 After the header file changes are merged, we can revert this
14 Fixes: 6bc37fa ("arm64: dts: add Allwinner A64 SoC .dtsi")
15 Fixes: 50784e6 ("dts: arm64: db820c: add pmic pins specific dts file")
16 Acked-by: Andre Przywara <andre.przywara@arm.com>
17 Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
18 Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
19 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
21 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 36 ++++++++++------------
22 .../boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi | 2 +-
23 2 files changed, 18 insertions(+), 20 deletions(-)
25 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
26 +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
28 * OTHER DEALINGS IN THE SOFTWARE.
31 -#include <dt-bindings/clock/sun50i-a64-ccu.h>
32 #include <dt-bindings/interrupt-controller/arm-gic.h>
33 #include <dt-bindings/pinctrl/sun4i-a10.h>
34 -#include <dt-bindings/reset/sun50i-a64-ccu.h>
37 interrupt-parent = <&gic>;
39 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
40 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
41 <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
42 - clocks = <&ccu CLK_BUS_PIO>;
48 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
51 - clocks = <&ccu CLK_BUS_UART0>;
52 - resets = <&ccu RST_BUS_UART0>;
59 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
62 - clocks = <&ccu CLK_BUS_UART1>;
63 - resets = <&ccu RST_BUS_UART1>;
70 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
73 - clocks = <&ccu CLK_BUS_UART2>;
74 - resets = <&ccu RST_BUS_UART2>;
81 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
84 - clocks = <&ccu CLK_BUS_UART3>;
85 - resets = <&ccu RST_BUS_UART3>;
92 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
95 - clocks = <&ccu CLK_BUS_UART4>;
96 - resets = <&ccu RST_BUS_UART4>;
103 compatible = "allwinner,sun6i-a31-i2c";
104 reg = <0x01c2ac00 0x400>;
105 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
106 - clocks = <&ccu CLK_BUS_I2C0>;
107 - resets = <&ccu RST_BUS_I2C0>;
108 + clocks = <&ccu 63>;
109 + resets = <&ccu 42>;
111 #address-cells = <1>;
114 compatible = "allwinner,sun6i-a31-i2c";
115 reg = <0x01c2b000 0x400>;
116 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
117 - clocks = <&ccu CLK_BUS_I2C1>;
118 - resets = <&ccu RST_BUS_I2C1>;
119 + clocks = <&ccu 64>;
120 + resets = <&ccu 43>;
122 #address-cells = <1>;
125 compatible = "allwinner,sun6i-a31-i2c";
126 reg = <0x01c2b400 0x400>;
127 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
128 - clocks = <&ccu CLK_BUS_I2C2>;
129 - resets = <&ccu RST_BUS_I2C2>;
130 + clocks = <&ccu 65>;
131 + resets = <&ccu 44>;
133 #address-cells = <1>;