1 From a004ee350177ece3c059831ea49293d62aea7ca6 Mon Sep 17 00:00:00 2001
2 From: Icenowy Zheng <icenowy@aosc.xyz>
3 Date: Tue, 22 Nov 2016 23:58:29 +0800
4 Subject: arm64: dts: allwinner: add USB1-related nodes of Allwinner A64
6 Allwinner A64 have two HCI USB controllers, a OTG controller and a USB
7 PHY device which have two ports. One of the port is wired to both a HCI
8 USB controller and the OTG controller, which is currently not supported.
9 The another one is only wired to a HCI controller, and the device node of
10 OHCI/EHCI controller of the port can be added now.
12 Also the A64 USB PHY device node is also added for the HCI controllers to
15 Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
16 Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
18 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 46 +++++++++++++++++++++++++++
19 1 file changed, 46 insertions(+)
21 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
22 +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
24 * OTHER DEALINGS IN THE SOFTWARE.
27 +#include <dt-bindings/clock/sun50i-a64-ccu.h>
28 #include <dt-bindings/interrupt-controller/arm-gic.h>
29 #include <dt-bindings/pinctrl/sun4i-a10.h>
30 +#include <dt-bindings/reset/sun50i-a64-ccu.h>
33 interrupt-parent = <&gic>;
38 + usbphy: phy@01c19400 {
39 + compatible = "allwinner,sun50i-a64-usb-phy";
40 + reg = <0x01c19400 0x14>,
42 + reg-names = "phy_ctrl",
44 + clocks = <&ccu CLK_USB_PHY0>,
45 + <&ccu CLK_USB_PHY1>;
46 + clock-names = "usb0_phy",
48 + resets = <&ccu RST_USB_PHY0>,
49 + <&ccu RST_USB_PHY1>;
50 + reset-names = "usb0_reset",
52 + status = "disabled";
56 + ehci1: usb@01c1b000 {
57 + compatible = "allwinner,sun50i-a64-ehci", "generic-ehci";
58 + reg = <0x01c1b000 0x100>;
59 + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
60 + clocks = <&ccu CLK_BUS_OHCI1>,
61 + <&ccu CLK_BUS_EHCI1>,
62 + <&ccu CLK_USB_OHCI1>;
63 + resets = <&ccu RST_BUS_OHCI1>,
64 + <&ccu RST_BUS_EHCI1>;
67 + status = "disabled";
70 + ohci1: usb@01c1b400 {
71 + compatible = "allwinner,sun50i-a64-ohci", "generic-ohci";
72 + reg = <0x01c1b400 0x100>;
73 + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
74 + clocks = <&ccu CLK_BUS_OHCI1>,
75 + <&ccu CLK_USB_OHCI1>;
76 + resets = <&ccu RST_BUS_OHCI1>;
79 + status = "disabled";
83 compatible = "allwinner,sun50i-a64-ccu";
84 reg = <0x01c20000 0x400>;