d1281332b45190831924d949bb3b8f6602f29e06
[openwrt/staging/blocktrron.git] /
1 From b956c9de91757c9478e24fc9f6a57fd46f0a49f0 Mon Sep 17 00:00:00 2001
2 From: Dmitry Osipenko <dmitry.osipenko@collabora.com>
3 Date: Mon, 17 Feb 2025 01:16:34 +0300
4 Subject: [PATCH] arm64: dts: rockchip: rk356x: Move PCIe MSI to use GIC
5 ITS instead of MBI
6
7 Rockchip 356x device-tree now supports GIC ITS. Move PCIe controller's
8 MSI to use ITS instead of MBI. This removes extra CPU overhead of handling
9 PCIe MBIs by letting GIC's ITS to serve the PCIe MSIs.
10
11 Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
12 Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
13 Link: https://lore.kernel.org/all/20250216221634.364158-4-dmitry.osipenko@collabora.com
14 ---
15 arch/arm64/boot/dts/rockchip/rk356x-base.dtsi | 2 +-
16 1 file changed, 1 insertion(+), 1 deletion(-)
17
18 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
19 +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
20 @@ -1043,7 +1043,7 @@
21 num-ib-windows = <6>;
22 num-ob-windows = <2>;
23 max-link-speed = <2>;
24 - msi-map = <0x0 &gic 0x0 0x1000>;
25 + msi-map = <0x0 &its 0x0 0x1000>;
26 num-lanes = <1>;
27 phys = <&combphy2 PHY_TYPE_PCIE>;
28 phy-names = "pcie-phy";