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ramips: add proper system clock and reset driver support for legacy SoCs
[openwrt/openwrt.git]
/
target
/
linux
/
ramips
/
dts
/
rt3050_edimax_3g-6200n.dts
diff --git
a/target/linux/ramips/dts/rt3050_edimax_3g-6200n.dts
b/target/linux/ramips/dts/rt3050_edimax_3g-6200n.dts
index 45b80743bd3e8c39471d9ec7b895d6cadbb26af6..c8f3951384d504d0a8608f91cb7769bbd024a000 100644
(file)
--- a/
target/linux/ramips/dts/rt3050_edimax_3g-6200n.dts
+++ b/
target/linux/ramips/dts/rt3050_edimax_3g-6200n.dts
@@
-2,6
+2,7
@@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
+#include <dt-bindings/mtd/partitions/uimage.h>
/ {
compatible = "edimax,3g-6200n", "ralink,rt3050-soc";
/ {
compatible = "edimax,3g-6200n", "ralink,rt3050-soc";
@@
-50,7
+51,9
@@
};
partition@50000 {
};
partition@50000 {
- compatible = "edimax,uimage";
+ compatible = "openwrt,uimage", "denx,uimage";
+ openwrt,offset = <FW_EDIMAX_OFFSET>;
+ openwrt,partition-magic = <FW_MAGIC_EDIMAX>;
label = "firmware";
reg = <0x50000 0x390000>;
};
label = "firmware";
reg = <0x50000 0x390000>;
};
@@
-61,17
+64,17
@@
compatible = "gpio-leds";
led_power: power {
compatible = "gpio-leds";
led_power: power {
- label = "
3g-6200n:
green:power";
+ label = "green:power";
gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
};
wlan {
gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
};
wlan {
- label = "
3g-6200n:
amber:wlan";
+ label = "amber:wlan";
gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
};
3g {
gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
};
3g {
- label = "
3g-6200n:
blue:3g";
+ label = "blue:3g";
gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
trigger-sources = <&otg_port1>;
linux,default-trigger = "usbport";
gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
trigger-sources = <&otg_port1>;
linux,default-trigger = "usbport";
@@
-104,7
+107,8
@@
};
ðernet {
};
ðernet {
- mtd-mac-address = <&factory 0x4>;
+ nvmem-cells = <&macaddr_factory_4>;
+ nvmem-cell-names = "mac-address";
};
&esw {
};
&esw {
@@
-118,3
+122,13
@@
&otg {
status = "okay";
};
&otg {
status = "okay";
};
+
+&factory {
+ compatible = "nvmem-cells";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ macaddr_factory_4: macaddr@4 {
+ reg = <0x4 0x6>;
+ };
+};